JP2618864B2 - Memory card - Google Patents

Description

The present invention relates to a memory card suitable for use as an external memory of a portable device such as a word processor.

(Prior Art) In recent years, a memory card having a built-in memory chip for a document file or the like for a word processor has been used. The memory card generally has a business card size of 86 mm in length and 54 mm in width, and has a shape with a thickness of 2 to 5 mm. This memory card is connected to a data processing device by a multi-contact parallel interface. 2. Description of the Related Art A memory card has attracted attention as a storage medium having a built-in semiconductor memory and having excellent features such as small size, light weight, low power consumption, high speed, and high reliability. Built-in semiconductor memory is RAM, mask ROM, OTP
(ONE TIME PROM), EEPROM (ELECTRIC ERASABLE PRO
M) or any combination thereof.

FIGS. 3 and 4 show an interface system for connecting a conventional memory card to a data processing device. Third
The figure shows a memory card of a memory bus type interface suitable for connecting to a memory bus of a microprocessor. Address bus This interface corresponding to the memory capacity (AD ₀ -15), made of two-way device (DT ₀ -7), read control lines (RD), write control line (WR) and a card select signal (CS) . Generally, only one or a plurality of memory chips 31 are incorporated in a memory card. The features of the memory bus system are listed below.

(1) High-speed access is possible by direct addressing.

(2) No additional circuit is required for using the terminals of the memory chip as input / output terminals.

FIG. 4 shows an input / output bus type memory card suitable for connecting to an input / output bus of a microprocessor. This interface rather than addressing directly the memory address in the address signal lines, after the address setting should advance before accessing via the data bus in the address register 42 in the memory card (DT ₀ -7), access the memory Indirect addressing. Bidirectional data bus (DT ₀ -7) when reading / writing the memory, and is used as a data bus when setting the address in the address register 42. The address bus (AD ₀ -1) is used to select the input / output port shown in FIG. Read control line (RD), write control line (WR)
And the card select signal (CS) is the same as in the memory bus system. Therefore, the memory card includes, in addition to one or more memory chips 41, an address register 42 for addressing an address space corresponding to the memory capacity,
Further, a read / write control circuit 43 for controlling the memory chip 41 and the address register 42 is required as a component.

 FIG. 5 shows input / output ports and their functions.

Writes an address in bits 0-7 of the address register 42, writes an address in bits 8-15 of the address register 42, and reads / writes the memory address set in and.

 The features of the I / O bus method are listed below.

(1) The number of interface signal lines is small.

(2) Even if the memory capacity increases, the interface signal is not affected. Therefore, expandability is high.

(Problems to be Solved by the Invention) By the way, conventionally, there are many memory cards of the memory bus system shown in FIG. However, the interface signal largely depends on the capacity of the memory chip, the signal terminals of the memory chip, and the capacity of the memory card, and thus lacks uniformity as an interface. It is expected that memory cards of the input / output bus type shown in FIG. 4 will be used in file applications such as document files for word processors, data files for personal computers, and RAM disks in the future. As the needs for memory cards are diversified, the types of interfaces are also increasing, and it is necessary to change interface circuits, connectors, and the like for each memory card. There is a demand for a unified interface with the expansion of the use range of memory cards.

The present invention has been made based on the above circumstances, and an object of the present invention is to provide a memory card that can be used as it is for both a memory bus type and an input / output bus type interface.

[Configuration of the Invention] (Means for Solving the Problems) The present invention has a configuration in which the same memory card can support both connection interfaces of the memory bus system and the input / output bus system. In addition to the memory chip, the card has a mechanism for directly addressing the memory chip, a mechanism for indirect addressing via an address register, and a direct addressing / indirect control by controlling an address register output or an address bus based on a connection interface of the memory card. A switching mechanism for enabling either one of the addressing is incorporated.

(Operation) In the above configuration, in the memory bus interface, the address register output is set to a high impedance state based on the bus switching signal, and the address signal from the data processing device directly drives the address bus and the decoder. In the input / output bus interface, an address bus and a decoder are driven from a preset address register based on a bus switching signal. In the interface of the input / output bus system, the address bus is set to a high impedance state.

As a result, the same memory card can be used for any of the interfaces. Therefore, a flexible and expandable system can be constructed, and the range of use can be greatly expanded.

(Example) Hereinafter, an example of the present invention is described in detail using drawings. FIG. 1 is a block diagram showing an embodiment of the present invention. The embodiment of the present invention is an example of a 64-Kbyte memory card containing eight 64-Kbit (8K × 8-bit) memory chips. The memory card including the control circuit 11 and the memory chip 12 is characterized by an interface signal MEM. Thus, the interface can be switched to the memory bus type interface shown in FIG. 3 or the input / output bus type interface shown in FIG. When the MEM signal is “1”, the memory bus method is used.
When it is “0”, it functions as an input / output bus interface. AD ₀ -15 in the address bus, the interface of the memory bus system for addressing the memory directly. The interface of the input and output bus system is used to select the input and output ports in the control circuit shown in FIG. 5 is AD ₀ -1. DT ₀ -7 is a bidirectional data bus, the memory data in the memory bus system interface read /
It is used for writing, and is used as a data bus for reading / writing of the memory card and writing of an address register in the control circuit 11 in the interface of the input / output bus system. CS is set to “1” when accessing the memory card with the card select signal. RD is a read control line and WR is a write control line. MAD ₀ -12 is the address bus to the memory chip. MDT ₀ -7 is a bidirectional data bus to the memory chip. ▼ denotes a memory chip enable signal for selecting which one of the eight memory chips 12 is to be accessed. ▲ ▼ is an output enable signal for the memory chip, which is used when reading memory data. ▲ ▼ is a write signal to the memory chip.

FIG. 2 is a diagram showing the internal structure of the control circuit 11 shown in FIG. 1 and extracting and showing only the periphery of an address bus and a data bus. In the figure, 111 and 112 are address registers, and 113 is a decoder. Address registers # 0 (111) and #
1 (112) O bus scheme used at the interface, the memory address data bus DT ₀ to be accessed -
7 is written. Ares register # 0 (111)
Are memory addresses 0-7, address register # 1 (11
2) sets the memory address 8-15. The decoder 113 decodes the highest address (13-15) to generate a memory chip enable signal ▲.

Hereinafter, a mechanism of switching between the memory bus system and the input / output bus system will be described. In the memory bus type interface, the bus switching signal MEM is set to "1", the outputs of the address registers # 0 (111) and # 1 (112) are in a high impedance state, and the address signal from the data processing device is directly transferred to the memory address bus. MAD ₀ −12
Further, by driving the decoder 113, it is possible to directly address the memory chip 12 in the memory card from the data processing device. Input and output interfaces of the bus system bus switching signal MEM is set to "0", the memory address bus MAD ₀ -12 and the decoder 113 based on the pre-address data has been set register # 0 (111) and # 1 (112) Drive. In the I / O bus type interface, the address bus AD ₀ -1 from the data processing device is used.
5 is set to high impedance state or not connected. However, addresses AD ₀ -1 are used for controlling input / output ports.

[Effects of the Invention] As described above, according to the present invention, the same memory card can be used for the memory bus interface and the input / output bus interface, and the following effects can be obtained.

(1) Since the same memory card can be used for both the interface of the memory bus system which can be accessed at high speed by direct addressing and the input / output bus system which is simple and excellent in scalability, the use range is greatly expanded.

(2) Since the switching of the bus system is performed inside the memory card, the data processing device does not require a special circuit.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a diagram extracting and showing only a portion related to the present invention in the internal configuration of the control circuit shown in FIG. 1, FIG. FIG. 4 is a diagram showing a configuration example of a memory card in a memory bus system interface and an input / output bus system interface, respectively. FIG. 5 is a diagram showing an example of allocation of input / output ports in the input / output bus system interface in a table format. . 11 ... control circuit, 12 ... memory chip, 111, 112 ... address register, 113 ... decoder.

Claims (1)

(57) [Claims] 1. A card which is detachably attached to a data processing device and has a built-in memory, comprising: an address bus for transferring an address signal for directly specifying a memory position from the data processing device; a bidirectional data bus; Address register for indirect addressing, means for directly addressing a memory built in the card from the data processing device via the address bus, and selecting the address register using a part of the address bus; Means for setting an arbitrary value from the data processing device via the data bus to the specified address register, and indirectly addressing the memory using the arbitrary value set in the address register; and performing the direct addressing and the indirect addressing. Switching means for enabling any of the addressing. Memory card to the butterflies.