JP2617090B2 - Semiconductor device contact manufacturing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a contact of a semiconductor device, and more particularly, to simultaneously form a metal plug having a uniform thickness in a contact hole where a P ⁺ and N ⁺ impurity diffusion region is exposed, thereby minimizing a contact failure. The present invention relates to a method for manufacturing a contact of a semiconductor device.

[0002]

2. Description of the Related Art In general, the aspect ratio of a contact hole increases due to the high integration of a semiconductor device. This is because the depth of the contact hole becomes relatively deep as the width of the contact hole decreases. The increase in the aspect ratio causes a contact failure between the upper conductive wiring and the lower conductive wiring formed in the contact hole by the deposition process.

In order to minimize the occurrence of the contact failure, a technique has been developed in which a metal plug is formed in the contact hole before the formation of the upper conductive wiring. The metal plug is formed by embedding tungsten in the contact hole using a deposition process. The step of depositing the tungsten in the contact hole includes the step of:
A chemical reactor containing F ₆ and H ₂ , or WF ₆ and SiH ₄ is utilized.

Among the reactive gases WF ₆ and H _2, and WF ₆ and SiH ₄ , the WF ₆ is preferentially expressed by silicon atoms on the silicon surface exposed by the contact holes.
The reaction is performed as in (1) so that tungsten is deposited on the surface of the silicon substrate.

## EQU1 ## 2WF ₆ + 3Si → 2W + 3SiF ₄ (Equation 1)

Further, the reaction gas WF ₆ and H ₂ or W
F ₆ and SiF ₄ react as shown in the following formula (2) or formula (3) to form a metal plug by sufficiently depositing tungsten in the contact hole.

WF ₆ + 3H ₂ → W + 6HF (Formula 2) 2WF ₆ + 3SiH ₄ → 2W + 3SiF ₄ + 6H ₂ (Formula 3)

However, when tungsten is deposited by the reaction of the above (Equation 1), there is a problem that the surface of the silicon substrate is excessively eroded, and that the deposited tungsten is formed in a form of a tunnel ring. Occurs.

In particular, when tungsten is deposited in the P ⁺ and N ⁺ impurity diffusion regions under high temperature conditions, the erosion phenomenon occurs more in the N ⁺ impurity diffusion region than in the P ⁺ impurity diffusion region. Separately, when tungsten is deposited in P ⁺ and N ⁺ impurity diffusion regions under low temperature conditions, P
^{+ The} tungsten plug deposited in the contact area
It has a smaller thickness than the tungsten plug formed by the N ⁺ impurity diffusion region, and causes a contact failure in the next step of depositing aluminum. This is because the tungsten plug formed in the P ⁺ impurity diffusion region does not grow into the tungsten plug formed in the N ⁺ impurity diffusion region.

[0008]

[Problems that the Invention is to Solve Because of such problems solving, P ⁺ and carried respectively P ⁺ and N ⁺ step and tungsten deposition process of forming the contact hole to the impurity diffusion region in a conventional A metal plug was formed in the N ⁺ impurity diffusion region. A conventional process of forming a metal plug must repeatedly perform an excessive masking process and an etching process by performing a contact hole forming process and a tungsten depositing process on the N ⁺ and P ⁺ impurity diffusion regions. Had problems.

Accordingly, an object of the present invention is to provide a semiconductor device having a P ⁺
And a metal plug having a uniform thickness is simultaneously formed in a contact hole formed in the N ⁺ impurity diffusion region, thereby minimizing a contact failure and simplifying a contact manufacturing process. It is to provide a method.

[0010]

In order to achieve the above object,
The method for manufacturing a contact of a semiconductor device according to the present invention uses P ⁺ and N
Providing a semiconductor substrate having a ⁺ impurity diffusion region formed thereon, forming an insulating layer on the semiconductor substrate, and selectively removing the insulating layer to remove the P ⁺ and N ⁺ impurity diffusion regions. forming a contact hole through which exposed the steps of WF by ₆ first reactor cold receiving supply of reaction gas to form a metal bed thin in the exposed N ⁺ impurity diffusion region, WF ₆ And SiF ₄
Forming a metal plug having a uniform thickness in all contact holes exposing the metal bed and the P ⁺ impurity diffusion region by using a high-temperature second reactor supplied with the reaction gas. Forming a metal wiring layer on top of the insulating layer so as to make an electrical connection.

[0011]

According to the above construction, the present invention can simultaneously form a metal plug having a uniform thickness in the P ⁺ and N ⁺ impurity diffusion regions, further minimize the contact failure between the upper and lower conductive wirings, and In addition, the contact manufacturing process can be simplified.

[0012]

1 and 2 are sectional views of a semiconductor device for explaining a method of manufacturing a contact of the semiconductor device according to an embodiment of the present invention step by step. Referring to FIG. 1, the semiconductor device includes a semiconductor substrate 100 having a P ^- well 1 and an N ^- well 2 formed on a surface thereof, and an isolation film 3 formed on a surface of the semiconductor substrate 100. The element isolation film 3 divides an element region where an element such as a transistor is formed on the surface of the semiconductor substrate 100. The element region is located in a region where the P ⁺ or N ⁺ -wells 1 and 2 are formed. In the element region of the semiconductor substrate 100, a conductive wiring 7, such as a gate (or a word line), an N ⁺ impurity diffusion region 4, and a P ⁺ impurity diffusion region 5 are sequentially formed. The N ⁺ impurity diffusion region 4 is formed by implanting N ⁺ impurity into the P ⁺ -well 1, and the P ⁺ impurity diffusion region 5 is implanted with P ⁺ impurity into the N ⁺ -well 2. Formed by An insulating layer 6 is formed on the entire structure of the semiconductor substrate 100. The insulating layer 6 is selectively removed by an etching process using a mask, and a contact hole exposing the conductive wiring 7, the P ⁺ impurity diffusion region 5 and the N ⁺ impurity diffusion region 4.
Form 20.

In the semiconductor device, the contact hole
Further, a metal bed 10 formed in the N ⁺ impurity diffusion region 4 exposed by 20 is further provided. The metal bed 10 is formed to have a small thickness by a tungsten deposition process. The low temperature deposition step of tungsten is 200-27.
This is performed by inserting the semiconductor substrate 100 having the above structure into a first reactor (not shown) which is supplied with a WF ₆ gas of 20 SCCM or less at a temperature of 0 ° C. for a certain period of time. At this time, tungsten is not deposited on the P ⁺ impurity diffusion region 5 and the metal wiring 7 exposed by the contact hole 20, but tungsten is deposited on the N ⁺ impurity diffusion region 4.

FIG. 2 illustrates a metal plug 8 embedded in the contact hole 20 exposing the metal bed 10, the P ⁺ impurity diffusion region 5 and the N ⁺ impurity diffusion region 4. The metal plug 8 is formed by depositing tungsten in the contact hole 20 by a high-temperature deposition process. The tungsten high-temperature deposition process is performed at a temperature of 300 to 400 ° C. at a temperature of WF ₆ and SiH ₄ (H ₂ ).
This is formed by inserting the semiconductor substrate 100 having the above structure into a second reactor (not shown) for supplying the reaction gas for a predetermined time. At this time, the silicon atoms penetrating into the N ⁺ impurity diffusion region 4 are removed by the conductive pad.
Blocked by 10. Further, the P ⁺ impurity diffusion region 5
The metal plug 8 deposited on the surface of the P ⁺ impurity diffusion region 5 grows uniformly at a high temperature even if a foreign substance is present on the surface. Further, the thickness of the silicon ring circle that penetrates the P ⁺ impurity diffusion region 5 is at a temperature of 350 to 400 ° C.
It is weak at about 200 km.

Further, a metal wiring layer 9 is formed on the contact hole 20 filled with the metal plugs 8 and the insulating layer 6. The metal wiring layer 9 is formed by depositing aluminum. Further, the metal wiring layer 9 is connected to the metal wiring 7 and the N
^{+ And} P ⁺ impurity diffusion regions 4 and 5 are electrically connected.

After performing the low-temperature deposition step of tungsten, the silicon substrate is moved to an argon gas when the semiconductor substrate 100 is moved to the second reactor side in the first reactor in order to perform the high-temperature deposition step of tungsten. Is transported by a buffer reactor (not shown) filled with. The buffer reactor prevents the conductive bed 10 made of tungsten from being oxidized and contaminated by air.

As described above, according to the method of manufacturing a contact of a semiconductor device of the present invention, a metal bed having a small thickness is formed in an N ⁺ impurity diffusion region exposed by a contact hole at a low temperature and then exposed by the contact hole at a high temperature. , P ⁺
By depositing tungsten on the impurity diffusion region and the metal bed, a metal plug having a uniform thickness can be simultaneously formed on the P ⁺ and N ⁺ impurity diffusion regions. Due to the above advantages, the method for manufacturing a contact of a semiconductor device according to the present invention can minimize the contact failure between the upper and lower conductive wirings, and can simplify the contact manufacturing process.

[Brief description of the drawings]

FIG. 1 is a sectional view of a semiconductor device for explaining a method of manufacturing a contact of the semiconductor device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view of the semiconductor device for explaining a method of manufacturing a contact of the semiconductor device according to the embodiment of the present invention.

[Explanation of symbols]

Reference Signs List 1 P ^- well 2 N ^- well 3 element isolation film 4 N ⁺ impurity diffusion region 5 P ⁺ impurity diffusion region 6 insulating layer 7 conductive wiring 8 metal plug 9 metal wiring layer 10 metal bed 20 contact hole 100 semiconductor substrate

 ──────────────────────────────────────────────────続 き Continuation of front page (56) References JP-A-63-153273 (JP, A) JP-A-2-237116 (JP, A) JP-A-3-38031 (JP, A) JP-A-3-3 179744 (JP, A) Japanese Unexamined Patent Application Publication No. 4-226029 (JP, A) Proceedings of the 49th Annual Meeting of the Japan Society of Applied Physics Autumn 1988, 4p-A-16

Claims (4)

(57) [Claims] Providing a semiconductor substrate on which P ⁺ and N ⁺ impurity diffusion regions are formed; forming an insulating layer on the semiconductor substrate; selectively removing the insulating layer; Forming a contact hole exposing the P ⁺ and N ⁺ impurity diffusion regions; and forming a thin metal bed in the exposed N ⁺ impurity diffusion regions by using a low temperature first reactor supplied with a WF ₆ reaction gas. Forming a metal plug having a uniform thickness in all contact holes exposing the metal bed and the P ⁺ impurity diffusion region by using a high-temperature second reactor supplied with a reactive gas of WF ₆ and SiH _4. Forming a metal wiring layer on the insulating layer so as to be electrically connected to the metal plug. 2. The method according to claim 1, wherein the first reactor maintains a temperature of 200 to 270 ° C. 3. The method according to claim 1, wherein the second reactor maintains a temperature of 300 to 400 ° C. 4. The method according to claim 1, further comprising, after forming the metal bed, moving the semiconductor substrate from the first reactor to the second reactor by a third reactor filled with argon gas. 2. The method for manufacturing a contact of a semiconductor device according to claim 1, wherein: