JP2616688B2 - Power switch circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power switch circuit, and more particularly to a power switch circuit mounted on an artificial satellite for controlling power supply from a solar cell to each device in the satellite.

[0002]

2. Description of the Related Art Generally, an artificial satellite uses a solar cell as a power source. That is, as shown in FIG. 4, the solar cell 30 is connected via the power switch circuits 34 to 35.
Is supplied to the devices 31 to 33 in the satellite.

The power switch circuits 34 to 35 are connected to devices 31 to 31.
The power supply circuit 33 is provided in correspondence with a power on command or a power off command from a ground station (not shown). The configuration of a conventional power switch circuit will be described with reference to the drawings.

FIG. 5 is a circuit diagram showing a configuration of a conventional power switch circuit. In the figure, a conventional power switch circuit has a command to hold a power-on command with priority when a power-on command for supplying power to a device from a power source and a power-off command for cutting off the supply conflict. It comprises a holding circuit 2 and transistors TR2 and TR1 which are turned on when an output Q is sent from the command holding circuit 2, and the input terminals 11 and 2
1 is a circuit for supplying the input power to 1 to the output terminals 12 and 22.

The command holding circuit 2 receives a power-on command as a set input and the power-off command as a reset input,
If both inputs conflict, the set input has priority. For example, it can be realized by an RS flip-flop that gives priority to set input.

The terminals 11 and 21 are hot (HOT), the terminals 12 and 22 are return (RTN), and Z1 and Z2 are current limiting impedances.

Further, the power switch circuit detects an overcurrent state in which the current supplied to the device exceeds a predetermined value and outputs a detection output 3
It has a current detection circuit (SENS) 3 that operates as a current limiter for sending 0. Then, the detection output 30 is input to the reset input of the command holding circuit 2 via the OR circuit 1. Thereby, the command holding circuit 2 is controlled to the reset state when an overcurrent state occurs. The current detection circuit 3 is configured to hold the detection output 30 for a certain period of time.

In such a configuration, when a power-on command is input from the ground station, the command holding circuit 2 is set and the output Q is held at "H". As a result, the transistors TR2 and TR1 are sequentially turned on, and the input terminal 11
And 21 are output to output terminals 12 and 22, and power is supplied from a solar cell (not shown) to a device (not shown).

In this state, when a power-off command is input, the command holding circuit 2 is set via the OR circuit 1 and the output Q is held at "L". As a result, the transistors TR2 and TR1 are both turned off, and the power supply from the solar cell (not shown) to the device (not shown) is cut off.

By the way, if a failure occurs in the device while the power is being supplied to the device (not shown) and an overcurrent state occurs, the command holding circuit 2 is reset and the output Q becomes "L". Thereby, the stress applied to the device is reduced.

Here, consider a case where a power-on command is input from a ground station to a device in which a failure has already occurred. In such a case, the command holding circuit 2 is forcibly set by the power-on command even if the command holding circuit 2 is to be reset due to an overcurrent state. The operation in this case will be described with reference to the drawings.

FIG. 6 is a time chart showing the operation of the power switch circuit of FIG. The figure shows a power-on command from the ground station, an output current from the circuit to the device, and a detection output 30 of the current detection circuit 3.

In FIG. 1, when a power-on command is input from the ground station, the command is held in the command holding circuit 2, and the transistors TR2 and TR1 are sequentially turned on to gradually increase the output current to the equipment. go(). When the output current further increases and enters an overcurrent state, the current detection circuit 3 detects it and the detection output 30 becomes "H" ().

At this time, the command holding circuit 2 is to be reset, but the power-on command has not yet fallen.
For this reason, the setting, that is, the ON operation has priority, and the command holding circuit 2 is forcibly set.

Thereafter, when the power-on command falls, the command holding circuit 2 is reset (). Therefore, the greater the pulse width of the power-on command, the greater the stress on the device.

[0016]

In the above-described conventional power supply switch circuit, when a power-on command is transmitted in a failure state of the device and the device is forcibly turned on, the current detection circuit operates to turn off the device. However, there is a drawback that the ON operation is prioritized and an excessive stress is applied to the device. That is, if power is supplied to one device in a concentrated manner due to an overcurrent state, stress is applied not only to that device but also to other devices, which may affect the operation of the satellite itself.

Here, in the case of a general device, if there is an abnormality such as a failure of the device, it can be investigated in a non-energized state before turning on the power. However, satellites in orbit cannot be surveyed or confirmed directly. For this reason, even if there is an abnormality such as a short-circuit failure, the start-up may be attempted by transmitting a power-on command. Therefore, when attempting to perform such startup, it is necessary to minimize the stress applied to the equipment.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional drawbacks, and an object of the present invention is to provide a power switch circuit capable of reducing stress applied to equipment.

[0019]

According to the power switch circuit of the present invention, when a power-on command for supplying power to a device from a power source and a power-off command for cutting off the supply conflict, the power switch circuit is turned on. A command holding unit that holds a command with priority, a power supply unit that supplies power to the device when the command holding unit is outputting, and detects that power supplied by the power supply unit is abnormal. A power switch circuit having abnormality detection means for inputting the power-off instruction to the instruction holding means, wherein the suppression means for suppressing the output of the instruction holding means in response to the abnormality detection of the abnormality detection means. It is characterized by including.

[0020]

Next, the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram showing a configuration of an embodiment of a power supply switch circuit according to the present invention, and portions equivalent to those in FIG. 5 are denoted by the same reference numerals. In the figure, the power switch circuit according to the embodiment of the present invention differs from the conventional circuit in that it includes a switch circuit (SW) 4 for suppressing the output of the command holding circuit 2 in response to the detection output 30. That is, the output of the command holding circuit 2 is forcibly suppressed in response to the detection output 30 of the current detection circuit 3, and the stress applied to the device is reduced.

The operation of the power switch circuit of this embodiment will be described with reference to the drawings. FIG. 2 is a time chart showing the operation of the power switch circuit of FIG. The figure shows a power-on command from the ground station, an output current from the circuit to the device, and a detection output 30 of the current detection circuit 3.

In FIG. 1, when a power-on command is input from the ground station, the command is held in the command holding circuit 2, and the transistors TR2 and TR1 are sequentially turned on, so that the output current to the equipment gradually rises. go(). When the output current further increases and enters an overcurrent state, the current detection circuit 3 detects it and the detection output 30 becomes "H" ().

At this time, the command holding circuit 2 is reset, but unlike the conventional circuit (FIG. 5), the output of the command holding circuit 2 is suppressed (). Therefore, even if the power-on command has not fallen, the output of the command holding circuit 2 is forcibly suppressed, so that the overcurrent state can be released early regardless of the falling time of the power-on command.

Therefore, even if the pulse width of the power-on command is large, the stress applied to the device can be reduced.

Here, the switch circuit 4 needs to be configured so as to be quickly switched to the off state when the detection output 30 becomes "H". Further, the switch circuit 4 has a detection output 30
It is necessary to operate so as to be in the off state while the signal is at "H", and to automatically return to the on state when it is at "L".

The internal configuration of the switch circuit 4 will be described with reference to the drawings. FIG. 3 shows the switch circuit 4 in FIG.
FIG. 4 is a circuit diagram showing an example of the internal configuration of the device. In the figure, a switch circuit 4 of the present example includes an inversion circuit 4 for inverting a detection output 30.
0, a transistor TR42 that performs a switching operation in accordance with the inverted output, and a transistor TR41 that turns on the transistor TR2 only when the transistor is on. In addition,
R is a resistor.

In such a configuration, when the detection output 30 is "L", that is, in a steady state, the output of the inverting circuit 40 becomes "H". Therefore, the transistor TR
42, TR41 and TR2 are all turned on, and power is supplied to the device.

On the other hand, when the detection output 30 is "H",
That is, in an abnormal state, the output of the inverting circuit 40 is “L”.
Becomes Therefore, the transistors TR42, TR41, and TR2 are all turned off, and power supply to the device is suppressed.

According to this configuration, the power supply can be promptly suppressed by the transistor circuit, so that the stress applied to the device can be reduced.

As described above, since the output of the command holding circuit is forcibly suppressed in response to the occurrence of an abnormality in the device, the stress on the device can be reduced.

Although overcurrent has been described as an example of an abnormal state of a device, the same effect can be obtained even if the output of the command holding circuit is forcibly suppressed in response to the occurrence of other device abnormalities. Is clear.

Although the power switch circuit mounted on the artificial satellite has been described above, it is apparent that the present invention is not limited to this and can be widely applied to a power supply system.

[0034]

As described above, according to the present invention, the stress applied to the equipment can be reduced by forcibly suppressing the command holding output in response to the detection of an abnormal state of the equipment such as an overcurrent. effective.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of a power switch circuit according to an embodiment of the present invention.

FIG. 2 is a time chart illustrating an operation of the power switch circuit of FIG. 1;

FIG. 3 is a circuit diagram showing an example of an internal configuration of a switch circuit in FIG. 1;

FIG. 4 is a diagram of a power supply system in an artificial satellite.

FIG. 5 is a circuit diagram showing a configuration of a conventional power switch circuit.

FIG. 6 is a time chart illustrating an operation of the power switch circuit of FIG. 2;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 OR circuit 2 Command holding circuit 3 Current detection circuit 4 Switch circuit

Claims (4)

(57) [Claims] 1. A command holding means for holding a power-on command with priority when a power-on command for supplying power from a power source to a device and a power-off command for cutting off the supply conflict with each other; A power supply unit that supplies power to the device when the output of the command holding unit is being performed, and when the power supply unit detects that power supplied by the power supply unit is abnormal, sends the power-off command to the command holding unit. A power switch circuit having an abnormality detecting means for inputting, wherein the power switch circuit includes an inhibiting means for inhibiting an output of the command holding means in response to an abnormality detection of the abnormality detecting means. 2. The power switch circuit according to claim 1, wherein said suppression means is a transistor switching circuit that shuts off an output of said command holding means in response to said abnormality detection. 3. The power supply according to claim 1, wherein the power supply is a solar cell mounted on a satellite, the device is mounted on the satellite, and the power-on command is input from the ground. Switch circuit. 4. The command holding means sets the power-on command as a set input, and sets the power-off command as a reset input,
4. The power switch circuit according to claim 1, wherein said set input is an RS flip-flop having priority.