JP2607371B2 - Semiconductor power converter - Google Patents

Description

The present invention relates to an n-channel electrostatic induction thyristor (Static
Induction Thyristor; hereinafter abbreviated as SI thyristor)
And a p-channel SI thyristor. The power conversion device of the present invention can simplify the gate control circuit as compared with the conventional device, and has a high application value in the field of high power.

[Conventional technology]

BACKGROUND ART Power conversion devices such as inverters and cycloconverters using semiconductor elements such as thyristors are widely applied to industrial equipment such as motor control, uninterruptible power supplies, and electric equipment for railway vehicles. FIG. 7 is a circuit example of a single-phase inverter composed of a gate turn-off thyristor (hereinafter abbreviated as GTO). The single-phase inverter circuit includes four GTOs 701, 702, 703, and 704. Each GTO includes a gate circuit GU 705, 706, 707, 708, a flywheel diode 709, and a snubber circuit SC710.
Z711 indicates a load, and E712 indicates a power supply. GTO701,703 and GT
By turning on and off O702 and O704 alternately, a single-phase square wave output is obtained.

[Problems to be solved by the invention]

In the inverter circuit of FIG. 7, the gate circuits GU707, 708 of the GTOs 703, 704 have a ground point on the lower potential side of the power supply voltage E712. Since the ground can be grounded to a constant potential portion, operation reliability is high, and since the ground points of the gate circuits GU707 and 708 are common, the drive power supply for the GU707 and 708 can be shared.
On the other hand, since the gate circuits GU705 and 706 of the GTO701 and 702 have a ground point at a portion where the potential fluctuates greatly, a more complicated circuit is necessary, and since the gate circuits GU705 and 706 do not have a common ground point, Separate drive power supplies are required for individual gate circuits.

[Means for solving the problem]

The present invention relates to an n-channel SI thyristor and a p-channel
By using the SI thyristor to configure the inverter shown in Fig. 5, more gate circuits can be driven by a common power supply, and the circuit configuration is simplified by providing a gate circuit ground point at a constant potential point. It is intended to improve the reliability of the device.

〔Example〕

 Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 8 is an example of a cross-sectional structure of an n-channel SI thyristor and a p-channel SI thyristor used in the present invention. Here, a buried gate element structure is shown. FIG. 8A is a cross-sectional structural view of an n-channel SI thyristor, in which the front side n ⁺ region 801 is a cathode and the back side p ⁺
Region 802 is an anode, n ^- regions 803 and 804 are high-resistance channel regions, p ⁺ regions 805 embedded in high-resistance channel regions 803 and 804 are gates, 806 is a cathode electrode, 807 is an anode electrode, and 808 is a gate electrode. Are respectively shown. The impurity densities of the cathode 801, the anode 802, and the gate 805 are set to, for example, 10 ²⁰ / cm ³ or more. The impurity density of the high-resistance channel regions 803 and 804 is 10 ¹³ to 10 ¹⁴ / c
much lower in m ³ about. In addition, if you give an example of the dimensions,
Gate diffusion depth 15μm, gate-gate distance 7μm,
The n ^- region 803 has a thickness of 320 μm, the n ^- region 804 has a thickness of 7 μm, a cathode diffusion depth of 5 μm, and an anode diffusion depth of 15 μm.
The control signal applied between the gate and the cathode controls the potential of the high-resistance channel narrowed by the gate in a capacitive coupling manner, thereby controlling the main current flowing between the anode and the cathode. To turn on the n-channel SI thyristor, a voltage of about +0.6 V is applied to the gate with respect to the cathode, and to turn off the n-channel SI thyristor, a negative voltage is applied. In an n-channel SI thyristor, when a positive voltage is applied to an anode with respect to a cathode, on / off is controlled by a gate signal. The p-channel SI thyristor shown in FIG. 8 (b) basically has a structure in which the impurity form of the n-channel SI thyristor is reversed. To turn on the p-channel SI thyristor,
A voltage of about -0.6 V is applied to the gate with respect to the cathode, and a positive voltage is applied to turn off the gate. In the p-channel SI thyristor, when a negative voltage is applied to the anode with respect to the cathode, on / off is controlled by the gate signal. In an n-channel SI thyristor, a gate signal is applied with reference to a low potential side, and in a p-channel SI thyristor, a gate signal is applied with reference to a high potential side. By combining the two elements utilizing the characteristics of the elements described above, the gate circuit can be simplified, and a lighter and smaller power converter with higher operation reliability can be realized.

Figure 9 is a light trigger used in the present invention (L ight T rigge
red; hereinafter abbreviated as LT) is an example of a cross-sectional structure of an SI thyristor. FIG. 9 shows a structural example of an LTSI thyristor having an amplification gate. In FIG. 9, the surface n ⁺ region 901, 91
1 the cathode, the back side p ⁺ region 902 anode, n ^- region 903,
Reference numerals 904 and 914 denote high resistance channel regions, p ⁺ regions 905 and 915 embedded in n ⁻ regions 903, 904 and 914 are gates, 906 and 916 are cathode electrodes, 907 is an anode electrode, and 908 and 917 are gate electrodes. The cathode of the amplification LTSI thyristor is connected to the gate of the main SI thyristor. Trigger light LT is for amplification
The LTSI thyristor is irradiated and the main SI thyristor is used for amplification.
Driven by LTSI thyristor. In FIG. 9,
A double negative bevel structure for improving the reverse breakdown voltage of the device is shown. By using an LTSI thyristor, the gate circuit can be simplified, and the trigger signal and the high power portion can be electrically isolated.

FIG. 10 shows an insulated gate type (Metal Insu) used in the present invention.
This is an example of a cross-sectional structure of an SI thyristor. In FIG. 9, the n ⁺ region 1001 is a cathode, the back side p ⁺ region 1002 is an anode, the n ⁻ region 1003 is a high resistance channel region, 1004 is a p base region, 1005 is a p ⁺ base region, 1006 is a cathode electrode, 1007 Is the anode electrode,
1008 is a gate electrode, 1009 is a p ⁺ base electrode, and 1010 is a gate oxide film. Since the MIS type SI thyristor has a high input impedance, gate driving is easy.

FIG. 11 shows circuit representations of various SI thyristors used in the present invention. 1101 is an n-channel SI thyristor, 1102
Is a p-channel SI thyristor, 1103 is an n-channel MIS
Gate SI thyristor, 1104 is p-channel MIS gate SI
Represents a thyristor.

Figure 1 shows an n-channel SI thyristor and a p-channel
It is an example of a circuit diagram of a single-phase inverter using an SI thyristor.

Of the four SI thyristors constituting the inverter, the two high-voltage side SI thyristors Thy.1 101 and Thy.2 102 are p-channel, and the two low-voltage side elements Thy.3 103 and Thy.4
104 is an n channel. Each SI thyristor includes a gate circuit D1 105, D2 106, D3 107, D4 108 and a protection circuit 109 such as a flywheel diode or a snubber circuit. Z110 is a load. + V ₁ , −V ₂ , + V ₃ , and −V ₄ indicate the drive voltages of the gate circuits, and G 1 to G ₄ indicate the ground points. ON1 to ON4 and OFF1 to OFF4 indicate an ON signal and an OFF signal of the gate circuit, respectively. FIG. 1B shows an example of the timing of the ON signal waveform, the OFF signal waveform, and the switching waveform of each thyristor. Fig. 1 (a)
In this circuit configuration, the ground points G1 and G2 of the p-channel SI thyristor on the high voltage side can be taken on the high voltage side of the main power supply.
For this reason, in the present embodiment, the reliability is improved and the high voltage side p is higher than in the conventional example in which the ground point of the gate circuit must be provided at a point where the potential fluctuation where the load is connected is severe.
Since the ground points of the gate circuits D1 and D2 of the channel SI thyristor can be made common, D1 and D2 can be driven by a set of power supplies. Similarly, the gate circuits D3 and D4 of the low-voltage side n-channel SI thyristor can be driven by a set of power supplies.

FIG. 2 (a) is an example of a circuit diagram of a single-phase inverter using the light-triggered SI thyristor of the present invention. The inverter is composed of four light-triggered SI thyristors, two high-voltage-side elements LT Thy.1 201 and LT Thy.2 202 are p-channel light-triggered SI thyristors, and two low-voltage side LT T thyristors.
hy.3 203 and LT Thy.4 204 are n-channel optical trigger SI thyristors. Each light-triggered SI thyristor includes an off-gate circuit D1 205, D2 206, D3 207, D4 208 and a protection circuit 209 such as a flywheel diode or a snubber circuit. Z21
0 represents a load. Furthermore, + V _1, -V ₂ is a drive voltage of off-gate circuit, G1 to G4 denotes the ground point of the off-gate circuit. LT1 to TL4 are trigger light pulses, OFF1 to
OFF4 indicates an off signal. FIG. 2B shows an example of the timing of the trigger light pulse waveform, the OFF signal waveform, and the switching waveform of each optical trigger SI thyristor. In the circuit configuration of FIG. 2A, the off-gate circuits D1 and D2 can be driven by a single power supply as in the embodiment of FIG. 1, and the reliability can be further improved. In addition to it,
In the embodiment of FIG. 2, the ON of the thyristor is controlled by an optical signal, so that the gate circuit can be simplified and the reliability can be improved. In the embodiment shown in FIG. 2, if an optical quench circuit that can be driven by an optical signal is used for the off-gate circuits D1 205 to D4 208, the control signal section and the high power section can be electrically separated completely. FIG. 3 (a) is an example of another circuit diagram of a single-phase inverter of the present invention using an n-channel SI thyristor and a p-channel SI thyristor, in which noise characteristics are improved and the circuit can be simplified. In the embodiment of FIG. 3 (a), the two elements Thy.1 301 and Thy.2 302 on the high voltage side are n-channel SI thyristors, and the two elements Thy.3 on the low voltage side.
303 and Thy.4 304 are p-channel SI thyristors. 2
Since one SI thyristor Thy.1 301 and Thy.3 303 constitute a complementary circuit, Thy.1 and Thy.3 can be driven by one gate circuit D1 305. By connecting a parallel circuit of a diode D _g 311, a resistor R _g 312, and a capacitance C _g 313 to the gate of each thyristor, desired forward and reverse biases can be applied to each SI thyristor. Thy.1 301 and Th
To prevent y.3 303 from turning on at the same time, Thy.1
The element characteristics and gate circuit conditions are set such that the turn-off speed of Thy.3 is faster than the turn-off speed of Thy.3, and the turn-off speed of Thy.1 is faster than the turn-off speed of Thy.3. You need to decide. Similarly, Thy.2 302 and Thy.4 304
Can be simultaneously driven by one gate circuit D2306. Third
In FIG. 9A, 309 is a protection circuit such as a flywheel diode or a snubber circuit, and Z310 is a load. FIG. 3 (b)
3 shows an example of waveforms of control signals S1, S2, S3, S4 of a gate circuit and timings of switching waveforms of each SI thyristor. In the embodiment of FIG. 3A, an inverter circuit composed of four SI thyristors can be driven by two gate circuits, so that the circuit configuration can be simplified.

FIG. 4A is an example of a circuit diagram of a single-phase inverter using an MIS gate SI thyristor. In the embodiment of FIG. 4A, two elements Thy.1 401 and Thy.2 402 on the high voltage side.
Is an n-channel MIS gate SI thyristor, and two low-voltage-side elements Thy.3 403 and Thy.4 404 are p-channel MIS gates.
It is a gate SI thyristor. Since the two MIS gate SI thyristors Thy.1 401 and Thy.3 403 form a complementary circuit, Thy.1 and Thy.3 can be driven by one gate circuit D1 405. Further, since the SI thyristor is of the MIS gate type, the gates of Thy.1 401 and Thy.3 403 can be directly connected to the output of the gate circuit D1 405. Similarly, Thy.2
402 and Thy.4 404 can be simultaneously driven by one gate circuit D2 406. In FIG. 4A, reference numeral 409 denotes a protection circuit such as a flywheel diode or a snubber circuit, and Z410 denotes a load. FIG. 4B shows an example of the timing of the waveforms of the control signals S1, S2, S3, S4 of the gate circuit and the switching waveform of each SI thyristor.

Although the embodiment shown in FIGS. 1 to 4 has been described with respect to a single-phase inverter, the present invention can be applied to a PWM control, a PDM control, and a three-phase inverter. In addition, the present invention is applicable not only to DC / AC conversion, but also to a circuit for controlling an AC main power supply.
It can be applied to AC / AC conversion such as / DC conversion and cyclo converter. Further, the present invention can be applied to AC / DC / DC / AC conversion and DC-DC conversion.

Figure 5 shows an n-channel SI thyristor and a p-channel
It is an example of a circuit diagram of the AC bidirectional switch of the present invention using an SI thyristor. The bidirectional switch is composed of one n-channel SI thyristor Thy.1 501 and one p-channel SI thyristor Thy.2 502, and the anode of Thy.1 501 and the anode of Thy.2 502 are connected. The cathode of .1 501 and the cathode of Thy.2 502 are connected. further,
The gate of each thyristor has a diode D _g 505 and a resistor R _g 50
6 and a parallel circuit of a capacitance C _g 507 are connected. In this circuit, two SI thyristors Thy.1 501 and Thy.2 502 are 1
It can be driven by the number of gate circuits D503. In FIG. 5 (a), 50
4 is a protection circuit such as a snubber circuit, and Z508 is a load. Fifth
FIG. 7B shows the waveforms of the control signals S1 and S2 of the gate circuit, the input waveform e _i , and the output waveform e _o . The embodiment of FIG.
For large devices, it can be applied to SVC (Static Var Compensator). Further, the embodiment of FIG. 5 can also be constituted by a light triggered SI thyristor.

FIG. 6 is an example of a circuit diagram of a serial connection using an n-channel SI thyristor and a p-channel SI thyristor of the present invention. n-channel SI thyristor Thy.1 601, Thy.3 60
3 ... and p-channel SI thyristor Thy.2 602, Thy.4 604
Are alternately connected in series. Each SI thyristor includes gate circuits D1 605, D2 606, D3 607, D4 608 and a resistor 609 for voltage balancing. _{+ V 1, + V 2,} -V 1, -V 2
Indicates a drive voltage of the gate circuit, and G ₁ and G ₂ indicate ground points of the gate circuit. Further, ON and OFF represent control signals for the gate circuit. In the circuit configuration of FIG. 4, the adjacent n-channel SI thyristor and p-channel SI thyristor (Thy.1 601 and Thy.2 602 in FIG. 6, or Thy.
3 603 and Thy.4 604) (Fig. 6
D1 605 and D2 606, or,, D3 607 and D4 608) in a set of power (in FIG. 6 a + V _1, -V ₁ or, + V _2, can be driven by -V _2). For this reason, the number of drive power supplies for the gate circuit can be reduced. In FIG. 6, a method of electrically driving is described. However, it is also effective to use a light-triggered SI thyristor, and a method of driving a gate circuit with an optical signal is also conceivable. Further, the present invention can be applied to a parallel connection circuit.
The present invention is not limited to DC → AC inverters, but also AC → DC converters, AC → AC cycloconverters, DC → DC choppers, AC
It is clear that the present invention can be applied to a → DC → DC → AC conversion circuit.

The present invention described above is not limited to the SI thyristor, but may be a conventional thyristor or a configuration made complementary by GTO, n-channel, p-channel SIT, npn and pnp bipolar transistors, n-channel, p-channel MOSFET or n-channel. It can also be applied to channel, p-channel IGT, etc.

〔The invention's effect〕

By applying the present invention, the number of components of the power converter can be reduced, and the reliability, weight reduction, cost reduction, and the like of the device can be realized.

[Brief description of the drawings]

FIG. 1 (a) is a diagram showing an example of a circuit diagram of a single-phase inverter of the present invention using an n-channel SI thyristor and a p-channel SI thyristor, and FIG. 1 (b) is a single-phase inverter of FIG. 1 (a). FIG. 2A shows an example of the timing of the control signal waveform of the circuit and the switching waveform of each thyristor, FIG.
FIG. 2 is a diagram showing an example of a circuit diagram of a single-phase inverter of the present invention using an optical trigger SI thyristor. FIG. 2 (b) shows a trigger light pulse waveform, an off signal waveform, and a single-phase inverter circuit of FIG. 2 (a). FIG. 3A shows an example of the timing of the switching waveform of each light triggered SI thyristor, and FIG.
FIG. 3B shows another example of a circuit diagram of a single-phase inverter of the present invention using a channel SI thyristor and a p-channel SI thyristor, and FIG. 3B shows a control signal waveform of the single-phase inverter circuit of FIG. FIG. 4A shows an example of the timing of the switching waveform of each thyristor. FIG.
FIG. 4 (b) is a diagram showing an example of a circuit diagram of a single-phase inverter of the present invention using an I-thyristor, FIG. 4 (b) is a control signal waveform of the single-phase inverter circuit of FIG. 4 (a), and FIG. FIG. 5B shows an example of a circuit diagram of a bidirectional AC switch using a channel SI thyristor and a p-channel SI thyristor. FIG. 5B shows a control signal waveform input waveform and an output waveform of the circuit of FIG. Figure 6 shows an n-channel SI thyristor and p
FIG. 7 is a diagram showing an example of a circuit diagram of a series connection of the present invention using a channel SI thyristor, FIG. 7 is a diagram showing a circuit example of a single-phase inverter constituted by a GTO, and FIG.
FIG. 8 (b) is a diagram showing an example of a cross-sectional structure diagram of a p-channel SI thyristor, and FIG. 9 is a diagram showing an example of a cross-sectional structure diagram of a light-triggered SI thyristor. FIG. 10 is a diagram showing an example of a cross-sectional structure diagram of an MIS gate SI thyristor, and FIG. 11 is a diagram showing a circuit representation of various SI thyristors used in the present invention. 101,102,303,304,502,602,604 ... p-channel SI thyristor, 103,104,301,302,501,601,603 ... n-channel SI thyristor, 201,202 ... p-channel optical trigger SI
Thyristors, 203, 204: n-channel optical trigger SI thyristors, 401, 402: n-channel MIS gate SI thyristors, 403, 404: p-channel MIS gate SI thyristors, 105, 106, 107, 108, 205, 206, 207, 208, 305, 306, 405, 40
6,503,605,606,607,608 …… Gate circuit, 109,209,309,4
09,504 …… Protection circuits such as flywheel diodes and snubber circuits, 609 …… Voltage balancing resistors, 311,505 …… Gate circuit diodes, 312,506 …… Gate circuit resistors, 3
13,507 …… Capacitor for gate circuit

 ──────────────────────────────────────────────────続 き Continuation of front page (56) References JP-A-59-156165 (JP, A) JP-A-62-7366 (JP, A) JP-A-55-128870 (JP, A) JP-A-62 37084 (JP, A) Fully open 1986-144796 (JP, U) Fully open 1979-75024 (JP, U) Fully open 1979-102609 (JP, U)

Claims (7)

(57) [Claims] 1. At least two n-channel static induction thyristors, two p-channel static induction thyristors, and at least four gate control circuits connected to individual gates of said static induction thyristors, The cathodes of the two p-channel electrostatic induction thyristors are connected in common to a high potential point of the main power supply, and the anode of one of the two p-channel electrostatic induction thyristors and the anode of the p-channel electrostatic induction thyristor are connected to each other. The anode of one n-channel electrostatic induction thyristor of the two n-channel electrostatic induction thyristors is connected to the anode of the other p-channel electrostatic induction thyristor of the two p-channel electrostatic induction thyristors. The anode of the other n-channel electrostatic induction thyristor of the two n-channel electrostatic induction thyristors is connected And the cathodes of the two n-channel electrostatic induction thyristors are connected in common to a low potential point of the main power supply, and the two p-channel electrostatic induction thyristors of the four gate control circuits are connected. A gate control circuit for driving the two n-channel electrostatic induction thyristors of the four gate control circuits is driven by a first power supply having the cathodes of the two p-channel electrostatic induction thyristors as ground points. The gate control circuit for the thyristor is driven by a second power supply having the cathodes of the two n-channel electrostatic induction thyristors as ground points. the anode of the p-channel electrostatic induction thyristor and the one of the n
A semiconductor for controlling power to a load connected between an anode of a channel static induction thyristor, an anode of the other p-channel static induction thyristor, and an anode of the other n-channel static induction thyristor. Power converter. 2. The device according to claim 1, wherein said static induction thyristor comprises a light trigger static induction thyristor, and said gate control circuit comprises a light quench circuit driven by an optical signal. Item 7. The semiconductor power conversion device according to Item 1. 3. At least two n-channel static induction thyristors, two p-channel static induction thyristors, and two gate control circuits, wherein the two n-channel static induction thyristors have a common anode. And connected to the high potential point of the main power supply, the cathode of one of the two n-channel electrostatic induction thyristors and the cathode of the two p-channel electrostatic induction thyristors. The cathode of one p-channel static induction thyristor is connected to serve as a ground point for one gate control circuit of the two gate control circuits, and the other n of the two n-channel static induction thyristors is connected to the ground. A cathode of the channel electrostatic induction thyristor and the other of the two p-channel electrostatic induction thyristors; The cathodes of the two p-channel static induction thyristors are connected to each other to serve as a ground point for the other gate control circuit of the two gate control circuits. The output of one of the two gate control circuits is connected to the gate of the one n-channel electrostatic induction thyristor and the gate of the one p-channel electrostatic induction thyristor, The output of the other one of the two gate control circuits is the gate of the other n-channel electrostatic induction thyristor and the other p-type gate.
The one n-channel electrostatic induction thyristor is connected to the gate of the channel electrostatic induction thyristor, and the one n-channel electrostatic induction thyristor and the one p-channel electrostatic induction thyristor are driven by the one gate control circuit and the other n-channel electrostatic induction thyristor And the other p-channel electrostatic induction thyristor are driven by the other gate control circuit, and the on / off control signal to the two gate control circuits is used to control the cathode of the one n-channel electrostatic induction thyristor and the one of the other. Controlling the power to a load connected between the cathode of the p-channel electrostatic induction thyristor, the cathode of the other n-channel electrostatic induction thyristor, and the cathode of the other n-channel electrostatic induction thyristor. Semiconductor power converter. 4. The apparatus according to claim 3, wherein each of said gate control circuits is connected to the gate of each of said static induction thyristors via a gate circuit comprising a parallel circuit of a diode, a resistor and a capacitor. Item 7. The semiconductor power conversion device according to Item 1. 5. The semiconductor power converter according to claim 3, wherein said static induction thyristor is constituted by an insulated gate type static induction thyristor. 6. An n-channel electrostatic induction thyristor, a p-channel electrostatic induction thyristor, a gate control circuit, and a gate circuit composed of a parallel circuit of a diode, a resistor, and a capacitor connected to a gate of the electrostatic induction thyristor. At least the anode of the n-channel electrostatic induction thyristor and the anode of the p-channel electrostatic induction thyristor are connected, and the cathode of the n-channel electrostatic induction thyristor and the cathode of the p-channel electrostatic induction thyristor are connected. An output terminal of the gate control circuit is connected to the gate of the n-channel electrostatic induction thyristor via the first gate circuit and is connected to the gate of the gate control circuit via the second gate circuit.
A semiconductor power conversion device connected to a gate of a channel electrostatic induction thyristor, wherein the n-channel electrostatic induction thyristor and the p-channel electrostatic induction thyristor are driven by the gate control circuit. 7. At least a plurality of n-channel electrostatic induction thyristors, a plurality of p-channel electrostatic induction thyristors, and a gate control circuit of the n-channel electrostatic induction thyristor and the p-channel electrostatic induction thyristor,
The channel electrostatic induction thyristor and the p-channel electrostatic induction thyristor are alternately connected in series, and the anode of the n-channel electrostatic induction thyristor is connected to the anode of one of the adjacent p-channel electrostatic induction thyristors; The cathode of the channel electrostatic induction thyristor is connected to the cathode of the other adjacent p-channel electrostatic induction thyristor to serve as a ground point for the gate control circuit, and a pair of the adjacent n-channel electrostatic induction thyristor and the p-channel static thyristor are connected. A semiconductor power converter, wherein two gate control circuits for an inductive thyristor share a single drive power supply.