JP2601228B2 - Method for manufacturing resin-sealed circuit device - Google Patents

Method for manufacturing resin-sealed circuit device

Info

Publication number
JP2601228B2
JP2601228B2 JP6309978A JP30997894A JP2601228B2 JP 2601228 B2 JP2601228 B2 JP 2601228B2 JP 6309978 A JP6309978 A JP 6309978A JP 30997894 A JP30997894 A JP 30997894A JP 2601228 B2 JP2601228 B2 JP 2601228B2
Authority
JP
Japan
Prior art keywords
resin
support plate
conductor plate
internal lead
protruding portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP6309978A
Other languages
Japanese (ja)
Other versions
JPH07283356A (en
Inventor
和美 高畠
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanken Electric Co Ltd
Original Assignee
Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Priority to JP6309978A priority Critical patent/JP2601228B2/en
Publication of JPH07283356A publication Critical patent/JPH07283356A/en
Application granted granted Critical
Publication of JP2601228B2 publication Critical patent/JP2601228B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/78Apparatus for connecting with wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • H01L2224/7825Means for applying energy, e.g. heating means
    • H01L2224/783Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301Capillary
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8512Aligning
    • H01L2224/85148Aligning involving movement of a part of the bonding apparatus
    • H01L2224/85169Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
    • H01L2224/8518Translational movements
    • H01L2224/85181Translational movements connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、樹脂封止型半導体装
置、樹脂封止型混成集積回路装置等の樹脂封止型回路装
置の製造方法に関し、更に詳細には、内部リード細線に
よる短絡を防止することができる樹脂封止型回路装置の
製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a resin-sealed circuit device such as a resin-sealed semiconductor device and a resin-sealed hybrid integrated circuit device. The present invention relates to a method for manufacturing a resin-encapsulated circuit device that can be prevented.

【0002】[0002]

【従来の技術】複数の半導体チップを独立に支持するた
めに複数の支持板を用意し、複数の半導体チップを相互
に接続するために共通接続用導体板を設け、半導体チッ
プと共通接続用導体板との間を内部リード細線で接続
し、外部接続部分を除いて、半導体チップ、支持板、導
体板、内部リード細線を樹脂封止した樹脂封止型半導体
装置は既に開発されている。
2. Description of the Related Art A plurality of support plates are provided for independently supporting a plurality of semiconductor chips, and a common connection conductor plate is provided for connecting the plurality of semiconductor chips to each other. A resin-sealed semiconductor device in which a semiconductor chip, a support plate, a conductor plate, and an internal lead thin wire are resin-sealed by connecting the board to the board with a thin internal lead and excluding an external connection portion has already been developed.

【0003】[0003]

【発明が解決しようとする課題】ところで、トランスフ
ァーモールド法によって支持板の上面側のみでなく下面
側も薄く樹脂で被覆する場合には、間隔の狭い支持板の
下側よりも間隔の広い支持板の上側で樹脂の流れが多く
なり、且つ支持板と接続用導体板との間を通って支持板
の上側から下側に向かう樹脂の流れも生じる。この樹脂
の流れが支持板上のチップと接続用導体板との間の内部
リード細線に作用すると、内部リード細線が垂れて支持
板又はその他の物体に接触し、短絡状態になるおそれが
ある。また、樹脂の圧力が極端に大きい場合には内部リ
ード細線が切れるおそれもある。
When the lower and upper surfaces of the support plate are coated with resin by the transfer molding method, not only the upper surface but also the lower surface of the support plate are thinner than the lower support plate. On the upper side, the flow of the resin increases, and the flow of the resin from the upper side to the lower side of the support plate through the space between the support plate and the connecting conductor plate also occurs. When the flow of the resin acts on the internal lead wires between the chip on the support plate and the connection conductor plate, the internal lead wires may hang down and come into contact with the support plate or other objects, resulting in a short circuit state. Also, when the pressure of the resin is extremely large, there is a possibility that the internal lead fine wire may be cut.

【0004】そこで、本発明の目的は内部リード細線の
垂れを防止することができる樹脂封止型回路装置の製造
方法を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a method of manufacturing a resin-sealed circuit device that can prevent sagging of internal lead wires.

【0005】[0005]

【課題を解決するための手段】上記目的を達成するため
の本発明は、実施例を示す図面の符号を参照して説明す
ると、回路素子と、一方の主面で前記回路素子を支持
し、且つ直線状に延びる端面を有している導電性支持板
と、前記支持板の前記端面に対して平行に延びる端面を
有している接続用導体板11と、前記回路素子又は前記
支持板と前記導体板11とを電気的に接続し、前記支持
板の前記端面及び前記導体板11の前記端面上を通るよ
うに配設されている内部リード細線22とを有し、且つ
前記支持板の前記端面と前記導体板11の前記端面との
間隔が部分的に狭くなるように突出している突出部25
が前記導体板11に設けられ、前記突出部25の突出方
向が前記内部リード細線22の延びる方向と実質的に同
一とされ、前記内部リード細線22が前記突出部25の
先端上を通るように前記突出部25の位置が決められて
いる組立体を用意する工程と、前記組立体を成形用型2
6、27に入れ、前記突出部25側から前記回路素子に
向かう方向性を有していると共に前記内部リード細線2
2の延びる方向と同一の方向性を有して成形空所29に
絶縁性の樹脂を注入して前記回路素子、前記支持板の一
方の主面及び他方の主面、前記導体板11の少なくとも
一部、前記内部リード細線22を被覆する樹脂封止体2
4を形成する工程とを含む樹脂封止型回路装置の製造方
法に係わるものである。
SUMMARY OF THE INVENTION The present invention for achieving the above object will be described with reference to the reference numerals in the drawings showing the embodiments, in which a circuit element and the circuit element are supported on one main surface, And a conductive support plate having an end surface extending linearly, a connecting conductor plate 11 having an end surface extending in parallel to the end surface of the support plate, and the circuit element or the support plate. The conductive plate is electrically connected to the end plate of the support plate, and the internal lead thin wires 22 are disposed so as to pass over the end surface of the conductive plate. A protruding portion 25 protruding so that the distance between the end face and the end face of the conductor plate 11 is partially reduced;
Is provided on the conductor plate 11, the projecting direction of the projecting portion 25 is substantially the same as the extending direction of the internal lead fine wire 22, and the internal lead fine wire 22 passes over the tip of the projecting portion 25. Preparing an assembly in which the position of the projection 25 is determined;
6, 27, and has a directivity from the protruding portion 25 side to the circuit element, and has the internal lead thin wire 2
Insulating resin is injected into the molding cavity 29 having the same direction as the direction in which the circuit element 2 extends, and at least one of the circuit element, one main surface and the other main surface of the support plate, and the conductor plate 11 Part of the resin sealing body 2 covering the internal lead fine wires 22
And a step of forming a resin-sealed circuit device.

【0006】[0006]

【発明の作用及び効果】本発明の接続導体板11には突
出部25が設けられ、内部リード細線22はこの突出部
25の上を通っている。突出部25が設けられている所
では支持板と接続用導体板11との間隔が他の部分より
も狭くなり、封止用樹脂の流れが悪くなり、内部リード
細線22に加わる圧力も小さくなる。また、樹脂を内部
リード細線22の延びる方向と同一の方向性を有して成
形空所に注入するので、内部リード細線22に加わる圧
力は更に小さくなる。この結果、内部リード細線22の
垂れが防止され、短絡が生じ難くなる。なお、支持板と
接続用導体板11との間隔を全領域で狭くするのではな
く、部分的に狭くするのみであるから、他の部分での樹
脂の流れは阻害されない。
The connecting conductor plate 11 of the present invention is provided with a protruding portion 25, and the thin inner lead 22 passes over the protruding portion 25. In the place where the protruding portion 25 is provided, the distance between the support plate and the connecting conductor plate 11 becomes narrower than other portions, the flow of the sealing resin becomes worse, and the pressure applied to the internal lead fine wires 22 also becomes smaller. . Further, since the resin is injected into the molding cavity in the same direction as the direction in which the internal lead fine wires 22 extend, the pressure applied to the internal lead fine wires 22 is further reduced. As a result, the sagging of the internal lead wires 22 is prevented, and a short circuit is less likely to occur. In addition, since the space between the support plate and the connection conductor plate 11 is not narrowed in the entire region but is only partially narrowed, the flow of the resin in other portions is not hindered.

【0007】[0007]

【実施例】次に、本発明の実施例に係わる樹脂封止型混
成集積回路装置及びその製造方法を図面に基づいて説明
する。図1に絶縁樹脂封止体を取除いた状態で示されて
いる混成集積回路装置のための組立体は、回路素子とし
て第1〜第4のパワートランジスタチップ1、2、3、
4及び1つのモノリシックICチップ5を含んでいる。
各パワートランジスタチップ1〜4及びモノリシックI
Cチップ5を電気的に分離して支持するために、5つの
金属製支持板6、7、8、9、10が設けられている。
各支持板6〜10はこれに一体に連結された外部リード
6a、7a、8a、9a、10aを有している。
Next, a resin-sealed hybrid integrated circuit device and a method of manufacturing the same according to an embodiment of the present invention will be described with reference to the drawings. The assembly for the hybrid integrated circuit device shown in FIG. 1 with the insulating resin sealing member removed has first to fourth power transistor chips 1, 2, 3,.
4 and one monolithic IC chip 5.
Power transistor chips 1-4 and monolithic I
In order to electrically separate and support the C chip 5, five metal support plates 6, 7, 8, 9, 10 are provided.
Each of the support plates 6 to 10 has external leads 6a, 7a, 8a, 9a, and 10a integrally connected thereto.

【0008】4個のパワートランジスタチップ1〜4の
相互接続用導体板11が各パワートランジスタチップ1
〜4に沿うように長手に配設され、これにも外部リード
11aが設けられている。
The interconnecting conductor plate 11 of the four power transistor chips 1 to 4
4 are arranged longitudinally, and an external lead 11a is also provided on this.

【0009】各支持板6〜10に連結された外部リード
6a〜10aと、相互接続用導体板11に連結された外
部リード11aと、支持板6〜10に非連結な外部リー
ド12、13、14、15、16、17、18、19、
20は2.54mmピッチ(インチピッチ)で並置され
ている。モノリシックICチップ5はPb−Sn系半田
にて支持板10に固着され、この上面の各電極はAu細
線から成る内部リード細線21によって非連結外部リー
ド12〜20、及び連結外部リード10aに電気的に接
続されている。各パワートランジスタチップ1〜4は下
面にコレクタ電極、上面にエミッタ電極とベース電極と
を有し、下面のコレクタ電極はPb−Sn系半田にて各
支持板6〜9に固着され、各エミッタ電極はAu細線か
ら成る内部リード細線22によって共通の相互接続用導
体板11に接続されている。なお、エミッタ接続用内部
リード細線22は、電流容量を大きくするために、各パ
ワートランジスタチップ1〜4に2本接続されている。
各パワートランジスタチップ1〜4はほぼ一直線上に配
置されているので、相互接続用導体板11もパワートラ
ンジスタチップ1〜4の配列方向に沿って直線状に延び
ている。
The external leads 6a to 10a connected to the support plates 6 to 10, the external leads 11a connected to the interconnecting conductor plate 11, the external leads 12 and 13, not connected to the support plates 6 to 10, 14, 15, 16, 17, 18, 19,
20 are juxtaposed at a 2.54 mm pitch (inch pitch). The monolithic IC chip 5 is fixed to the support plate 10 with Pb-Sn solder, and each electrode on this upper surface is electrically connected to the unconnected external leads 12 to 20 and the connected external leads 10a by the internal lead thin wires 21 made of Au thin wires. It is connected to the. Each of the power transistor chips 1 to 4 has a collector electrode on the lower surface, an emitter electrode and a base electrode on the upper surface, and the collector electrode on the lower surface is fixed to each of the support plates 6 to 9 by Pb-Sn solder. Are connected to the common interconnecting conductor plate 11 by the internal lead wires 22 made of Au wires. Note that two emitter connection thin wires 22 are connected to each of the power transistor chips 1 to 4 in order to increase the current capacity.
Since the power transistor chips 1 to 4 are arranged substantially in a straight line, the interconnecting conductor plate 11 also extends linearly along the direction in which the power transistor chips 1 to 4 are arranged.

【0010】各パワートランジスタチップ1〜4のベー
ス電極はAu細線から成る内部リード細線23によって
外部リード12、13、19、20に接続されている。
外部リード12、13、19、20にはモノリシックI
Cチップが接続されていると共に、パワートランジスタ
チップ1〜4も接続されている。この接続を容易に達成
するために外部リード12、13、19、20は支持板
6、7、8、9に隣接する部分を有するように形成され
ている。従って、外部リード12は、第1の支持板6と
第2の支持板7との間を通り、外部リード20も第3の
支持板8と第4の支持板9との間を通っている。外部リ
ード12、13、19、20は各支持板6〜9に隣接配
置されているので、ベース接続用内部リード細線23は
他の外部リードを飛び越さないように配設されている。
しかし、第2及び第3のパワートランジスタチップ2、
3のエミッタ接続用内部リード細線22は、外部リード
12、20を飛び越すように配設されている。もし、外
部リード12を外部リード7aと13との間に配置し、
外部リード20を外部リード19と外部リード8aとの
間に配置したとすれば、第1〜第4のパワートランジス
タチップ1〜4のすべてのベース接続用内部リード細線
23が外部リードを飛び越すように配設しなければなら
なくなり、飛び越す箇所が4箇所となり、図1のエミッ
タ接続用内部リード細線22の2箇所よりも多くなる。
The base electrodes of the power transistor chips 1 to 4 are connected to the external leads 12, 13, 19, and 20 by internal lead wires 23 made of Au wires.
Monolithic I for external leads 12, 13, 19, 20
The C chip is connected, and the power transistor chips 1 to 4 are also connected. In order to easily achieve this connection, the external leads 12, 13, 19, 20 are formed to have portions adjacent to the support plates 6, 7, 8, 9. Therefore, the external lead 12 passes between the first support plate 6 and the second support plate 7, and the external lead 20 also passes between the third support plate 8 and the fourth support plate 9. . Since the external leads 12, 13, 19, and 20 are disposed adjacent to the support plates 6 to 9, the base connecting internal lead fine wires 23 are disposed so as not to jump over other external leads.
However, the second and third power transistor chips 2,
The third internal lead wire 22 for emitter connection is disposed so as to jump over the external leads 12 and 20. If the external lead 12 is arranged between the external leads 7a and 13,
Assuming that the external lead 20 is disposed between the external lead 19 and the external lead 8a, all the base connecting internal lead fine wires 23 of the first to fourth power transistor chips 1 to 4 jump over the external lead. It is necessary to dispose them, and the number of jumping points is four, which is more than the two points of the emitter connecting internal lead thin wires 22 in FIG.

【0011】各パワートランジスタ及びモノリシックI
Cチップ1〜5、各支持板6〜10、相互接続用導体板
11、各外部リード6a〜11a及び12〜20の一
部、各内部リード細線21〜23は、点線で示す樹脂封
止体24で被覆される。
Each power transistor and monolithic I
The C chips 1 to 5, each of the support plates 6 to 10, the interconnecting conductor plate 11, a part of each of the external leads 6a to 11a and 12 to 20, and each of the internal lead fine wires 21 to 23 are resin-sealed bodies indicated by dotted lines. 24.

【0012】各部を更に詳しく説明すると、各支持板6
〜10、相互接続用導体板11、外部リード12〜20
はCu板を打抜き、これにNi被覆層を設けたリードフ
レームに基づいて得たものであり、各チップ1〜5の固
着部分、各内部リード細線21〜23の接続部に更にA
gメッキ処理を施したものである。
Each part will be described in more detail.
-10, interconnecting conductor plate 11, external leads 12-20
Is obtained based on a lead frame obtained by punching a Cu plate and providing a Ni coating layer on the Cu plate.
g It has been plated.

【0013】相互接続用導体板11はエミッタ接続用内
部リード細線22の接続部に対応する位置に突出部25
をそれぞれ有している。各突出部25は内部リード細線
22が延びる方向に突出しているので、各支持板1〜4
の端面と突出部25の端面との対向間隔が他の部分より
も狭くなっている。第2及び第3の支持板7、8と突出
部25との間に外部リード12、20が介在している。
外部リード12、20の相互接続部12a、20aは支
持板7、8と相互接続用導体板11との間において直線
状に延びているので、外部リード12、20と突出部2
5との対向間隔も他の部分よりも狭くなっている。な
お、樹脂モールド時の樹脂の流れの均一化を図るため
に、外部リード12、20の相互接続部12a、20a
の上側端面と支持板6、9の上側端面とは同一直線上に
位置している。
The conductor plate 11 for interconnection is formed with a projection 25 at a position corresponding to the connection portion of the internal lead wire 22 for emitter connection.
Respectively. Since each protruding portion 25 protrudes in the direction in which the internal lead fine wire 22 extends, each of the support plates 1 to 4
The facing distance between the end face of the projection 25 and the end face of the protruding portion 25 is narrower than the other portions. External leads 12 and 20 are interposed between the second and third support plates 7 and 8 and the protruding portion 25.
Since the interconnecting portions 12a, 20a of the external leads 12, 20 extend linearly between the support plates 7, 8 and the interconnecting conductor plate 11, the interconnecting portions 12a, 20a and the projecting portions 2
Also, the distance between them and 5 is narrower than other portions. In order to equalize the flow of the resin during the resin molding, the interconnections 12a, 20a of the external leads 12, 20 are formed.
And the upper end faces of the support plates 6 and 9 are located on the same straight line.

【0014】図2は図1の第3の支持板8の近傍を拡大
図示するものである。突出部25と支持板8との対向間
隔L5 は相互接続用導体板11の非突出部の下側端面と
支持板8の上側端面との対向間隔L4 よりも小さく設定
され、突出部25と外部リード20の相互接続部20a
との対向間隔L1 も相互接続用導体板11の非突出部と
外部リード20の相互接続部20aとの対向間隔L2 よ
り小さく設定されている。支持板8と相互接続部20a
との対向間隔L3 のすき間、相互接続用導体板11と外
部リード20の相互接続部20aとの間のすき間は樹脂
の通路となる。エミッタ接続用内部リード細線22の下
部の樹脂の通路は突出部25によって狭められている。
このため、樹脂注入圧力の内部リード細線22に対する
影響は少ない。
FIG. 2 is an enlarged view of the vicinity of the third support plate 8 in FIG. The facing distance L5 between the protruding portion 25 and the support plate 8 is set smaller than the facing distance L4 between the lower end surface of the non-protruding portion of the interconnecting conductor plate 11 and the upper end surface of the support plate 8, and Interconnect 20a of lead 20
Is set smaller than the facing distance L2 between the non-projecting portion of the interconnecting conductor plate 11 and the interconnecting portion 20a of the external lead 20. Support plate 8 and interconnect 20a
And a gap between the interconnecting conductor plate 11 and the interconnecting portion 20a of the external lead 20 forms a resin passage. The resin passage below the emitter connecting internal lead fine wire 22 is narrowed by the protruding portion 25.
For this reason, the influence of the resin injection pressure on the internal lead fine wires 22 is small.

【0015】L1 ≦L2 /2、L3 ≦L4 /2の条件を
満足するようにL1 〜L4 を設定すれば、樹脂注入圧力
の内部リード細線22に対する悪影響を有効に低減し、
内部リード細線22の垂れを有効に防止することができ
る。この効果は、リードフレーム加工時に同時に形成さ
れる突出部25によって得られるので、製品コストの上
昇を招かない。
If L1 to L4 are set so as to satisfy the conditions of L1≤L2 / 2 and L3≤L4 / 2, the adverse effect of the resin injection pressure on the internal lead fine wires 22 can be effectively reduced.
The sagging of the internal lead fine wires 22 can be effectively prevented. Since this effect is obtained by the protruding portion 25 formed at the same time as the lead frame processing, the product cost does not increase.

【0016】図3及び図4は上金型26と下金型27と
を使用してエポキシ樹脂を注入して樹脂封止体24をト
ランスファーモールドで形成する時の状態を示す。各チ
ップ1〜5、各支持板6〜10、相互接続用導体板1
1、外部リード12〜20の一部等が収容されていると
共に、放熱板28が収容されているキャビティ(成形空
所)29にゲート30から樹脂を注入すると、矢印31
で示すように樹脂が流れる。ゲート30は上金型26と
下金型27との境界部に設けられている。即ち、ゲート
30は樹脂封止体24の側面に対向する位置に設けられ
ている。相互接続用導体板11に隣接しているゲート3
0から注入された樹脂はエミッタ接続用内部リード細線
22が延びる方向と同一方向に流れる。図3及び図4で
矢印31は樹脂の流れの方向を示すと共にその太さによ
って流れる量を示す。図3に示す如く突出部25が設け
られている場合には、突出部25と外部リード20の相
互接続部20aとの対向間隔が狭いためにこれ等の間の
樹脂の流れが制限され、エミッタ接続用内部リード細線
22に対する悪影響が少なくなる。一方、図4に示す如
く突出部25が設けられていない部分においては相互接
続用導体板11と外部リード20の相互接続部20aと
の対向間隔が十分に広いために、樹脂が良好に流れる。
支持板6〜10の下面側にも空所があるので、樹脂は支
持板6〜10の上面側から下面側へも流れる。樹脂封止
体24における支持板6〜10の下側の樹脂層は放熱を
考慮して上側の樹脂層よりも薄くする必要があるので、
樹脂の流れは下側よりも上側で多い。
FIGS. 3 and 4 show a state in which epoxy resin is injected using the upper mold 26 and the lower mold 27 to form the resin sealing body 24 by transfer molding. Each chip 1-5, each support plate 6-10, interconnecting conductor plate 1
1. When resin is injected from a gate 30 into a cavity (molding space) 29 in which a part of the external leads 12 to 20 are housed and a heat sink 28 is housed, arrows 31
The resin flows as shown by. The gate 30 is provided at a boundary between the upper mold 26 and the lower mold 27. That is, the gate 30 is provided at a position facing the side surface of the resin sealing body 24. Gate 3 adjacent to interconnecting conductor plate 11
The resin injected from zero flows in the same direction as the direction in which the internal lead wires 22 for emitter connection extend. 3 and 4, the arrow 31 indicates the direction of the resin flow and the amount of the resin flow depending on the thickness. When the protruding portion 25 is provided as shown in FIG. 3, the flow of the resin between the protruding portion 25 and the interconnecting portion 20a of the external lead 20 is limited because the opposing interval between the protruding portion 25 and the interconnecting portion 20a is narrow. The adverse effect on the connection internal lead fine wire 22 is reduced. On the other hand, as shown in FIG. 4, in the portion where the protruding portion 25 is not provided, the facing space between the interconnecting conductor plate 11 and the interconnecting portion 20 a of the external lead 20 is sufficiently large, so that the resin flows well.
Since there is a space on the lower surface side of the support plates 6 to 10, the resin also flows from the upper surface side to the lower surface side of the support plates 6 to 10. Since the lower resin layer of the support plates 6 to 10 in the resin sealing body 24 needs to be thinner than the upper resin layer in consideration of heat radiation,
The resin flow is higher on the upper side than on the lower side.

【0017】図5〜図7はエミッタ内部リード細線22
のワイヤボンディングを示す。まず、図5に示すように
キャピラリ32のパイプから送り出されている直径38
μmのAu線33に電気スパーク又は水素炎等でボール
34を形成し、このボール34を約200〜250℃に
加熱されているチップ3上に図6に示す如くキャピラリ
32で押し付ける。この時キャピラリ32には超音波振
動を加える。これにより、Au線33の第1のボンディ
ングが達成される。
FIGS. 5 to 7 show the fine lead wires 22 inside the emitter.
2 shows wire bonding. First, as shown in FIG.
A ball 34 is formed on the Au wire 33 of μm by electric spark or hydrogen flame, and the ball 34 is pressed on the chip 3 heated to about 200 to 250 ° C. by the capillary 32 as shown in FIG. At this time, ultrasonic vibration is applied to the capillary 32. Thereby, the first bonding of the Au wire 33 is achieved.

【0018】次に、キャピラリ32を真上に移動して大
きく引き回した後に図7に示す如く相互接続用導体板1
1上に移動し、超音波振動を加えながらAu線33をキ
ャピラリ32で相互接続用導体板11に押し付ける。A
u線33は超音波振動によって部分的に溶融し、第2の
ボンディングが達成される。しかる後、キャピラリ32
を押し付けたままAu線33を引き上げてAu線33を
切断する。これにより、エミッタ接続用内部リード細線
22が得られる。
Next, after the capillary 32 is moved right above and drawn around largely, as shown in FIG.
Then, the Au wire 33 is pressed against the interconnecting conductor plate 11 by the capillary 32 while applying ultrasonic vibration. A
The u-line 33 is partially melted by the ultrasonic vibration, and the second bonding is achieved. After a while, capillary 32
Is pressed, the Au wire 33 is pulled up, and the Au wire 33 is cut. As a result, a thin internal lead wire 22 for connecting the emitter is obtained.

【0019】図5〜図7に示すワイヤボンディング方法
は、狭義にはネイルヘッドボンディングとステッチボン
ディングとの組み合わせであり、広義にはネイルヘッド
ボンディングに属する方法である。チップ3に対して狭
義のネイルヘッドボンディングで内部リード細線22を
ボンディングし、相互接続用導体板11に狭義のステッ
チボンディングを行うと、図7から明らかな如く、ステ
ッチボンディング側において内部リード細線22の高さ
が低くなり、外部リード20の相互接続部20aに内部
リード細線22が接触しやすくなる。しかし、本実施例
では突出部25によって樹脂の流れを制限しているの
で、内部リード細線22の垂れによる接触が防止され
る。
The wire bonding method shown in FIGS. 5 to 7 is a combination of nail head bonding and stitch bonding in a narrow sense, and is a method belonging to nail head bonding in a broad sense. When the internal lead fine wires 22 are bonded to the chip 3 by nail head bonding in a narrow sense and stitch bonding is performed in a narrow sense on the interconnecting conductor plate 11, as shown in FIG. The height is reduced, and the inner lead fine wires 22 are more likely to come into contact with the interconnecting portions 20a of the outer leads 20. However, in this embodiment, since the flow of the resin is restricted by the protruding portions 25, the contact due to the drooping of the internal lead fine wires 22 is prevented.

【0020】図2〜図7では第3のパワートランジスタ
チップ3に対する内部リード細線22の接続について述
べたが、第2のパワートランジスタチップ2に対する内
部リード細線22の接続、及び第1及び第4のパワート
ランジスタチップ1、4に対する内部リード細線22の
接続も同様に行われ、同様な作用効果が得られる。
In FIGS. 2 to 7, the connection of the internal lead wires 22 to the third power transistor chip 3 has been described. However, the connection of the internal lead wires 22 to the second power transistor chip 2, and the first and fourth power transistor chips 3. The connection of the internal lead wires 22 to the power transistor chips 1 and 4 is performed in the same manner, and the same operation and effect can be obtained.

【0021】[0021]

【変形例】本発明は上述の実施例に限定されるものでな
く、例えば次の変形が可能なものである。 (1) 図8及び図9に示す如く突出部25の先端にプ
レス加工によって立上り部分25aを設けてもよい。立
上り部分25aは内部リード細線22が接触しても差し
支えない部分であるから、ここで内部リード細線22の
垂れを防止することができる。また、樹脂の流れがこの
立上り部25aで阻止されるために、下方へ流れ込む樹
脂を制限することができ、内部リード細線22の垂れの
防止効果が大きくなる。なお、立上り部25aを図9に
おいて右から左に進むに従って徐々に高くなるように形
成し、樹脂の流れの上方向の力を強め、内部リード細線
22の垂れを防いでもよい。 (2) 内部リード細線21、22、23はAu以外の
Au合金、Cu、Cu合金線等でもよい。 (3) 内部リード細線22の一端をチップ1〜5にボ
ンディングせずに、支持板6〜10、又は回路基板上の
電極にボンディングする場合にも適用可能である。 (4) 相互接続用導体板11の突出部25を基準にし
て一方の側の端面と他方の側の端面とが一直線上に位置
しない場合にも適用可能である。 (5) 支持板1〜4と導体板11との間に接続部12
a、20aが介在するしないに関係なく、本発明を適用
することができる。
[Modifications] The present invention is not limited to the above-described embodiment, and for example, the following modifications are possible. (1) As shown in FIG. 8 and FIG. 9, a rising portion 25a may be provided at the tip of the protruding portion 25 by press working. Since the rising portion 25a is a portion that may be in contact with the internal lead fine wire 22, it is possible to prevent the internal lead fine wire 22 from sagging here. Further, since the flow of the resin is blocked by the rising portions 25a, the resin flowing down can be restricted, and the effect of preventing the internal lead fine wires 22 from drooping increases. Note that the rising portion 25a may be formed so as to gradually increase from right to left in FIG. 9 to increase the upward force of the resin flow and prevent the internal lead fine wires 22 from sagging. (2) The inner lead wires 21, 22, and 23 may be made of Au alloy other than Au, Cu, Cu alloy wire, or the like. (3) The present invention can also be applied to a case where one end of the internal lead fine wire 22 is bonded to the support plates 6 to 10 or the electrodes on the circuit board without bonding to the chips 1 to 5. (4) The present invention can also be applied to a case where the end face on one side and the end face on the other side are not located on a straight line with respect to the protruding portion 25 of the interconnection conductor plate 11. (5) Connection part 12 between support plates 1-4 and conductor plate 11
The present invention can be applied irrespective of whether or not a and 20a are interposed.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施例に係わる樹脂封止型混成集積回
路を示す平面図である。
FIG. 1 is a plan view showing a resin-sealed hybrid integrated circuit according to an embodiment of the present invention.

【図2】図1の一部を示す拡大平面図である。FIG. 2 is an enlarged plan view showing a part of FIG.

【図3】図1のA−A線に対応する部分のモールド時の
状態を示す断面図である。
FIG. 3 is a cross-sectional view showing a state at the time of molding of a portion corresponding to line AA in FIG. 1;

【図4】図1のB−B線に対応する部分のモールド時の
状態を示す断面図である。
FIG. 4 is a cross-sectional view showing a state at the time of molding of a portion corresponding to line BB in FIG. 1;

【図5】ワイヤボンディング方法を説明するための断面
図である。
FIG. 5 is a cross-sectional view for explaining a wire bonding method.

【図6】ボンディング工程を示す断面図である。FIG. 6 is a sectional view showing a bonding step.

【図7】ボンディング工程を示す断面図である。FIG. 7 is a sectional view showing a bonding step.

【図8】変形例の突出部及びその近傍を示す平面図であ
る。
FIG. 8 is a plan view showing a protrusion and its vicinity in a modified example.

【図9】変形例の突出部及びその近傍を示す断面図であ
る。
FIG. 9 is a cross-sectional view showing a protruding portion and its vicinity in a modified example.

【符号の説明】[Explanation of symbols]

1〜4 トランジスタチップ 5 ICチップ 6〜10 支持板 11 相互接続用導体板 23 内部リード細線 25 突出部 1-4 Transistor chip 5 IC chip 6-10 Support plate 11 Interconnecting conductor plate 23 Internal lead thin wire 25 Projection

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 回路素子と、 一方の主面で前記回路素子を支持し、且つ直線状に延び
る端面を有している導電性支持板と、 前記支持板の前記端面に対して平行に延びる端面を有し
ている接続用導体板(11)と、 前記回路素子又は前記支持板と前記導体板(11)とを
電気的に接続し、前記支持板の前記端面及び前記導体板
(11)の前記端面上を通るように配設されている内部
リード細線(22)とを有し、且つ前記支持板の前記端
面と前記導体板(11)の前記端面との間隔が部分的に
狭くなるように突出している突出部(25)が前記導体
板(11)に設けられ、前記突出部(25)の突出方向
が前記内部リード細線(22)の延びる方向と実質的に
同一とされ、前記内部リード細線(22)が前記突出部
(25)の先端上を通るように前記突出部(25)の位
置が決められている組立体を用意する工程と、 前記組立体を成形用型(26、27)に入れ、前記突出
部(25)側から前記回路素子に向かう方向性を有して
いると共に前記内部リード細線(22)の延びる方向と
同一の方向性を有して成形空所(29)に絶縁性の樹脂
を注入して前記回路素子、前記支持板の一方の主面及び
他方の主面、前記導体板(11)の少なくとも一部、前
記内部リード細線(22)を被覆する樹脂封止体(2
4)を形成する工程とを含む樹脂封止型回路装置の製造
方法。
1. A circuit element; a conductive support plate having one main surface supporting the circuit element and having a linearly extending end face; and extending parallel to the end face of the support plate. The connection conductor plate (11) having an end surface, the circuit element or the support plate and the conductor plate (11) are electrically connected, and the end surface of the support plate and the conductor plate (11) are connected. And an inner lead thin wire (22) disposed so as to pass over the end face of the support plate, and a gap between the end face of the support plate and the end face of the conductor plate (11) is partially reduced. The protruding portion (25) is provided on the conductor plate (11), and the protruding direction of the protruding portion (25) is substantially the same as the extending direction of the thin internal lead (22). The inner lead wire (22) passes over the tip of the protrusion (25) Preparing an assembly in which the position of the protruding portion (25) is determined, and placing the assembly in a molding die (26, 27), and heading toward the circuit element from the protruding portion (25) side. Insulating resin is injected into the molding cavity (29) having a direction and having the same direction as the direction in which the internal lead thin wires (22) extend, and the circuit element and the support plate are formed. One main surface and the other main surface, at least a part of the conductor plate (11), and a resin sealing body (2) covering the internal lead fine wires (22).
And 4) forming a resin-sealed circuit device.
JP6309978A 1994-11-18 1994-11-18 Method for manufacturing resin-sealed circuit device Expired - Lifetime JP2601228B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6309978A JP2601228B2 (en) 1994-11-18 1994-11-18 Method for manufacturing resin-sealed circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6309978A JP2601228B2 (en) 1994-11-18 1994-11-18 Method for manufacturing resin-sealed circuit device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP62090429A Division JPH0754841B2 (en) 1987-04-13 1987-04-13 Insulator-sealed circuit device

Publications (2)

Publication Number Publication Date
JPH07283356A JPH07283356A (en) 1995-10-27
JP2601228B2 true JP2601228B2 (en) 1997-04-16

Family

ID=17999669

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6309978A Expired - Lifetime JP2601228B2 (en) 1994-11-18 1994-11-18 Method for manufacturing resin-sealed circuit device

Country Status (1)

Country Link
JP (1) JP2601228B2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69637809D1 (en) * 1996-11-28 2009-02-26 Mitsubishi Electric Corp SEMICONDUCTOR DEVICE
JP3737673B2 (en) * 2000-05-23 2006-01-18 株式会社ルネサステクノロジ Semiconductor device
JP4610283B2 (en) * 2004-09-30 2011-01-12 三洋電機株式会社 Semiconductor device
US9947613B2 (en) 2014-11-07 2018-04-17 Mitsubishi Electric Corporation Power semiconductor device and method for manufacturing the same

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