JP2598653B2 - Frequency-voltage conversion circuit - Google Patents

Frequency-voltage conversion circuit

Info

Publication number
JP2598653B2
JP2598653B2 JP62272865A JP27286587A JP2598653B2 JP 2598653 B2 JP2598653 B2 JP 2598653B2 JP 62272865 A JP62272865 A JP 62272865A JP 27286587 A JP27286587 A JP 27286587A JP 2598653 B2 JP2598653 B2 JP 2598653B2
Authority
JP
Japan
Prior art keywords
frequency
frequency signal
output
voltage
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP62272865A
Other languages
Japanese (ja)
Other versions
JPH01115177A (en
Inventor
幸三 後藤
Original Assignee
株式会社長野計器製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社長野計器製作所 filed Critical 株式会社長野計器製作所
Priority to JP62272865A priority Critical patent/JP2598653B2/en
Publication of JPH01115177A publication Critical patent/JPH01115177A/en
Application granted granted Critical
Publication of JP2598653B2 publication Critical patent/JP2598653B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Measurement Of Current Or Voltage (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は高周波信号に対してバイアス電圧を自己発生
する半導体デバイスを利用した周波数−電圧変換回路に
関する。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency-voltage conversion circuit using a semiconductor device that generates a bias voltage for a high-frequency signal by itself.

〔背景技術〕(Background technology)

p形半導体やn形半導体を利用したデバイスは各種知
られており、整流作用を呈するダイオード、増幅作用を
呈するトランジスタ等の代表的なデバイスをはじめ、p
形とn形の接合体を逆バイアスした際に生じる接合容量
を積極的に利用し、電圧により接合容量が変化する現象
によって電圧−静電容量変換作用を呈する可変容量ダイ
オード等も知られている。
Various devices using a p-type semiconductor or an n-type semiconductor are known, including typical devices such as a diode exhibiting a rectifying action, a transistor exhibiting an amplifying action, and the like.
There is also known a variable capacitance diode or the like which positively utilizes a junction capacitance generated when a reverse bias is applied to a junction between the n-type and the n-type, and exhibits a voltage-capacitance conversion action by a phenomenon in which the junction capacitance is changed by a voltage. .

〔発明の構成〕[Configuration of the invention]

本発明は新規な半導体デバイス1を利用した周波数−
電圧変換回路の提供を目的とするもので、n形又はp形
の半導体部2と、所定幅離間し、半導体部2の表面に点
接触する先端を尖頭形に形成した一対の電極部3,4と、
入力と出力に共通の共通導通部5とを有し、かつ一方の
電極部4と共通導通部5間を抵抗Rsにより接続又は絶縁
した半導体デバイス1を備えるとともに、この半導体デ
バイス1における他方の電極部3を高周波信号Siが入力
する入力端子6とし、かつ一方の電極部4に高周波信号
Soのバイアス電圧を検出するバイアス量検出回路12を接
続してなることを特徴とする。
The present invention relates to a frequency using the novel semiconductor device 1-
It is intended to provide a voltage conversion circuit, and is provided with a pair of electrode portions 3 which are spaced apart from the n-type or p-type semiconductor portion 2 by a predetermined width and have point-shaped tips which are in point contact with the surface of the semiconductor portion 2. , 4 and
The semiconductor device 1 has a common conducting portion 5 common to input and output, and has one electrode portion 4 and the common conducting portion 5 connected or insulated by a resistor Rs, and the other electrode of the semiconductor device 1. The part 3 is an input terminal 6 to which the high-frequency signal Si is input, and the high-frequency signal is
It is characterized in that a bias amount detection circuit 12 for detecting the bias voltage of So is connected.

この場合、バイアス量検出回路12は、一方の電極部4
から出力する高周波信号Soの正電圧側を検波する正電圧
検波回路13と、一方の電極部4から出力する高周波信号
Soの負電圧側を検波する負電圧検波回路14と、各検波回
路13と14の直流出力のレベルを比較して、その偏差を得
る比較回路15を備える。
In this case, the bias amount detection circuit 12 is connected to the one electrode unit 4
Voltage detection circuit 13 that detects the positive voltage side of the high-frequency signal So output from the
There is provided a negative voltage detection circuit 14 for detecting the negative voltage side of So, and a comparison circuit 15 for comparing the DC output levels of the detection circuits 13 and 14 and obtaining the deviation.

〔発明の作用〕[Function of the invention]

次に、本発明の作用について説明する。 Next, the operation of the present invention will be described.

今、入力端子6と共通導通部5に第3図(a)に示す
ような直流分が0レベルの高周波信号Siを供給すれば、
電極部3と4間の浮遊静電容量Csと半導体部2の並列回
路,同回路と直列の抵抗Rs,さらに半導体部2と共通導
通部5間における浮遊静電容量を介して電流が流れる。
そして、電極部4の電位、つまり、電極部4と共通導通
部5から得る高周波信号Soに対して第3図(b)又は
(c)のように負側のバイアス電圧又は正側のバイアス
電圧が生ずる。バイアス電圧の大きさは高周波信号Siの
周波数の大きさに対応するとともに、バイアス電圧の極
性は半導体部2の伝導形で決定され、p形の場合は負
側、n形の場合は正側となる。
Now, as shown in FIG. 3 (a), if a high-frequency signal Si having a DC component of 0 level is supplied to the input terminal 6 and the common conducting portion 5,
A current flows through the floating capacitance Cs between the electrode units 3 and 4, the parallel circuit of the semiconductor unit 2, the resistor Rs in series with the circuit, and the floating capacitance between the semiconductor unit 2 and the common conducting unit 5.
Then, as shown in FIG. 3B or 3C, a negative bias voltage or a positive bias voltage is applied to the potential of the electrode unit 4, that is, the high frequency signal So obtained from the electrode unit 4 and the common conducting unit 5. Occurs. The magnitude of the bias voltage corresponds to the magnitude of the frequency of the high-frequency signal Si, and the polarity of the bias voltage is determined by the conduction type of the semiconductor unit 2. The p-type has a negative side, and the n-type has a positive side. Become.

〔実 施 例〕〔Example〕

以下には本発明に係る好適な実施例を図面に基づき詳
細に説明する。
Hereinafter, a preferred embodiment according to the present invention will be described in detail with reference to the drawings.

第1図は本発明に係る周波数−電圧変換回路に用いる
半導体デバイスの構成図、第2図は同周波数−電圧変換
回路のブロック回路図、第3図は第2図中各部における
信号の波形図である。
FIG. 1 is a configuration diagram of a semiconductor device used in a frequency-to-voltage conversion circuit according to the present invention, FIG. 2 is a block circuit diagram of the frequency-to-voltage conversion circuit, and FIG. 3 is a waveform diagram of signals at various parts in FIG. It is.

まず、第1図を参照して半導体デバイス1の構成につ
いて説明する。
First, the configuration of the semiconductor device 1 will be described with reference to FIG.

同図中、2は半導体部である。半導体部2はp形又は
n形の半導体を選択してチップ状に形成する。また、
3、4は同一形状に形成できる一対の電極部である。各
電極部3、4は先端を尖頭形に形成し、略平行に対峙さ
せるとともに、前記半導体2の表面に点接触させる。こ
の場合、電極部3、4の間隔は所定の浮遊静電容量Csを
保有するように設定する。
In the figure, reference numeral 2 denotes a semiconductor unit. The semiconductor portion 2 is formed in a chip shape by selecting a p-type or n-type semiconductor. Also,
Reference numerals 3 and 4 denote a pair of electrode portions which can be formed in the same shape. Each of the electrode portions 3 and 4 has a pointed tip, is substantially parallel to each other, and is brought into point contact with the surface of the semiconductor 2. In this case, the interval between the electrode units 3 and 4 is set so as to have a predetermined floating capacitance Cs.

また、電極部3は入力端子6に接続するとともに、電
極部4は出力端子7に接続し、さらに共通導通部5を設
けて、共通端子8とする。
The electrode section 3 is connected to the input terminal 6, the electrode section 4 is connected to the output terminal 7, and the common conducting section 5 is further provided to form the common terminal 8.

一方、電極部4と共通導通部5は抵抗Rsを介して接続
する。なお、抵抗Rsは必要に応じて内蔵するもので、デ
バイス1の使用時に外付けしてもよい。
On the other hand, the electrode section 4 and the common conducting section 5 are connected via a resistor Rs. Note that the resistor Rs is built in as necessary, and may be externally attached when the device 1 is used.

次に、このように構成した半導体デバイス1を用いた
周波数−電圧変換回路について、第2図を参照して説明
する。
Next, a frequency-voltage conversion circuit using the semiconductor device 1 configured as described above will be described with reference to FIG.

同図において、11は出力周波数を例えば1〜5MHz程度
の高周波帯域に設定した発振回路であり、半導体デバイ
ス1の入力端子6に接続する。一方、半導体デバイス1
の出力端子7にはバイアス量検出回路12を接続する。同
回路12は、出力端子7に対し順方向接続したダイオード
によって同端子7の電位、つまり、抵抗Rsの端子電圧に
おける正電圧側を検波する正電圧検波回路13、同じく逆
方向接続したダイオードによって負電圧側を検波する負
電圧検波回路14、各検波回路13と14の直流出力のレベル
を比較して、その偏差を得る比較回路15を備えている。
なお、共通端子8は接地する。
In the figure, reference numeral 11 denotes an oscillation circuit whose output frequency is set to a high frequency band of, for example, about 1 to 5 MHz, and is connected to the input terminal 6 of the semiconductor device 1. On the other hand, semiconductor device 1
Is connected to a bias amount detecting circuit 12. The circuit 12 includes a positive voltage detection circuit 13 that detects the potential of the output terminal 7 by a diode connected in the forward direction to the output terminal 7, that is, a positive voltage side of the terminal voltage of the resistor Rs. It comprises a negative voltage detection circuit 14 for detecting the voltage side, and a comparison circuit 15 for comparing the level of the DC output of each of the detection circuits 13 and 14 and obtaining the deviation.
The common terminal 8 is grounded.

以上の回路構成において、半導体デバイス1の入力端
子6に発振回路11から第3図(a)に示すようなバイア
ス電圧が0レベルの高周波信号Siを印加すれば、電極部
間の浮遊静電容量Csと点接触を介して接続される半導体
部2の並列回路に所定の電流が流れる。
In the above circuit configuration, if a high-frequency signal Si having a zero-level bias voltage as shown in FIG. 3A is applied from the oscillation circuit 11 to the input terminal 6 of the semiconductor device 1, the floating electrostatic capacitance between the electrode portions is obtained. A predetermined current flows through a parallel circuit of the semiconductor unit 2 connected to Cs via point contact.

ところで、ここで注目すべき点は半導体部2がp形の
ときは第3図(b)のように出力端子7の高周波信号So
は負側へシフト、つまり、負側のバイアス電圧が発生
し、また、n形のときは同図(c)のように正側へシフ
ト、つまり正側のバイアス電圧が発生する点である。こ
の現象は電極部間の浮遊静電容量Csと半導体部2が点接
触を介して並列接続されるとともに、半導体部2と共通
導通部5間の浮遊静電容量を介して電流が流れることに
起因する固有の現象であると考えられる。
By the way, it should be noted here that when the semiconductor section 2 is of the p-type, the high-frequency signal So of the output terminal 7 as shown in FIG.
Is a point that shifts to the negative side, that is, a negative bias voltage is generated, and in the case of the n-type, it shifts to the positive side, that is, a positive bias voltage is generated as shown in FIG. This phenomenon is caused by the fact that the stray capacitance Cs between the electrode portions and the semiconductor portion 2 are connected in parallel via point contact, and a current flows through the stray capacitance between the semiconductor portion 2 and the common conducting portion 5. It is considered to be an inherent phenomenon caused by the above.

この結果、同図(b)のような電位となるp形の場合
には高周波信号Soの負電圧が大きくなるため、正電圧検
波回路13の直流出力+Vaに対して負電圧検波回路14の直
流出力−Vbの方が大きくなる(Vb>Va)。よって、比較
回路15において両出力を比較すれば負側の偏差を得る。
他方、同図(c)のような電位となるn形の場合には高
周波信号Soの正電圧が大きくなるため、正電圧検波回路
13の直流出力+Vaが負電圧検波回路14の直流出力Vbより
も大きくなる(Va>Vb)。よって、比較回路15において
両出力を比較すれば正側の偏差を得る。
As a result, the negative voltage of the high-frequency signal So becomes large in the case of the p-type having the potential as shown in FIG. 3B, so that the DC output of the negative voltage detection circuit 14 is smaller than the DC output + Va of the positive voltage detection circuit 13. The output −Vb becomes larger (Vb> Va). Therefore, if both outputs are compared in the comparison circuit 15, a deviation on the negative side is obtained.
On the other hand, in the case of the n-type having the potential as shown in FIG.
The DC output + Va of 13 becomes larger than the DC output Vb of the negative voltage detection circuit 14 (Va> Vb). Therefore, if both outputs are compared in the comparison circuit 15, a deviation on the positive side is obtained.

そして、発生するバイアスは浮遊静電容量Csに起因し
て生ずるため、高周波信号Siの周波数を可変すれば同バ
イアスの大きさも変化し、以て、周波数−電圧変換回路
として機能させることができる。
Since the generated bias is caused by the stray capacitance Cs, if the frequency of the high-frequency signal Si is varied, the magnitude of the bias also changes, so that it can function as a frequency-voltage conversion circuit.

なお、半導体デバイス1の特性を一例として次に示
す。
The characteristics of the semiconductor device 1 are shown below as an example.

以上、実施例について詳細に説明したが本発明はこの
ような実施例に限定されるものではなく、細部の構成、
素材、数値等において、本発明の要旨を逸脱しない範囲
で任意に変更実施できる。
As described above, the embodiments have been described in detail, but the present invention is not limited to such embodiments, and detailed configurations,
Materials and numerical values can be arbitrarily changed and implemented without departing from the gist of the present invention.

〔発明の効果〕〔The invention's effect〕

このように、本発明に係る周波数−電圧変換回路は、
n形又はp形の半導体部と、所定幅離間し、前記半導体
部の表面に点接触する先端を尖頭形に形成した一対の電
極部と、入力と出力に共通の共通導通部とを有し、かつ
一方の電極部と共通導通部間に抵抗を接続又は絶縁した
半導体デバイスを備えるとともに、この半導体デバイス
における他方の電極部を高周波信号が入力する入力端子
とし、かつ一方の電極部に高周波信号のバイアス電圧を
検出するバイアス量検出回路を接続してなるため、高周
波信号入力の周波数の大きさに対応したバイアス電圧を
発生させることができるとともに、しかも、その極性を
半導体部の伝導形によって異ならせることができるた
め、簡易な回路で低コストに実施できるという顕著な効
果を奏する。
Thus, the frequency-voltage conversion circuit according to the present invention includes:
It has a pair of electrode portions, each having a predetermined width and spaced apart from the n-type or p-type semiconductor portion by a predetermined width and having a pointed tip at a point contact with the surface of the semiconductor portion, and a common conducting portion common to input and output. And a semiconductor device in which a resistor is connected or insulated between one of the electrode portions and the common conducting portion, and the other electrode portion of the semiconductor device is used as an input terminal for inputting a high-frequency signal. Since a bias amount detection circuit that detects the bias voltage of the signal is connected, a bias voltage corresponding to the magnitude of the frequency of the high-frequency signal input can be generated, and the polarity of the bias voltage depends on the conduction type of the semiconductor portion. Since they can be different, there is a remarkable effect that the circuit can be implemented with a simple circuit at low cost.

【図面の簡単な説明】[Brief description of the drawings]

第1図:本発明に係る周波数−電圧変換回路に用いる半
導体デバイスの構成図、 第2図:同周波数−電圧変換回路のブロック回路図、 第3図:第2図中各部における信号の波形図。 尚図面中、 1:半導体デバイス、2:半導体部 3,4:電極部、5:共通導通部 6:入力端子、Si:高周波信号 So:高周波信号、12:バイアス量検出回路 13:正電圧検波回路、14:負電圧検波回路 15:比較回路
FIG. 1 is a configuration diagram of a semiconductor device used in the frequency-voltage conversion circuit according to the present invention. FIG. 2 is a block circuit diagram of the frequency-voltage conversion circuit. FIG. 3 is a waveform diagram of signals at various parts in FIG. . In the drawings, 1: semiconductor device, 2: semiconductor part 3, 4: electrode part, 5: common conduction part 6: input terminal, Si: high frequency signal So: high frequency signal, 12: bias amount detection circuit 13: positive voltage detection Circuit, 14: Negative voltage detection circuit 15: Comparison circuit

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】n形又はp形の半導体部(2)と、所定幅
離間し、前記半導体部(2)の表面に点接触する先端を
尖頭形に形成した一対の電極部(3),(4)と、入力
と出力に共通の共通導通部(5)とを有し、かつ一方の
電極部(4)と共通導通部(5)間を抵抗(Rs)により
接続又は絶縁した半導体デバイス(1)を備えるととも
に、この半導体デバイス(1)における他方の電極部
(3)を高周波信号(Si)が入力する入力端子6とし、
かつ一方の電極部(4)に高周波信号(So)のバイアス
電圧を検出するバイアス量検出回路(12)を接続してな
ることを特徴とする周波数−電圧変換回路。
1. A pair of electrode portions (3) spaced apart from an n-type or p-type semiconductor portion (2) by a predetermined width and having a pointed tip at a point contact with the surface of the semiconductor portion (2). , (4) and a common conducting part (5) common to the input and the output, and one electrode part (4) and the common conducting part (5) are connected or insulated by a resistor (Rs). A semiconductor device (1), and the other electrode (3) of the semiconductor device (1) is used as an input terminal 6 for inputting a high-frequency signal (Si);
A frequency-voltage conversion circuit comprising a bias amount detection circuit (12) for detecting a bias voltage of a high-frequency signal (So) connected to one of the electrode portions (4).
【請求項2】前記バイアス量検出回路(12)は、一方の
電極部(4)から出力する高周波信号(So)の正電圧側
を検波する正電圧検波回路(13)と、一方の電極部
(4)から出力する高周波信号(So)の負電圧側を検波
する負電圧検波回路(14)と、各検波回路(13)と(1
4)の直流出力のレベルを比較して、その偏差を得る比
較回路(15)を備えることを特徴とする特許請求の範囲
第1項記載の周波数−電圧変換回路。
2. A positive voltage detection circuit (13) for detecting a positive voltage side of a high-frequency signal (So) output from one electrode section (4); A negative voltage detection circuit (14) for detecting the negative voltage side of the high frequency signal (So) output from (4), and each detection circuit (13) and (1)
2. The frequency-voltage conversion circuit according to claim 1, further comprising a comparison circuit for comparing the level of the DC output of 4) and obtaining the deviation.
JP62272865A 1987-10-28 1987-10-28 Frequency-voltage conversion circuit Expired - Fee Related JP2598653B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62272865A JP2598653B2 (en) 1987-10-28 1987-10-28 Frequency-voltage conversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62272865A JP2598653B2 (en) 1987-10-28 1987-10-28 Frequency-voltage conversion circuit

Publications (2)

Publication Number Publication Date
JPH01115177A JPH01115177A (en) 1989-05-08
JP2598653B2 true JP2598653B2 (en) 1997-04-09

Family

ID=17519844

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62272865A Expired - Fee Related JP2598653B2 (en) 1987-10-28 1987-10-28 Frequency-voltage conversion circuit

Country Status (1)

Country Link
JP (1) JP2598653B2 (en)

Also Published As

Publication number Publication date
JPH01115177A (en) 1989-05-08

Similar Documents

Publication Publication Date Title
JP2598653B2 (en) Frequency-voltage conversion circuit
US4006417A (en) Tachometer
US3822385A (en) Noise pulse rejection circuit
JPH05207749A (en) Inverter unit
GB813307A (en) Transistor integrating circuits
US6483356B2 (en) Sinusoidal signal generating circuit providing small phase difference with respect to reference signal and apparatus for driving oscillating element with circuit
US2902655A (en) Transistor oscillators
US4831343A (en) Crystal clock generator having fifty percent duty cycle
JPH02194343A (en) Semiconductor stress sensor
US9184734B1 (en) Voltage or current controlled current-feedback operational-amplifier based multivibrator
US4042834A (en) Frequency doubler circuit
JPS5915527B2 (en) monostable multivibrator
US3757142A (en) Combined threshold detector and multivibrator circuit
JPH02152311A (en) Agc circuit
US7046016B2 (en) Potential fixing device, potential fixing method, and capacitance measuring instrument
JPH07120935B2 (en) Switching circuit
JP3552870B2 (en) Oscillation detection circuit
JP2721749B2 (en) Impedance binarization circuit
KR900002359Y1 (en) Pulse delay circuit
JP2606706B2 (en) Semiconductor checker
Basu et al. A symmetric triangle-square waveform generator using a single constant current source
JPH0829281A (en) Capacitive sensor circuit
JPH0216042B2 (en)
JPH0946192A (en) Waveform shaping circuit
JPS598968B2 (en) Level discrimination circuit

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees