JP2595592B2 - Digital-to-analog conversion circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital / analog (hereinafter, referred to as D / A) conversion circuit used as a MOS integrated circuit.

2. Description of the Related Art In recent years, digitalization of all electronic devices has been progressing, and D / A has become a contact point between analog processing and digital processing.
Conversion is becoming increasingly important. Then, the D / A conversion circuit has been used for IC / LSI.

Hereinafter, a conventional constant current source addition type D / A conversion circuit will be described.

FIG. 2 shows a conventional 6-bit (bi
t) is a block diagram of a D / A conversion circuit. Reference numeral 1 denotes a constant current source basic circuit, and reference numeral 20 denotes a constant current source basic circuit network in which eight constant current source basic circuits 1 are arranged in a matrix structure, eight in each of the X-axis and Y-axis directions. 21 is an X decoder and 22 is a Y decoder. The X decoder 21 and the Y decoder 22 generate a decode signal for switching the constant current source basic circuit 1 to an output from the 6-bit data in synchronization with the clock 2.
The clock generation circuit 23 generates clocks 1 and 2 of the normal phase and the negative phase by dividing the frequency of the clock by the external clock. Reference numeral 9 denotes a resistor inserted between the output terminal and the high potential (hereinafter, referred to as VDD) side of the power supply. 12 is an output transistor bias circuit,
Reference numeral 11 denotes a circuit (hereinafter, a current source bias circuit) that controls a current flowing through the first MOS transistor 6 (hereinafter, the first transistor 6) in the constant current source basic circuit 1.

FIG. 3 is an internal connection diagram of a constant current source basic circuit, a current source bias circuit, and an output transistor bias circuit.
In FIG. 3, reference numeral 1 denotes a constant current source basic circuit, 2 denotes a control circuit for generating a control signal for switching the constant current source to an output in accordance with the decode signals of the X and Y decoders, and 3 denotes the control signal and a clock. 1 is a transfer gate for synchronization, 4 is an inverter, 5-7,10,101
Reference numerals 106 denote MOS transistors, in particular, 6 denotes a first transistor which functions as a constant current source.

The operation of the constant current source addition type D / A converter configured as described above will be described below.

First, from FIG. 2, a digital amount for one bit corresponds to one constant current source. The 6-bit digital data is converted by the XY decoder into analog data by switching the constant current sources to the output side by the number corresponding to the binary data.

Next, the operation of the constant current source basic circuit is as shown in FIG. 3, where the X decoder 21 and the Y decoder 22 generate the decode signals DYn to DXm (n, m = 0 to 7) latched by the clock 2, and It is input to the control circuit 2 in the basic circuit 1. And when the control output signal is high level “H”,
The transistor 5 is turned off, and the first transistor 6 serving as a constant current source is switched to the output through the transistor 7. Here, the transistor 6 has a current mirror structure with the transistor 10, and the transistor 6 has a terminal
By making the current flowing from IBIAS to the transistor 10 constant, a current corresponding to the transistor size ratio flows through the transistor 6. Next, when the control output signal is at the low level “L”, the transistor 5 is turned on, and the current flows to the transistor 6 through the transistor 5. Then the potential of the contact A becomes high, the voltage of the terminal CV and the node A is smaller than the threshold voltage V _T of the transistor 7, the transistor 7 is turned off. Thus, the current source is disconnected from the output.

By the above series of operations, each constant current source basic circuit synchronizes with the clock 1 in accordance with the decode signal, connects or disconnects the constant current source to the output, and performs D / A conversion.

Problems to be Solved by the Invention However, in the above-mentioned conventional configuration, in the constant current source basic circuit, the clock 1 and the digital signal lines such as DYn and DXm and the analog signal line coupled to the current source bias circuit 11 are connected. In circuits that handle high-frequency digital signals of several megahertz or higher when there is slight capacitive coupling, digital noise is applied to the terminal IBIAS, which fluctuates the constant current value and generates glitches in the D / A conversion output. Had a problem.

The present invention solves the above-described conventional problem, and provides a constant current source addition type D / A conversion circuit that can stabilize an analog bias voltage and eliminate glitches during D / A conversion. Aim.

Means for Solving the Problems In order to achieve this object, a D / A conversion circuit according to the present invention is a MOS transistor which operates as a constant current source of each constant current source basic circuit.
It has a configuration in which a capacitor is provided between the gate and the source of the transistor.

Action This configuration, the gate voltage V _G of the MOS transistors constituting the constant current source △ by V _N fluctuate capacitor between also the gate-source, the source voltage △ V _N changes. Therefore, the current I _{DS in} the saturation region of a normal MOS transistor is expressed by I
_In the equation of _DS1 ∝ (V _GS −V _T ) ² = _sub (V _Gsub −V _Ssub ) −V _T ｝ ² , V _Gsub is V _Gsub + △ V _N , and V _Ssub is V _Ssub + △ V _N. varies, (wherein, V _GS is the gate-source voltage of the transistor, V _S is the source voltage, V _T is the threshold _{voltage) I 'DS1 α {(V} Gsub + △ V N) - (V Ssub + △ V _N ) −V _T ｝
² = ｛V _Gsub- V _Ssub- V _T ｝ ² = (V _GS- V _T ) ²
Therefore, I _DS1 = I ′ _DS1 .

Therefore, even if the bias voltage of the constant current source fluctuates due to digital noise, glitches can be suppressed in the output.

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows a constant current source basic circuit 1 of a constant current addition type D / A conversion circuit of the present invention, and a first MOS in the constant current source basic circuit 1.
1 shows a current source bias circuit 11 and a output transistor bias circuit 12, which are circuits for controlling a current flowing through a transistor 6 (hereinafter, a first transistor 6).

In FIG. 1, reference numeral 8 denotes a capacitor inserted between the gate and the source of the first transistor 6.

First, the portion other than the constant current source basic circuit section has the same configuration as the conventional example, and the operation is the same. Therefore, in the constant current source basic circuit 1 of FIG. 1, the DYn, DYm (n, m = 0) of the control circuit is transmitted from the X decoder and the Y decoder.
7) When a decode signal is input to the terminal, a control signal of "H" or "L" is input from the control circuit 2 to the transfer gate 3. Next, the control signal is synchronized by the clock 1 and enters the inverter 4 to turn on and off the MOS transistor 5. On the other hand, the first transistor 6 has a current mirror configuration with the second transistor 10. Therefore, with respect to the current I _IBIAS flowing into the terminal IBIAS, for transistor size W ₂ / L ₂ of the second transistor 10, the ratio of transistor size W ₁ / L ₁ of the first transistor _{6 (W 1 / L 1)} / ( The current I ₁ in proportion to W ₂ / L ₂ ) = {((W ₁ / L ₁ ) / (W ₂ / L ₂ )} × I _IBIAS is the first
It flows to the transistor 6. When the transistor 5 is turned on, the current I ₁ of the first transistor 6 becomes
To the first transistor 6 through Conversely, when the transistor 5 is turned off, the gate-source voltage V _{GS of} the transistor 7 = V _CV −V _A (where V _CV is the voltage of the terminal CV, V _A
V _GS > V _T (V _T is the threshold voltage of the transistor), and the transistor turns on, and the current I ₁ flows through the transistor 7 and flows to the output. By the above series of operations, D /
A conversion is performed.

As described above, according to the present embodiment, in a current mirror configuration, by inserting a capacitor between the gate of the first transistor 6 paired with each constant current source transistor and the source, digital noise can be reduced at the terminal IBIAS. Even when riding on the node, the fluctuation of the gate-source voltage V _GS of the first transistor 6 is eliminated, and therefore, the constant current I ₁ is kept constant, so that the glitch at the time of D / A conversion of this type of configuration can be obtained. Occurrence can be eliminated.

Here, it should be noted that the first transistor 6
In the diffusion process of forming a parasitic capacitance, between the source and the gate, a parasitic capacitance is generated due to the penetration of the source / drain diffusion immediately below the gate, but the parasitic capacitance alone can sufficiently suppress the gate-source voltage due to digital noise. be able to. This is because both the constant current value and the parasitic capacitance are basically proportional to the channel width (W ₁ ) of the first transistor.

Therefore, in the present invention, apart from this parasitic capacitance, a capacitance other than the parasitic capacitance caused by the intrusion of the source / drain diffusion is intentionally added between the gate and the source to improve the performance of the constant current.

In this embodiment, the D / A conversion circuit having a 6-bit configuration is described, but the invention can be applied to all the D / A conversion circuits driven by a constant current source. Further, although the present embodiment is based on an N-channel MOS transistor, the present invention can be similarly applied to a P-channel MOS transistor circuit and a CMOS transistor circuit which form a constant current.

The D / A conversion circuit of the constant current source addition type according to the present invention provides a constant current source by providing a capacitor between the gate and the source of the MOS transistor operating as a constant current source. The fluctuation of the gate-source voltage V _GS can be eliminated, and the occurrence of glitch during D / A conversion can be eliminated. Furthermore, when implementing a D / A conversion circuit in a high-density integrated circuit (LSI), it is possible to obtain the effect of minimizing the effect of digital noise on the constant current source even if the integration degree is high. The D / A conversion circuit of the constant current source addition method can be realized.

[Brief description of the drawings]

FIG. 1 is a basic circuit diagram of a constant current source according to an embodiment of the present invention,
FIG. 2 is a block diagram of a D / A conversion circuit, and FIG. 3 is a basic circuit diagram of a conventional constant current source. 1 ... constant current source basic circuit, 2 ... control circuit, 3
... Transfer gates, 5-7,10,101-106 ... MOS transistors, 4 ... Inverters, 8 ... Capacitors, 9
... Resistance, 11 Current source bias circuit, 12 Output transistor bias circuit, 21 X decoder, 22 Y decoder, 23 Clock generation circuit.

Claims (1)

(57) [Claims] 1. A digital / analog conversion circuit in which a plurality of constant current source basic circuits selected by a decode circuit are arranged in a matrix structure, wherein each of the plurality of constant current source basic circuits has a first MOS transistor; The first MOS
A capacitor is inserted between the gate and the source of the transistor, the gate of the first MOS transistor is connected to a circuit that controls the current flowing through the first MOS transistor, and for the constant current source basic circuit selected by the decoding circuit, A drain of the first MOS transistor serving as an output of the constant current source basic circuit.
Analog conversion circuit.