JP2590757B2 - Bipolar transistor - Google Patents

Bipolar transistor

Info

Publication number
JP2590757B2
JP2590757B2 JP6263752A JP26375294A JP2590757B2 JP 2590757 B2 JP2590757 B2 JP 2590757B2 JP 6263752 A JP6263752 A JP 6263752A JP 26375294 A JP26375294 A JP 26375294A JP 2590757 B2 JP2590757 B2 JP 2590757B2
Authority
JP
Japan
Prior art keywords
bipolar transistor
center
base electrode
emitter
emitter fingers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP6263752A
Other languages
Japanese (ja)
Other versions
JPH08124936A (en
Inventor
典夫 後藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP6263752A priority Critical patent/JP2590757B2/en
Publication of JPH08124936A publication Critical patent/JPH08124936A/en
Application granted granted Critical
Publication of JP2590757B2 publication Critical patent/JP2590757B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41708Emitter or collector electrodes for bipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692Surface layout

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bipolar Transistors (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明はバイポーラトランジスタ
に関し、特に高出力用バイポーラトランジスタに関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bipolar transistor, and more particularly to a high-output bipolar transistor.

【0002】[0002]

【従来の技術】従来の高出力用パイポーラトランジスタ
は、図3に示すように、エミッタを複数の短冊状のエミ
ッタフィンガー1に分割して等間隔に配列し、各エミッ
タフィンガー1の両側から引出されたベース電極2を互
に接続して中央部のベース電極パッド3に接続し、隣合
う各ベース電極2の間から引出されたコレクタ電極4を
ベース電極2と反対側で相互に接続しコレクタ電極パッ
ド5に接続して構成され、単一の大きなエミッタで構成
される場合よりも熱が分散して放熱される利点がある。
2. Description of the Related Art In a conventional high output bipolar transistor, as shown in FIG. 3, an emitter is divided into a plurality of strip-shaped emitter fingers 1 and arranged at equal intervals. The base electrodes 2 connected to each other are connected to a base electrode pad 3 at a central portion, and a collector electrode 4 drawn out between adjacent base electrodes 2 is connected to each other on the opposite side to the base electrode 2 to form a collector. It is connected to the electrode pad 5 and has the advantage that the heat is dispersed and dissipated as compared with the case where the single large emitter is used.

【0003】[0003]

【発明が解決しようとする課題】この従来のバイポーラ
トランジスタは、動作状態における中央部に近いフィン
ガーが隣接のフィンガーからの発熱の重なり合いに対応
する放熱が不充分となり、そのため、中央部が高温にな
ってバイポーラトランジスタの特性から中央部のフィン
ガーの電流が周辺部より増加して発熱量も増加し、それ
がまた中央部の温度を上げるという正帰還が発生する。
その結果、トランジスタの大部分のフィンガーが正常で
あっても、中央部のフィンガーから破壊が始まって短絡
し、トランジスタの全体が不良となってしまう場合があ
り、これがトランジスタの出力の最大値を制限するとい
う問題点があった。
In this conventional bipolar transistor, the finger near the center in the operating state has insufficient heat radiation corresponding to the overlap of the heat generated from the adjacent fingers, so that the temperature of the center becomes high. Due to the characteristics of the bipolar transistor, the current of the finger at the center increases from the periphery and the amount of heat generated also increases, which causes a positive feedback that the temperature at the center also increases.
As a result, even if most fingers of a transistor are normal, destruction may start at the center finger and cause a short circuit, causing the entire transistor to be defective, which limits the maximum output of the transistor. There was a problem of doing.

【0004】本発明の目的は、中央部の発熱を抑制して
トランジスタの出力を向上させたバイポーラトランジス
タを提供することにある。
[0004] It is an object of the present invention to provide a bipolar transistor in which the heat generated in the central portion is suppressed to improve the output of the transistor.

【0005】[0005]

【課題を解決するための手段】本発明のバイポーラトラ
ンジスタは、横列に配列した複数の短冊状のエミッタフ
ィンガーと、前記エミッタフィンガーそれぞれの両側に
沿って引出され且つ相互間を接続した櫛形のベース電極
と、隣合う前記ベース電極の間から前記ベース電極と反
対側に引出され且つ相互間を接続したコレクタ電極とを
有するバイポーラトランジスタにおいて、前記エミッタ
フィンガー相互の間隔が周辺部から中央部に向けて順次
広くして形成される。
A bipolar transistor according to the present invention has a plurality of strip-shaped emitter fingers arranged in a row, and a comb-shaped base electrode extending along both sides of each of the emitter fingers and connected to each other. And a collector electrode drawn out to the opposite side of the base electrode from between the adjacent base electrodes, and having a collector electrode connected to each other, wherein the interval between the emitter fingers is sequentially increased from a peripheral portion toward a central portion. Widely formed.

【0006】[0006]

【実施例】次に、本発明について図面を参照して説明す
る。
Next, the present invention will be described with reference to the drawings.

【0007】図1は本発明の一実施例を示す模式的平面
図である。
FIG. 1 is a schematic plan view showing one embodiment of the present invention.

【0008】図1に示すように、同一形状、同一寸法で
形成された短冊状のエミッタフィンガー1が周辺部では
狭く、周辺部から中央部に向けて順次間隔を広げて横列
に配列される。このエミッタフィンガー1のそれぞれの
長辺の両側に沿って引出され、且つ相互間を接続して形
成した櫛形のベース電極2の中央部にベース電極パッド
3を接続し、隣合うベース電極2の間からベース電極2
とは反対側に引出され、且つ相互間を接続して形成した
櫛形のコレクタ電極4の中央部にコレクタ電極パッド5
を接続して構成され、中央部のエミッタフィンガー1の
間隔が周辺部のエミッタフィンガー1の間隔よりも広く
形成されているため、中央部の接合温度を低く抑えて局
部的な温度上昇を防止し、その結果図2に示すように、
従来例に比べて消費電力に対する接合温度を低く抑える
ことでき、同じ接合温度のとき、消費電力を大幅に増加
できる利点がある。
As shown in FIG. 1, strip-shaped emitter fingers 1 formed in the same shape and the same dimensions are narrow in the peripheral portion, and are arranged in rows from the peripheral portion to the central portion so as to gradually increase the interval. A base electrode pad 3 is connected to the center of a comb-shaped base electrode 2 which is extended along both sides of each long side of the emitter finger 1 and is formed by connecting the base fingers to each other. From base electrode 2
A collector electrode pad 5 is provided at the center of a comb-shaped collector electrode 4 which is drawn out to the opposite side and connected to each other.
Since the distance between the emitter fingers 1 at the center is wider than the distance between the emitter fingers 1 at the periphery, the junction temperature at the center is kept low to prevent a local temperature rise. As a result, as shown in FIG.
There is an advantage that the junction temperature with respect to the power consumption can be suppressed lower than in the conventional example, and the power consumption can be greatly increased at the same junction temperature.

【0009】[0009]

【発明の効果】以上説明したように本発明は、エミッタ
フィンガーの中央部の間隔を周辺部から順次広げて配列
することにより、中央部の局部的な接合温度上昇や電極
の集中を防ぐことができ、デバイスの出力を高めること
ができるという効果を有する。
As described above, according to the present invention, by increasing the distance between the center portions of the emitter fingers sequentially from the peripheral portion and arranging them, it is possible to prevent a local increase in junction temperature in the center portion and concentration of electrodes. This has the effect of increasing the output of the device.

【0010】[0010]

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例を示す模式的平面図。FIG. 1 is a schematic plan view showing one embodiment of the present invention.

【図2】本発明と従来例の消費電力に対する接合温度の
関係を示す図。
FIG. 2 is a diagram showing the relationship between the power consumption and the junction temperature of the present invention and the conventional example.

【図3】従来のバイポーラトランジスタの例を示す模式
的平面図。
FIG. 3 is a schematic plan view showing an example of a conventional bipolar transistor.

【符号の説明】[Explanation of symbols]

1 エミッタフィンガー 2 ベース電極 3 ベース電極パッド 4 コレクタ電極 5 コレクタ電極パッド DESCRIPTION OF SYMBOLS 1 Emitter finger 2 Base electrode 3 Base electrode pad 4 Collector electrode 5 Collector electrode pad

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 横列に配列した複数の短冊状のエミッタ
フィンガーと、前記エミッタフィンガーそれぞれの両側
に沿って引出され且つ相互間を接続した櫛形のベース電
極と、隣合う前記ベース電極の間から前記ベース電極と
反対側に引出され且つ相互間を接続したコレクタ電極と
を有するバイポーラトランジスタにおいて、前記エミッ
タフィンガー相互の間隔が周辺部から中央部に向けて順
次広くして形成されたことを特徴とするバイポーラトラ
ンジスタ。
A plurality of strip-shaped emitter fingers arranged in a row, a comb-shaped base electrode extending along both sides of each of the emitter fingers and connected to each other; In a bipolar transistor having a base electrode and a collector electrode drawn out on the opposite side and connected to each other, the interval between the emitter fingers is formed so as to gradually increase from a peripheral portion toward a central portion. Bipolar transistor.
JP6263752A 1994-10-27 1994-10-27 Bipolar transistor Expired - Fee Related JP2590757B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6263752A JP2590757B2 (en) 1994-10-27 1994-10-27 Bipolar transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6263752A JP2590757B2 (en) 1994-10-27 1994-10-27 Bipolar transistor

Publications (2)

Publication Number Publication Date
JPH08124936A JPH08124936A (en) 1996-05-17
JP2590757B2 true JP2590757B2 (en) 1997-03-12

Family

ID=17393804

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6263752A Expired - Fee Related JP2590757B2 (en) 1994-10-27 1994-10-27 Bipolar transistor

Country Status (1)

Country Link
JP (1) JP2590757B2 (en)

Also Published As

Publication number Publication date
JPH08124936A (en) 1996-05-17

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