JP2584872B2 - Information processing device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing apparatus, and more particularly, to an information processing apparatus to which a display device using a ferroelectric liquid crystal having a memory property is applied.

[Conventional technology]

Conventionally, a refresh scan type CRT has been mainly used as a computer terminal display device, and a vector scan type CRT having a part of memory has been used for large and high definition display for CAD. After displaying the vector scan type CRT once, since the next screen is not updated until the screen is erased, cursor movement display, movement display of icons such as mouse as information display from pointing device,
Edit display of characters and sentences (insert, delete, move, copy, etc.)
It is not suitable for real-time man-machine interface display devices. On the other hand, in the case of the refresh scan CRT, flickering (screen flickering)
To prevent this, a refresh cycle of 60 Hz or more is required as the frame frequency, and a non-interlace method is used to improve the visibility of the moving display of the information in the screen (moving display of the icons) (TV Is a 60Hz field frequency and a 30Hz frame frequency in the interlaced system for the purpose of simplifying the video display and drive control system.) Therefore, the higher the display resolution, the larger the display device, the higher the power required, the larger the drive control, and the higher the cost.

In recent years, flat display panels have appeared
This is due to the inconvenience of increasing the size and power of CRTs.

Currently, there are several types of flat display panels. For example, a high time-division driving method (STN) for twisted nematic liquid crystal, a method (N
TN) or plasma display method, the image data transfer method uses the same method as CRT, and the screen update method uses a non-interlace method with a frame frequency of 60 Hz or more. 40 total lines
No large flat display panels from 0 to 480 or more than 1000 have been obtained. The reason for this is that these display panels do not have a memory property in terms of the driving principle, so that a refresh cycle with a frame frequency of 60 Hz or more is necessary in order to prevent flicker, and therefore, one horizontal scanning time is 10 to 50 μsec. The following short time was reached, and good contrast could not be obtained.

The ferroelectric liquid crystal display device can display a large screen and a high-definition display far exceeding the above-mentioned display device, but because of its low frame frequency drive, the display of the man-machine interface as described above is performed. In order to cope with the device, a partial rewriting scanning (scanning only scanning lines in a rewriting area) system utilizing a memory property is required. This partial rewriting scanning method is described in, for example, U.S. Pat.
No. 561 discloses it.

In particular, in the ferroelectric liquid crystal display device, the above-described partial rewriting scanning method is suitable for moving display of a mouse or a cursor, scroll display of a mouch window, etc., but partial rewriting of two different areas at the same time. Since scanning cannot be performed, in the case of partial rewriting scanning by specifying the start address and end address for partial rewriting scanning, it is not possible to move and display a mouse, cursor, or the like during multi-window scroll display. There was a point. For example, assuming the scroll display of the window and the display of the pointing device, and assuming the movement, first, a partial rewrite scan request for the window scroll display is generated, and the display panel starts the partial rewrite scan of the scroll. Even if the pointing device subsequently moves, the rewriting scan of the pointing device cannot be started until the scanning of the last scanning line address of the window is completed, so that it depends on the size of the window (the number of partial rewriting scanning lines). As a result, the pointing device moves discontinuously, and the moving display is obviously unnatural.

[Summary of the Invention]

An object of the present invention is to provide a ferroelectric liquid crystal display device in which, when a two-line simultaneous driving waveform is used to increase the frame frequency, the graphics microprocessor changes the transfer scanning line address in the partial rewriting routine. An object of the present invention is to provide an information processing apparatus capable of preventing continuous transfer of image information of the same scanning line address by monitoring.

First, the present invention confirms that the scan line address immediately before the branch, which is saved at the beginning of the partial rewrite routine, is different from the scan line address for starting the partial write. At this time,
Since the line scanning drive is used, if the scanning line address is the same, the means for decrementing the partial rewriting start scanning line address by one line. Confirm that the address and the scanning line address of the partial rewriting final line are different,
If this is not the case, the information processing apparatus is characterized by having means for adding one line to the partial rewriting final line.

〔Example〕

FIG. 1 is a block diagram of a ferroelectric liquid crystal display device 101 and a graphics controller 102 provided on a main device such as a personal computer as a supply source of display information. FIG. 2 is a communication timing chart of image information. The display panel 103 has a scanning electrode 1120
This is one in which 1280 information electrodes are arranged in a matrix and ferroelectric liquid crystal is sealed in two glass plates that have been subjected to alignment treatment. The scanning lines are scanning line driving circuits 104, and the information lines are information. Each is connected to the line drive circuit 105.

Hereinafter, the operation will be described with reference to the drawings. The graphics controller 102 converts the scanning line address information for specifying the scanning electrodes and the image information (PD0 to PD3) on the scanning line specified by the address information into the display driving circuit (the scanning line driving circuit 104 (Composed by the line drive circuit 105). In this embodiment, since the image information having the scanning line address information and the display information is transferred through the same transmission line, the two types of information must be distinguished. The signal for this identification is AH / DL,
When the H / DL signal is at Hi level, it indicates scanning line address information, and when it is at Lo level, it indicates display information.

The scanning line address information is extracted from the image information transferred as the image information PD0 to PD3 on the drive control circuit 111 side in the liquid crystal display device 101, and then scanned in accordance with the timing for driving the designated scanning line. Output to the line drive circuit 104. This scanning line address information is stored in the scanning line driving circuit 10.
4 is input to the decoder 106, and through the decoder 106,
The designated scanning electrodes of the display panel 103 are driven by the scanning signal generation circuit 107. On the other hand, the display information is guided to a shift register 108 in the information line drive circuit 105, and is shifted by a transfer clock in units of four pixels. Shift register 108
When the shift for one scanning line in the horizontal direction is completed, 1280
The display information for the pixels is transferred to the attached line memory 109, stored for one horizontal scanning period, and output from the information signal generation circuit 110 to each information electrode as a display information signal.

In this embodiment, the driving of the display panel 103 in the liquid crystal display device 101 and the generation of the scanning line address information and the display information in the graphics controller 102 are performed asynchronously. /Ten
It is necessary to synchronize 2). The signal that governs this synchronization is SYN
C, which is generated by the drive control circuit 111 in the liquid crystal display device 101 every horizontal scanning period. The graphics controller 102 constantly monitors the SYNC signal, and when the SYNC signal is
If the level is at the level, the image information is transferred. Conversely, if the level is at the Hi level, the transfer is not performed after the transfer of the image information for one horizontal scanning line is completed. That is, in FIG. 2, the the graphics controller 102 side SYNC signal when detecting that became L ₀ level, immediately the AH / DL signal to Hi level to start the transfer of image information of one horizontal scan line . Liquid crystal display
The drive control circuit 111 in 101 sets the SYNC signal to Hi level during the image information transfer period. After the writing to the display panel 103 is completed after a predetermined one horizontal scanning period, the drive control circuit (FLCD controller) 111 returns the SYNC signal to the Lo level again, and can receive the image information of the next scanning line.

FIG. 3 shows a display screen 3 when a request for displaying a plurality of display information in the multi-window and multi-task system is made.

Display request 31; Mouse font moves diagonally smoothly Display request 32; A window is selected as the active screen and the part that overlaps the previous window that was already displayed is displayed in front Display request 33; Input from the keyboard Display request 34; move the previous character that was already displayed (character movement in the direction of the arrow) display request 35; change the display of the overlap area display request 36; display a non-active window display request 37 ; Scroll display of non-active window display request 38; full scan display Table 1 below shows the display priorities of the graphic events corresponding to the display requests 31 to 38 described above.

In the table, "partial rewriting" is a driving method for scanning only the scanning lines in the partial rewriting area, and "multi-field refresh" is multi-interlaced scanning by N fields (N = 2, 4, 8,... ^2N ). This is a one-frame scanning method (a driving method described in Japanese Patent Application No. 62-287272). The “display priority” is a rank specified in advance.
It focuses on the operability of the machine interface, with the graphic event 31 (mouse movement display) as the highest priority display at the highest level, followed by the graphic events 33, 34, 37 and 38 in order of priority. . or,
"Drawing operation" represents an internal drawing operation of the graphics processor.

The moving display of the mouse has the highest display priority because the purpose of the pointing device must reflect the intention of the operator most quickly (in real time) on the computer. The next most important thing is character input from the keyboard, which is usually buffered, and although real-time is high, it is lower than a mouse. The screen update in the window as a result of this key input does not necessarily have to be at the same time as the key input, and the key input line has a higher priority. The display relationship between scrolling in other windows and the overlap area changes depending on the system settings, but this can naturally occur under multi-tasking.Here, line scrolling under the active window is performed. It has been said that.

In the present invention, the screen display control program shown in FIG. 4 receives screen display requests 31 to 38 from the outside through a communication procedure shown in the drawing, and sends the request to the ferroelectric liquid crystal display device (FLCD) 101 shown in FIG. Has the function of controlling the transfer of image information. When at least one request for rewriting the already displayed content is made at least once, the screen display control program assigns the rewriting area and the drawing processing to the VRAM (image information storage memory) necessary for the rewriting to the display priority. The image information to be sent to the display device 101 can be selected and transferred while synchronizing with the display device 101.

The communication procedure shown in FIG. 4 includes a window manager.
41 and Operating System (OS) 42 are used. Operating System (OS) 42
Microsoft "MS-DOS" (trade name), "XENIX" (trade name), AT & T "UNIX" (trade name) and Microsoft "OS / 2" (trade name) Used as the window manager 41, "MS-Windows ver 1.03" or "ver2.0" (both trade names) of Microsoft Corporation, USA "OS / 2 Presentaion Manager" (trade name) of Microsoft Corporation The public domain “X-Window” and the US-based Digital Equipment Corporation “DEC-Window” (trade name) are used. The illustrated event imilator 43 is 1
"MS-DOS &MS-Windows" and "UNIX &X-Windo"
w "etc. can be used.

The partial rewriting used in the present invention scans only the scanning lines in the partial rewriting area. Since the FLCD has a memory property, high-speed partial rewriting can be performed. In the present invention, it is assumed that it is not instantaneous that the computer system rewrites display information at high speed within the entire screen. For example, information from a pointing device (= mouse or the like) may be displayed at a speed of 30 Hz or less, and at a speed higher than that, human eyes cannot follow. Similarly, the smooth scrolling (scrolling per line), which requires the fastest display of the display, is not noticeable if it is too fast. Rather, in practice, scrolling is often performed not in units of lines but in units of characters or blocks. In computer systems, scrolling is often used when editing programs and texts, and its purpose is to display from one line to another rather than a smooth scrolling that can be slippery. There is no practical problem.

If the mouse font is composed of 32 × 32 dots, and if the partial rewriting scan for the FLCD is driven in a non-interlace manner, this can be simply calculated as follows.
z response speed is possible.

On the other hand, performing line scrolling at 10 lines / sec corresponds to a non-interlaced screen update speed of a frequency of 10 Hz.
Strictly speaking, flicker should occur at a frequency of 10 Hz. However, since the entire screen moves on a line-by-line basis, a change in information is recognized more greatly than flickering, so that there is no actual problem. Therefore, when scrolling in units of rows, the number of scanning lines that can be non-interlaced driven is [Equation 2] (1/10 Hz) / 100 μsec = 1000 (lines).

The present invention employs a data format as image information having scanning line address information shown in FIGS. 1 and 2 and communication synchronization means by a SYNC signal, thereby enabling partial rewriting on the graphics controller side described below. This realizes a liquid crystal display device based on a scanning algorithm.

The generation of the image information is performed by the graphics controller 102 of the main unit, and is transferred to the display panel 103 according to the signal transfer means shown in FIGS. 1 and 2.
The graphics controller 102 manages and communicates image information between the host CPU 113 and the liquid crystal display device 101 with a CPU (Central Processing Unit, hereinafter abbreviated as GCPU 112) and a VRAM (memory for storing image information) 114 as cores. The control method of the present invention is mainly realized on the graphics controller 102.

FIG. 9 is an algorithm for partial rewriting at the time of simultaneous driving of two lines in the present invention. The display information (pointing device, pop-up menu, etc.) that needs to be partially rewritten for the ferroelectric liquid crystal display device is registered in the graphics microprocessor in advance, and the host CP
When it is determined that partial rewriting is necessary for the information from U, the process proceeds to a partial rewriting routine.

In the partial rewriting routine, first, as information for returning to the normal refresh routine, the scanning line address immediately before branching and the remaining number of scanning lines are saved in a register prepared in advance in the graphics microprocessor.
Next, the image information accompanying the partial rewriting is stored in the VRAM, but since the host CPU is allowed to access the VRAM only via the graphics microprocessor, the image information accompanying the partial rewriting is stored in the VRAM. The storage start address and storage area are managed by the graphics microprocessor. After storing the image information in VRAM,
Access to the VRAM is prohibited, and then it is confirmed that the previously saved scan line address is different from the partial write start scan line address. At this time, since simultaneous two-line scanning drive is performed, if the scanning line address is the same, the partial rewriting start scanning line address is decremented by one line so that information on the same line is not continuously transferred. Then, transfer of image information to the ferroelectric liquid crystal display device is started,
Further, while monitoring for a partial rewrite request having a higher priority, the image information accompanying the partial rewrite is transferred line by line in a manner conforming to the signal transfer method. At the end of the image transfer accompanying the partial rewrite, it is confirmed that the scan line address saved at the start of the partial write is different from the scan line address of the last line of the partial rewrite, VRAM access is permitted, and the partial rewrite routine is terminated.

In this manner, in the ferroelectric liquid crystal display device, when the two-line simultaneous driving waveform is used to increase the frame frequency, the graphics microprocessor monitors the transfer scanning line address in the partial rewriting routine. By doing so, it is possible to prevent the image information of the same scanning line address from being transferred continuously.

FIG. 11 shows a multi-window display screen 110 according to the present invention.
This is an example. Window 1 is a screen that displays a certain tally result in a pie chart. Window 2 is a screen representing the tabulated result of window 1 in a table. Window 3 is a screen that represents the total result of window 1 in a bar graph. Window 4 is a screen during document creation. Reference numeral 5 denotes a pointing device mouse. It is assumed that the windows 1 to 3 are stationary and the mouse 5 moves while performing document editing operations such as smooth scrolling, insertion / deletion of words / phrases, and area movement in the window 4. The movement of the mouse becomes image information that requires partial rewriting scanning for the ferroelectric liquid crystal display device 101. By the way, when 1120 full screens are scanned in one horizontal scanning time = 80 μs, the frame frequency becomes about 10 Hz, and cannot follow normal mouse movement (≧ 30 Hz) at all. By applying the algorithm of the present invention and setting the priority of the partial rewriting by moving the mouse higher than the document editing work in the window 4, even if the mouse moves during the scrolling operation, the mouse part is immediately changed. At this time, the program can branch to the rewrite routine and enter the mouse write operation.
The time required for branching to the mouse partial rewriting routine is at most one horizontal scanning time. For example, assuming that the font size of the mouse is 32 × 32 dots as clarified by the above equation (1), the time required to write the mouse on the display panel 103 is 3.2 msec, and the scroll operation is stopped during this time. That is, the time is sufficiently short and there is almost no influence on the scroll speed. After writing the mouse, the process returns to the partial rewriting scan of the window 4. When the mouse moves again, the process immediately branches to the partial rewriting routine of the mouse and enters the mouse writing operation. As described above, in a display driven by a low frame frequency having a memory characteristic such as the ferroelectric liquid crystal display device 101, the priority of the partial rewriting is set in such a manner that the movement of the pointing device (mouse) is most important. This makes it possible to realize a display function such as multi-window multi-task.

FIG. 5 is a block diagram of the graphics controller 102, FIG. 6 is a block diagram of the digital interface, and FIGS. 7 and 8 are timing charts of information transfer.

The major difference between the graphics controller 102 used in the present invention and the conventional graphics controller 102 is that the graphics processor 501 has its own dedicated system memory 502,
It not only manages the RAM 503 and ROM 504, but also executes and manages drawing commands to the RAM 503, and can independently program information transfer from the digital interface 505 to the FLCD controller and management of the FLCD driving method. .

First, the digital interface 505 in FIG.
The driving circuits 104 and 10 of the display panel 103 are / are external synchronization signals from the controller 111.
While synchronizing with 5, 4bits / clock (cloc
k = data transfer clock) and the information in the VRAM is sent. FIG. 7 shows the timing when the FLCD rewrites the entire screen, and the parameters in the figure are the same as those in the timing chart at the time of information transfer in FIG. First, the transfer of the image information for one line starts after the state shown in FIG. 8 becomes active (in this case, low level).
Is set to low by the FLCD controller 111 and panel 103
Indicates the information request of the side. The information request on the panel 103 side is received by the graphics processor 501 shown in FIG. 5, and is processed therein at the timing shown in FIG. In the timing chart shown in FIG. 8, the information request on the panel 103 side is transmitted from an external video clock (CLKO).
UT) for one cycle (in other words, the low period of VCLK)
(In this case, the VCLK is actually input to the graphics processor 501, and the processor 501 is designed to perform sampling for a low period). Then, after 2.5 clocks of VCLK, the processor 501
The internal horizontal counter HCOUNT is cleared and HC is programmed by programming the parameters HESYNC and HEBLNK in Fig. 7.
Immediately before OUNT = 1, FIGS. 7 and 8 become disabled (high), and in the circuit of FIG. 6, after half clock of VCLK, as shown in FIG.
igh), and after a further half clock, 4.5 clocks after sampling, the next one line of data is transferred from the VRAM to the FLCD controller 111 every 4 bits.

As shown in the lower right part of FIG. 8, the line information to be transferred in this case is obtained by first sending scanning line address information (ie, corresponding to the scanning line No.) every 4 bits, Is sent for one line. FLCD in this case
The controller 111 uses the AH / DL signal to identify the scanning line address information and the display information. When the AH / DL signal is high, it indicates the scanning line address information, and when it is low, the display information is recognized. Therefore, the FLCD selects a scanning line according to the scanning line address information, and the display information is written.
5 is non-interlaced when the scanning line address information from the graphics controller is transmitted one by one, interlaced when the scanning line address information is increased every other line, and m multi-multiple when the scanning line address information is increased every m lines. The FLCD will be driven interlaced. Therefore, the display driving method can be controlled.

An FLCD generally requires a driving time of about 100 μsec for one scanning line. Suppose now that the driving time for one scan line is 100 μsec.
Assuming that the lowest frequency at which flicker does not occur is 30 Hz, in the non-interlace drive method of this FLCD, [Equation 3] (1/30 Hz) / 100 μsec ≒ 333 (book) In the interlace drive method, [Equation 4] (1 / 30Hz) × 2 / 100μsec ≒ 666 (lines) In the case of m multi-interlace, [Equation 5] is still even when scanning (scanning / driving) a scanning line of (1 / 30Hz) × m / 100μsec ≒ 333 (lines) No flickering occurs as a picture. According to experiments performed by the present inventors, m =
It was confirmed that flicker did not occur even at 32. That is, [Equation 6] (1/30 Hz) × 32/100 μsec ≒ 333 × 32 = 10656
This means that the display panel 103 having (the book) scanning lines can be displayed without generating flicker, and a flat display panel that is not high in the past can be numerically possible.

The “74AS161A”, “74AS74”, and “74AS25” in FIG.
“7”, “74AS878” and “74AS257” each represent an IC number, and the numerical values in the figure each represent a pin number.

In a preferred embodiment of the present invention, non-interlaced scanning is used for both the scroll display and the font display in the window. When displaying a still screen, multi-interlace scanning described below is used. Table 2 below shows the above-described scanning method. .., N} in the table are codes of the scanning electrodes from the top to the bottom of the screen.

FIG. 12 (A) shows the waveform of the drive signal in the liquid crystal element according to one embodiment. FIG. 12 (a) shows the selection signal waveform, and FIGS. 12 (b) and 12 (c) show “white” and “white”. 5 shows an information signal waveform corresponding to black image information. In FIG. (B), the pulse width t _2, the phase control the phase of the voltage value V _5, the pulse width
At t ₃ , the phase of the voltage value −V ₄ is the auxiliary phase. By forming the information signal in such a pulse configuration, defects in image quality such as "flicker" in non-selection can be reduced. The selection signal waveform shown in FIG. 3A includes a pulse width t ₁ , an erasing phase of the voltage value V ₁ , and a pulse width t ₃ , an auxiliary phase of the voltage value V ₃ , that is, a phase for compensating the auxiliary phase of the information signal. Is done.
Here, the voltage value V ₃ is in the range of 0 <V ₃ <V ₁ and | V ₃ | =
| V ₄ | is desirable.

Further, it is preferable that the pixels on the scanning line selected in the erasing phase be simultaneously erased to a black state.

FIG. 13 shows a time-series waveform when a display as shown in FIG. 12 (B) is performed by this driving example.

In the figure, S ₁ to S ₄ is a scanning signal waveform of the scanning signal lines S ₁ to S ₄ of Fig. 12 (B), I ₁ and I ₂ are Fig. 12 (B)
Information signal lines i ₁ and i ₂ of the information signal waveform, and (I ₁ -S ₃₎ and (I ₂ -S ₂₎ composite waveform of the information signal waveform I ₁ and the scanning signal waveform S ₃ and an information signal waveform I ₂ is a composite waveform of the scanning signal waveform S2.

The sequence shown in the figure is preferable because the frame frequency can be set low.

FIG. 14 schematically illustrates an example of a ferroelectric liquid crystal cell. 141a and 141b are substrates (glass plates) coated with a transparent electrode such as In ₂ O ₃ , SnO ₂ or ITO (indium-tein-oxide), between which the liquid crystal molecular layer 142 is perpendicular to the glass surface The liquid crystal of the SmC ^* phase which is oriented likewise is sealed. A line 143 indicated by the sun represents a liquid crystal molecule, and the liquid crystal molecule 143 has a dipole moment (P⊥) 144 in a direction perpendicular to the molecule. Substrate 141a
When a voltage equal to or higher than a certain threshold is applied between the electrodes on the electrodes 141b and 141b, the helical structure of the liquid crystal molecules 143 is released, and the orientation direction of the liquid crystal molecules 143 is changed so that all dipole moments (P⊥) 144 are directed to the electric field direction. be able to. The liquid crystal molecules 143 have an elongated shape, exhibit refractive index anisotropy in the major axis direction and the minor axis direction, and therefore, for example, if a polarizer arranged in a crossed Nicols positional relationship above and below the glass surface is placed. ,
It is easily understood that the liquid crystal optical modulation element whose optical characteristics change depending on the voltage application polarity. Further, when the thickness of the liquid crystal cell is sufficiently reduced (for example, 1 μm), the helical structure of the liquid crystal molecules is released even when no electric field is applied, as shown in FIG.
Takes either the upward (154a) or downward (154b) state. When an electric field Ea or Eb having a different polarity or more than a certain threshold is applied to such a cell for a predetermined period of time as shown in FIG. The orientation is changed, and the liquid crystal molecules are accordingly aligned in one of the first stable state 153a and the second stable state 153b.

There are two advantages of using such a ferroelectric liquid crystal as the optical modulation element. First, the response speed is extremely fast, and second, the orientation of the liquid crystal molecules has a bistable state. The second point will be described with reference to FIG. 15, for example. When an electric field Ea is applied, the liquid crystal molecules are oriented to a first stable state 153a. This state is stable even when the electric field is turned off. When the electric field Eb in the opposite direction is applied, the liquid crystal molecules are brought into the second stable state 15.
Orientation to 3b changes the orientation of the molecule, but it remains in this state even after the electric field is turned off. As long as the applied electric field Ea does not exceed a certain threshold value, each orientation state is maintained. In order to effectively realize such a high response speed and bistability, it is preferable that the cell is as thin as possible, generally 0.5 μm to 20 μm, particularly 1 μm to
5μ is suitable.

As described above, in an information processing apparatus using a ferroelectric liquid crystal display device, when a two-line simultaneous drive waveform is used to speed up a frame frequency, the graphics microprocessor is used in the partial rewriting routine. so,
By monitoring the transfer scanning line address, it is possible to prevent the image information of the same scanning line address from being continuously transferred.

[Effects of the Invention] As described above, according to the present invention, even when some of the scanning signals applied to the plurality of scanning signal electrodes temporally overlap each other, two scans are simultaneously performed on the same scanning signal electrode. Since no signal is applied, the driving waveform is not disturbed.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a ferroelectric liquid crystal display device and a graphics controller, and FIG. 2 is a timing chart of image information communication between the ferroelectric liquid crystal display device and the graphics controller. FIG. 3 is a display screen diagram schematically showing a plurality of graphic events. FIG. 4 is a block diagram of the display control program.
FIG. 5 is a block diagram of a graphics controller used in the present invention, and FIG. 6 is a block diagram of a digital interface. FIG. 7 is an interface timing chart for the display driving device, and FIG.
FIG. 4 is an interface timing chart for an FLCD controller. FIG. 9 is an algorithm for partially rewriting the waveform for simultaneous access of two lines according to the present invention.
FIG. 10 is an explanatory diagram showing data mapping of scanning line address information and display information on VRAM. FIG. 11 is a multi-window display screen diagram. FIG. 12 (A) is a driving waveform diagram used in the present invention, FIG. 12 (B) is a schematic diagram showing a display state of a pixel at that time, and FIG. 13 is a timing chart thereof. FIG. 14 and FIG. 15 are perspective views of a ferroelectric liquid crystal cell.

Claims (4)

(57) [Claims] A display panel in which a scanning signal electrode and an information signal electrode are arranged in a matrix with liquid crystal interposed therebetween; and a scanning signal and a scanning signal of the scanning signal electrode and the information signal electrode, respectively. In an information processing apparatus for applying an information signal to drive the display panel to display image information, a storage unit for storing image information displayed on the display panel, and a scan signal supplied to the scan signal electrode Scanning signal driving means for supplying a scanning signal such that a scanning signal supplied to a predetermined scanning signal electrode is temporally overlapped with a scanning signal applied to another scanning signal electrode; and the storage means Information signal driving means for supplying an information signal to the information signal electrode based on image information for one scanning line of image information stored in A scanning signal electrode for supplying a signal, a determination unit for determining whether or not the scanning signal has been supplied by the immediately preceding scan; and if the determination unit determines that the scanning signal has been supplied, the supply of the scanning signal is suppressed. An information processing apparatus comprising: a control unit. 2. A switching means for switching between a refresh driving mode for sequentially driving the scanning signal electrodes at predetermined intervals and a partial rewriting mode for sequentially driving a predetermined number of the scanning signal electrodes successively, 2. The information processing apparatus according to claim 1, wherein when the mode is switched by the switching unit, the determination is performed by the determination unit. 3. A scanning signal electrode to which a scanning signal is supplied at the start of a partial rewriting is the same as a scanning signal electrode to which a scanning signal was supplied immediately before the scanning signal electrode. 3. The information processing apparatus according to claim 2, wherein partial rewriting is performed from. 4. When a scanning signal electrode to which a scanning signal is supplied at the end of a partial rewriting is the same as a scanning signal electrode to which a scanning signal is supplied immediately thereafter, a scanning signal electrode immediately after the scanning signal electrode. 3. The information processing apparatus according to claim 2, wherein partial rewriting is performed up to.