JP2714053B2 - Information processing device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing apparatus, and more particularly, to an image information processing apparatus suitable for a display device using a ferroelectric liquid crystal having a memory property.

(Prior art)

2. Description of the Related Art Conventionally, a refresh scan type CRT is mainly used as a computer terminal display device, and a vector scan type CRT partially having a memory property is used for a large and high definition display for CAD. After displaying the vector scan type CRT once, the next screen is not updated until the screen is erased, so the cursor movement display, the movement display of icons such as a mouse as information display from a pointing device, characters and text It is not suitable for real-time man-machine interface display devices such as editing display (insertion / deletion / movement / copying etc.). On the other hand, in the case of refresh-scan CRTs, a refresh cycle of 60 Hz or more is required as a frame frequency to prevent flicker (screen flicker), and the visibility of moving information on the screen (moving icons) is displayed. In order to improve the performance, non-interlace method is used (TV has 60Hz field frequency and 30Hz frame frequency in interlace method in terms of moving image display and simplification of drive control system). Therefore, the higher the display resolution, the larger the display device, the higher the power required, the larger the drive control, and the higher the cost.

In recent years, flat display panels have appeared
This is due to the inconvenience of increasing the size and power of CRTs.

Currently, there are several types of flat display panels. For example, a high time-division driving method (STN) for twisted nematic liquid crystal, a method (N
TN) or plasma display method, the image data transfer method uses the same method as CRT, and the screen update method uses a non-interlace method with a frame frequency of 60 Hz or more. 40 total lines
No large flat display panels from 0 to 480 or more than 1000 have been obtained. The reason is that these display panels do not have a memory property in terms of the driving principle, so that a refresh cycle of a frame frequency of 60 Hz or more is required in order to prevent flicker, and therefore, one horizontal scanning time is 10 to 50 μsec or less. , And a good contrast could not be obtained.

The ferroelectric liquid crystal display device can display a large screen and a high-definition display far exceeding the above-mentioned display device, but because of its low frame frequency drive, the display of the man-machine interface as described above is performed. In order to cope with the device, a partial rewriting scanning (scanning only scanning lines in a rewriting area) system utilizing a memory property is required. This partial rewriting scanning method is described in, for example, U.S. Pat.
No. 561 discloses it.

In particular, in the ferroelectric liquid crystal display device, the above-described partial rewriting scanning method is suitable for moving display of a mouse or a cursor, scrolling display of a multi-window, etc., but partial rewriting scanning of two different areas at the same time. In the method of performing partial rewriting scanning by specifying the start address and end address for partial rewriting scanning, it is not possible to move and display the mouse, cursor, etc. during multi-window scroll display. there were.
For example, when the scroll display of the window and the display of the pointing device are given and the movement is assumed,
First, even if a partial rewrite scan request for window scroll display is generated and the pointing device moves after the partial rewrite scan of the display panel is started,
Since the rewriting scan of the pointing device cannot be started until the scanning of the last scan line address of the window is completed, the pointing device moves discontinuously according to the size of the window (the number of partial rewrite scan lines). As a result, there is a problem that the moving display is obviously unnatural.

[Summary of the Invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide an information processing apparatus suitable for displaying a screen while maintaining real-time operability as a man-machine interface of a ferroelectric liquid crystal display device.

Another object of the present invention is to provide an information processing apparatus with improved display quality of font information such as a mouse and a cursor.

According to the present invention, the image information storage memory has a high display priority based on a display priority of a graphic event specified in advance, and the first graphic event information received periodically has a high priority. Prohibits storage of the second graphic event information in the memory, and stores the second graphic event information in the memory when the content of the first graphic event information does not change. And information processing means for controlling the image information storage memory so as to start the transfer of the second graphic event information after the transfer of all the image information based on the first graphic event information is completed. The device has features.

(Detailed description of embodiments of the invention)

FIG. 1 is a block diagram of a ferroelectric liquid crystal display device 101 and a graphics controller 102 provided on a main device such as a personal computer as a supply source of display information. FIG. 2 is a communication timing chart of image information. The display panel 103 has a scanning electrode 1120
This is one in which 1280 information electrodes are arranged in a matrix and ferroelectric liquid crystal is sealed in two glass plates that have been subjected to alignment treatment. The scanning lines are scanning line driving circuits 104, and the information lines are information. Each is connected to the line drive circuit 105.

Hereinafter, the operation will be described according to the screen. The graphics controller 102 converts the scanning line address information for specifying the scanning electrodes and the image information (PD0 to PD3) on the scanning line specified by the address information into the display driving circuit (the scanning line driving circuit 104 (Composed by the line drive circuit 105). In this embodiment, since the image information having the scanning line address information and the display information is transferred through the same transmission line, the two types of information must be distinguished. The signal for this identification is AH / DL,
When the H / DL signal is at Hi level, it indicates scanning line address information, and when it is at Lo level, it indicates display information.

The scanning line address information is extracted from the image information transferred as the image information PD0 to PD3 on the drive control circuit 111 side in the liquid crystal display device 101, and then scanned in accordance with the timing for driving the designated scanning line. Output to the line drive circuit 104. This scanning line address information is stored in the scanning line driving circuit 10.
4 is input to the decoder 106, and the designated scan electrode of the display panel 103 is supplied to the scan signal generation circuit 1 via the decoder 106.
While the display information is driven by the information line drive circuit
The data is guided to a shift register 108 in 105, and is shifted in units of four pixels by a transfer clock. When shift of one scanning line in the horizontal direction is completed in the shift register 108, display information for 1280 pixels is transferred to the line memory 109 provided therewith,
The information is stored during one horizontal scanning period, and is output from the information signal generation circuit 110 to each information electrode as a display information signal.

In this embodiment, the driving of the display panel 103 in the liquid crystal display device 101 and the generation of the scanning line address information and the display information in the graphics controller 102 are performed asynchronously. /Ten
It is necessary to synchronize 2). The signal that governs this synchronization is SYN
C, which is generated by the drive control circuit 111 in the liquid crystal display device 101 every horizontal scanning period. The graphics controller 102 constantly monitors the SYNC signal, and when the SYNC signal is
If the level is at the level, the image information is transferred. Conversely, if the level is at the Hi level, the transfer is not performed after the transfer of the image information for one horizontal scanning line is completed. That is, in FIG. 2, when the graphics controller 102 detects that the SYNC signal has become Lo level, it immediately sets the AH / DL signal to Hi level and starts transferring image information for one horizontal scanning line. Liquid crystal display
The drive control circuit 111 in 101 sets the SYNC signal to Hi level during the image information transfer period. After the writing to the display panel 103 is completed after a predetermined one horizontal scanning time, the drive control circuit (FLCD controller) 111 returns the SYNC signal to the Lo level again, and can receive the image information of the next scanning line.

FIG. 3 shows a display screen 3 when a request for displaying a plurality of display information in the multi-window and multi-task system is made.

Display request 31; Mouse font moves diagonally smoothly Display request 32; A window is selected as the active screen and the part that overlaps the previous window that was already displayed is displayed in front Display request 33; Input from the keyboard Display request 34; move the previous character that was already displayed (character movement in the direction of the arrow) display request 35; change the display of the overlap area display request 36; display a non-active window display request 37 Scroll display of no active window Display request 38; Full scan display The following Table 1 shows the display priority of graphic events corresponding to the above-mentioned display requests 31 to 38.

In the table, "partial rewriting" is a driving method for scanning only the scanning lines in the partial rewriting area, and "multi-field refresh" is multi-interlaced scanning by N fields (N = 2, 4, 8,... ^2N ). This is a one-frame scanning method (a driving method described in Japanese Patent Application No. 62-287172). The “display priority” is a rank specified in advance. In this embodiment, the operability of the man-machine interface is emphasized, and the graphic event 31 (mouse movement display) is set as the highest priority display at the highest level. Then, the priority order of the graphic events 33, 34, 37 and 38 was set. or,
"Drawing operation" represents an internal drawing operation of the graphics processor.

The moving display of the mouse has the highest display priority because the purpose of the pointing device must reflect the intention of the operator most quickly (in real time) on the computer. The next most important thing is character input from the keyboard, which is usually buffered, and although real-time is high, it is lower than a mouse. The screen update in the window as a result of this key input does not necessarily have to be at the same time as the key input, and the key input line has a higher priority. The display relationship between scrolling in other windows and the overlap area changes depending on the system settings, but this can naturally occur under multi-tasking.Here, line scrolling under the active window is performed. It has been said that.

In the present invention, the screen display control program shown in FIG. 4 receives screen display requests 31 to 38 from the outside through a communication procedure shown in FIG. 1, and receives a request from a ferroelectric liquid crystal display (FLCD) 101 shown in FIG. Has the function of controlling the transfer of image information. This screen display control program, when at least one request to rewrite the already displayed content occurs,
The rewriting area and the drawing process to the VRAM (image information storage memory) required for the rewriting are determined based on the display priority, and the image information to be sent to the display device 101 is selected while synchronizing with the display device 101. Can be transferred.

The communication procedure shown in FIG. 4 includes a window manager.
41 and Operating System (OS) 42 are used. Operating System (OS) 42
Microsoft "MS-DOS" (trade name), "XENIX" (trade name), AT & T "UNIX" (trade name) and Microsoft "OS / 2" (trade name) As the window manager 41, "MS-Windows ver 1.03" or "ve
r 2.0 ”(both product names), Microsoft Corporation“ O ”
S / 2 Presentation Manager "(brand name), Public
The domain "X-Window" or "DEC-Window" (trade name) of Digital Equipment Corporation of the United States is used. The illustrated event imilator 43 includes a set of “MS-DOS & MS-Windows” and “UNIX & X-Window”
Etc. can be used.

The partial rewriting used in the present invention scans only the scanning lines in the partial rewriting area. Since the FLCD has a memory property, high-speed partial rewriting can be performed. In the present invention, it is assumed that it is not instantaneous that the computer system rewrites display information at high speed within the entire screen. For example, information from a pointing device (= mouse or the like) may be displayed at a speed of 30 Hz or less, and at a speed higher than that, human eyes cannot follow. Similarly, the smooth scrolling (scrolling per line), which requires the fastest display of the display, is not noticeable if it is too fast. Rather, in practice, scrolling is often performed not in units of lines but in units of characters or blocks. In computer systems, scrolling is often used when editing a program or text, and its purpose is to move from one line to another rather than to smooth scrolling, so if it is 10 lines / sec per line, There is no practical problem.

If the mouse font is composed of 32 × 32 dots, and if the partial rewriting scan for the FLCD is driven by non-interlace, this can be simply calculated as follows: [Equation 1] 32 lines × 100 μsec / line = 3.2 msec ≒ 312 Hz
Response speed becomes possible.

On the other hand, performing line scrolling at 10 lines / sec corresponds to a non-interlaced screen update speed of a frequency of 10 Hz.
At a frequency of 10 Hz, flicker should occur strictly. However, since the entire screen moves in units of lines, a change in information is recognized more widely than flicker, so there is no actual problem. Therefore, when scrolling line by line,
The number of scanning lines that can be interlaced is [Equation 2] (1/10 Hz) / 100 μsec = 1000 (lines).

The present invention relates to a data format and a SY as image information having scanning line address information shown in FIG. 1 and FIG.
By using a communication synchronizing means using NC signals, a liquid crystal display device based on a partial rewriting scanning algorithm on the graphics controller side described below is realized.

The generation of image information is performed by the graphics controller 102 of the main unit, and is transferred to the display panel 103 by the signal transfer means shown in FIGS. 1 and 2. The graphics controller 102 manages and communicates image information between the host CPU 113 and the liquid crystal display device 101 with a CPU (Central Processing Unit, hereinafter abbreviated as GCPU 112) and a VRAM (memory for storing image information) 114 at the core. And
The control method of the present invention is mainly realized on the graphics controller 102.

FIG. 9A shows an algorithm for partial rewriting according to the present invention. Display information (pointing device, pop-up menu, etc.) that requires partial rewriting for the ferroelectric liquid crystal display device 101 is registered in the GCPU 112 in advance, and it is determined that the information from the host CPU 113 requires partial rewriting. At this point, the operation proceeds to the partial rewriting routine. In the partial rewriting routine, first, the scanning line address and the number of scanning lines immediately before branching are saved in a register prepared in advance in the GCPU 112. The GCPU 112 stores image information that needs to be partially rewritten from the host CPU 113 into the VRAM 114 of the graphics controller 102.
When the image data is stored in the upper part, the storage start address and the expansion area are managed, and the display device 101 transmits the image information to the liquid crystal display device 101 based on the signal transfer method shown in FIGS. 1 and 2 of the partial rewriting operation. Forward.

Here, in order to form a data format of image information having scanning line address information, the scanning line address information is VR
Mapping was performed on AM114 as shown in FIG. VRAM114 2
One area is allocated to the scanning line address information area and the other is allocated to the display information area. One line of image information is arranged horizontally so that the information on the VRAM 114 corresponds to the pixels of the display panel 1: 1. The scanning line address information is placed at the head (left end) of the image information for one line. Embedded in advance. The GCPU 112 implements a data format of image information having scanning line address information by reading information from the left end of the VRAM 114 in units of one line and sending the information to the liquid crystal display device 101.

The transfer to the liquid crystal display device 101 is performed line by line while the GCPU 112 constantly monitors the scanning line address information mapped on the VRAM 114 and the number of transfer scanning lines. Each time one line is transferred, it is determined whether another partial rewrite request has occurred. If a second partial rewrite request has been generated at that time, and the image information associated with the partial rewrite request is lower-order (lower display priority) information than the currently-processed partial rewrite information, the next partial rewrite request remains unchanged. Scan line line transfer, and conversely, if it is the higher one, the first
The data transfer of the partial rewrite information is interrupted, and the flow branches to the partial rewrite routine of FIG. 9A. In the second partial rewriting routine, similarly to the first partial rewriting routine, the GCPU 11
The scan line address and the number of scan lines immediately before branching are saved in a register prepared in advance in 2. Thereafter, the second partial rewrite information is stored in the VRAM 114, and the display device 1 is stored in units of one line.
Send information to 01. At this time, the presence / absence of a higher partial rewrite request is checked for each line. If there is no request, the image information for the entire area of the second partial rewrite is transferred, and then the second partial rewrite is performed. The process returns to the first partial rewriting routine based on the scanning line address and the number of scanning lines which have been saved before entering. In the first partial rewriting routine, the transfer of the remaining image data is continued while checking whether or not a higher-order partial rewrite request has been generated for each line again, and is first saved after the transfer of all image information is completed. The scanning line address and the number of scanning lines are returned, and the process returns to the normal refresh routine.

FIG. 9B is a partial rewriting algorithm according to the present invention. Image information (pointing device, pop-up menu, etc.) that needs to be partially rewritten for the ferroelectric liquid crystal display device 101 is registered in the GCPU 112 in advance, and it is determined that the information from the host CPU 113 needs to be partially rewritten. At this point, the operation proceeds to the partial rewriting routine. In the partial rewrite routine, first, after the end of the partial rewrite routine, the scan line address and the number of scan lines immediately before the branch are saved in a register prepared in advance in the GCPU 112 as information for returning to the normal refresh routine. Next, the image information associated with the partial rewriting is stored in the VRAM 114.
Is allowed to access the VRAM 114 only via the GCPU 112, so that the VRAM 114
The GCPU 112 manages the upper storage start address and storage area.

After storing the image information in VRAM114, VRA
Access to M114 is prohibited, and transfer of image information to liquid crystal display device 101 is started. The transfer to the liquid crystal display device 101
The scanning line address data mapped on the VRAM 114 in a manner conforming to the signal transfer method shown in FIGS. 1 and 2 is performed in units of one line while the GCPU 112 constantly monitors the scanning line address data.
The image information associated with the two partial rewrites is all
Until the transfer to 1 is completed, the GCPU 112 keeps the new image information VRAM
Do not allow storage in 114. At this time, the host software from the GCPU 112 side so that the application software side of the host CPU 113 can always issue a rewrite request to the GCPU 112 at its own timing without being aware that the storage in the VRAM 114 has been prohibited. No status signal line is provided for the CPU 113 to prohibit the processing. That is, the GCPU 112 is always passive from the viewpoint of the host CPU 113, and a series of algorithms for “synchronizing partial rewriting scanning of the display panel and storing image information in the VRAM 114” are all processed in the GCPU 112.

Also, for each line transfer, the occurrence of a partial rewrite request having a higher display priority than that of the currently processed partial rewrite image information is checked. Image information VRAM114
Allow storage in. As described above, when a higher-order partial rewriting request is issued during a certain partial rewriting scan process, the development to the VRAM 114 is prohibited only during the partial rewriting process for the image information having the highest display priority at that time. I do.

FIG. 9 (C) shows that a pointing request (for example, writing of font information transmitted at a cycle of 30 Hz) of a pointing device having a constant cycle is issued during partial writing (for example, scroll display writing in a window on a display panel). It is a processing flow for weighting the transfer start time of the scroll display information in the window when it occurs. When a pointing device display request of a fixed period occurs during the partial writing, the previous font information is compared with the current font information in the GCPU 112, and if it has not changed, before the pointing device font display request is generated. Then, the storage of information in the VRAM 114 and the transfer of data to the display panel start simultaneously. VRAM114
In the method of storing information, the partially written scroll image information is continuously stored in the VRAM 114, and when the pointing device font is stopped in the area, the display font of the pointing device is erased. The image information of the pointing device is stored in the VRAM 114. On the other hand, in the data transfer to the display panel, the GCPU 112 monitors the storage of the image information of the pointing device in the VRAM 114, and starts the data transfer to the display panel when the storage is completed.

FIG. 9 (D) is a processing flow in which, when a pointing device display request of a fixed period occurs during the scroll image partial writing, a weight is applied to the data transfer start time depending on the position of the pointing device.
If a pointing device display request of a fixed period occurs during the partial writing, and the GCPU 112 determines that there is no change in the image information, the scroll image partial writing process is performed before the pointing device display request occurs. Then, the data transfer to the display panel for storing the information in the VRAM 114 starts simultaneously. For the information storage in the VRAM 114, the partial writing image information up to the position where the pointing device is stopped continues to be stored in the VRAM 114,
When the pointing device is stopped in that area, the display font of the pointing device is erased, so the image information of the pointing device is further deleted.
Store in VRAM114. Then, the remaining information of the partial write is stored in the VRAM 114. On the other hand, in the data transfer to the display panel, the GCPU 112 monitors the storage of the image information of the pointing device in the VRAM 114, and starts the data transfer to the display panel when the storage is completed.

In the present invention, in the partial writing process for the low frame frequency refresh-driven ferroelectric display device 101 using the GCPU 112 having the above-described function, image information is transmitted from the main unit at a constant cycle like a pointing device. When the partial writing is performed each time, the time required for other partial writing becomes long. That is, in the CRT, the storage and display in the VRAM are performed asynchronously, so that no problem occurs even if image information is sent at a constant cycle.
For example, when the image information is sent at a fixed period, the partial writing of the area where the image information has changed while synchronizing the storage of the image information and the data transfer This affects the display speed. Therefore, when image information is sent at a fixed cycle such as font information periodically sent at a cycle of 30 Hz, the GCPU 112 stores the previous information in a memory and compares it with the current information. If no change has occurred, processing is performed so that partial writing of the information is not performed. For example, if a pointing device display request with a fixed period occurs during partial writing, the GCPU112
In the above, the previous image information and the current image information are compared, and if they have not changed, the partial writing process of the pointing device is not performed. Then, the process returns to the partial writing process before the display request of the pointing device is generated, and continues to store the partially written image information in the VRAM 114. When the pointing device is stopped in that area,
Since the display font of the pointing device is erased, further image information of the pointing device
After the data is stored in the AM 114, the data is transferred and partially written. However, since the ferroelectric liquid crystal display device 101 synchronizes information storage and data transfer to the VRAM 114 and starts them at the same time, after storing the partially written image information in the VRAM 114, the pointing device information is stored in the VRAM 114. When the data is stored, data before the information of the pointing device is stored may be already transferred to the display panel 103 depending on the position where the pointing device is stopped. Therefore, the above problem can be solved by giving a wait to the data transfer until the information storage of the pointing device is completed in the GCPU 112.

FIG. 11 shows a multi-window display screen 11 according to the present invention.
This is an example of 0. Window 1 is a screen that displays a certain tally result in a pie chart. Window 2 is a screen representing the tabulated result of window 1 in a table. Window 3 is window 1
The screen which expressed the total result of the bar graph. Window 4 is a screen during document creation. Reference numeral 5 denotes a pointing device mouse. It is assumed that the windows 1 to 3 are stationary and the mouse 5 moves while performing document editing operations such as smooth scrolling, insertion / deletion of words / phrases, and area movement in the window 4. Mouse movement is ferroelectric liquid crystal display 101
Is image information that requires partial rewriting scanning. By the way, when 1120 full screens are scanned in one horizontal scanning time = 80 μs, the frame frequency becomes about 10 Hz, and cannot follow normal mouse movement (≧ 30 Hz) at all. By applying the algorithm of the present invention and setting the priority of the partial rewriting by moving the mouse higher than the document editing work in the window 4, even if the mouse moves during the scrolling operation, the mouse part is immediately changed. Branch to the rewrite routine,
You can enter the mouse writing operation. At this time, the time required for branching to the partial rewriting routine of the mouse is at most one horizontal scanning time. For example, as clarified in the above equation (1), the font size of the mouse is set to 32.
If it is × 32 dots, the time required to write the mouse on the display panel 103 is 3.2 msec, and the scroll operation is stopped during this time, but the time is short enough and the effect on the scroll speed is almost Absent. After writing the mouse, the process returns to the partial rewriting scan of the window 4. When the mouse moves again, the process immediately branches to the partial rewriting routine of the mouse and enters the mouse writing operation. As described above, in a display driven by a low frame frequency having a memory characteristic such as the ferroelectric liquid crystal display device 101, the priority of the partial rewriting is set in such a manner that the movement of the pointing device (mouse) is most important. This makes it possible to realize a display function such as multi-window multi-task.

FIG. 5 is a block diagram of the graphics controller 102, FIG. 6 is a block diagram of the digital interface, and FIGS. 7 and 8 are timing charts of information transfer.

The major difference between the graphics controller 102 used in the present invention and the conventional graphics controller 102 is that the graphics processor 501 has its own dedicated system memory 502,
It not only manages the RAM 503 and ROM 504, but also executes and manages drawing commands to the RAM 503, and can independently program information transfer from the digital interface 505 to the FLCO controller and management of the FLCD drive method. .

First, the digital interface 505 in FIG.
The external synchronization signal from the LCD controller 111
While synchronizing with the drive circuits 104 and 105 of the display panel 103 by ▼ / ▲ ▼, 4bits /
The information in the VRAM is sent as a clock (clock = data transfer clock). FIG. 7 shows the timing when the FLCD rewrites the entire screen, and the parameters in the figure are the same as those in the timing chart at the time of information transfer in FIG. First,
The transfer of one line of image information is shown in FIG.
Starts when ▼ becomes active (low level in this case). ▲ ▼ is set to low by the FLCD controller 111, which indicates an information request on the panel 103 side. This panel
The information request on the 103 side is the graphics processor 5 in Fig. 5.
01 is received and internally processed at the timing shown in FIG. In the timing chart of FIG. 8, ▲ ▼ of the information request on the panel 103 side is sampled for one cycle of the external video clock (CLKOUT) from the outside (in other words, the low period of VCLK). (In this case, the VCLK is actually input to the graphics processor 501, and the processor 501 is designed to perform sampling during the low period.) Then, after 2.5 clocks of VCLK, the horizontal The counter HCOUNT is cleared, and the parameters HESYNC and HEBLNK shown in FIG. 7 are programmed to immediately before HCOUNT = 1.
▲ ▼ in the figure is disabled (high),
In the circuit shown in FIG. 6, as shown in FIG. 8, after half a clock of VCLK, DATAN becomes active (high).
After clocking, the next one line of data is 4 bits from VRAM
Every time, it is transferred to the FLCD controller 111.

As shown in the lower right part of FIG. 8, the line information to be transferred in this case is obtained by first sending scanning line address information (ie, corresponding to the scanning line No.) every 4 bits, Is sent for one line. FLCD in this case
The controller 111 uses the AH / DL signal to identify the scanning line address information and the display information. When the AH / DL signal is high, it indicates the scanning line address information, and when it is low, the display information is recognized. Therefore, the FLCD selects a scanning line according to the scanning line address information, and the display information is written.
When the scanning line address information from the graphics controller of FIG. 5 is sent one by one, the scanning line address information is non-interlaced. When the scanning line address information is added every other line, the scanning line address information is interlaced. The FLCD will be driven interlaced. Therefore, the display driving method can be controlled.

An FLCD generally requires a driving time of about 100 μsec for one scanning line. Suppose now that the driving time for one scan line is 100 μsec.
Assuming that the lowest frequency at which flicker does not occur is 30 Hz, in the non-interlace drive method of this FLCD, [Equation 3] (1/30 Hz) / 100 μsec ≒ 333 (book) In the interlace drive method, [Equation 4] (1 / 30Hz) × 2 / 100μsec ≒ 666 (lines) In the case of m multi-interlace, scan (scan / drive) the scanning line of (Equation 5) (1 / 30Hz) × m / 100μsec ≒ 333 × m (lines) Does not produce flicker as a still image. According to experiments performed by the present inventors, m =
It was confirmed that flicker did not occur even at 32. That is, [Equation 6] The display panel 103 having (1/30 Hz) × 32/100 μsec ≒ 333 × 32 = 10656 (lines) can be displayed without flicker, which is exactly the same as the conventional flat display panel. The high-definition that is not possible is numerically possible.

The "74AS161A", "74AS74", and "74ALS2"
57, 74ALS878, and 74AS257 are IC
The numbers in the figure represent pin numbers.

FIG. 12 is an example of a driving waveform of the multi-interlace driving method (a method in which jumping is selected every two or more lines) used in the present invention.

Figure 12 shows the (4M-3) field F _4M-3 , (4M-2)
Field F _4M-2, in the (4M-1) field F _4M-1 and 4M field F _4M (where, .M = 1,2,3 ... is that of one vertical scanning period as one field) 4N- A scan selection signal S _4n-3 (n = 1, 2, 3,...), 4 applied to the third scan electrode
A scan selection signal S _4n-2 , 4n applied to the (n-2) th scan electrode
Scan selection signals S _4n-1 and 4n applied to the first scan electrode
The scan selection signal _S4n applied to the third scan electrode is shown. According to FIG. 12, the scanning selection signal S _4n-3 is (4M−
3) Field F _4M-3 and (4M-1) Field F _4M-1 (M
= 1, 2, 3,...) (Voltage polarities based on the voltage of the scanning non-selection signal) are opposite to each other, and the (4M-2) fields F _4M-2 and 4M Scanning is not performed in the field _F4M , and the same applies to the scan selection signal _S4n-1 . Further, the scanning selection signals S _4n-3 and S _4n-1 applied within one field period have different voltage waveforms, and the voltage polarities of the same phase are opposite to each other.

Similarly, the scan selection signal S _4n-2 is a (4M-2) field F
_4M-2 and 4M field F The voltage polarities (voltage polarities based on the voltage of the scanning non-selection signal) in the same phase of _4M are opposite to each other, and (4M-3) field F
_{The 4M-3} and (4M-1) fields F _4M-1 do not scan, and the scanning selection signal S _4n is also the same. Further, the scanning selection signal S applied within one field period
_4n-2 and S _4n have different voltage waveforms from each other,
The voltage polarities of the same phase are opposite to each other.

In the scanning drive waveform example of FIG. 12, a third phase is provided for stopping the screen all at once (for example, applying a voltage 0 to all the pixels constituting the screen all at once). The third phase is set to voltage 0 (the same level as the voltage of the scanning non-selection signal).

According to FIG. 12, the (4M-3) th field F
_The information signal applied to the signal electrode in _4M-3 is a white signal (in combination with the scanning selection signal _S4M-3 , the ferroelectric liquid crystal in the second phase is applied to the scanning selection signal _S4n-3) . A voltage ± V ₀ smaller than the threshold voltage of the ferroelectric liquid crystal is applied to the pixels by combining the voltage of 3V ₀ exceeding the threshold voltage to form a white pixel and the holding signal (scan selection signal S _4n-3 ). Is applied)
Is selectively applied, and a black signal (a voltage exceeding the threshold voltage of the ferroelectric liquid crystal in the second phase due to synthesis with the scanning selection signal _S4n-1) is applied to the scanning selection signal _S4n-1 . the synthesis of -3 V ₀ is applied to form a black pixel) and the hold signal (scanning selection signal S _4n-1, the voltage ± V ₀ smaller than the ferroelectric liquid crystal in the pixel is applied) and selective Is applied. Since the scanning non-selection signal is applied to the (4n-2) th and (4n) th scanning electrodes, the information signal is applied as it is.

Following the writing of the above (4M-3) field F _4M-3 (4
M-2) In the field _F4M-2 , as an information signal to be applied to the signal electrode, a black signal and a holding signal similar to those described above are selectively applied to the scanning selection signal _S4n-2 , A white signal and a holding signal similar to those described above are selectively applied to the scanning selection signal _S4n . Since the scanning non-selection signal is applied to the (4n-3) th and (4n-1) th scanning electrodes, the information signal is applied as it is.

In the (4M-1) field F _4M-1 following the (4M-2) field F _4M-2 , the information signal applied to the signal electrode is as described above for the scan selection signal S _4n-3 . A similar black signal and holding signal are selectively applied, and a scanning selection signal S
The white signal and the holding signal similar to those described above are selectively applied to _4n-1 . Since the scanning non-selection signal is applied to the (4n-2) th and 4nth scanning electrodes, the information signal is applied as it is.

The information signal applied to the signal electrode in the 4M field F _4M following the (4M-1) field F _4M-1 is the scanning selection signal S
_{For 4n-2} , the same black signal and holding signal as described above are selectively applied, and for the scanning selection signal _S4n , the same white signal and holding signal as described above are selectively applied. Is done. Since the scanning non-selection signal is applied to the (4n-3) th and (4n-1) th scanning electrodes, the information signal is applied as it is.

FIGS. 13 (A), (B) and (C) show timing charts when the display state shown in FIG. 13 (D) is written by the drive waveforms shown in FIG. Fig. 13 (D)
In the figure, ○ indicates a white pixel, and ● indicates a black pixel. or,
I ₁ -S ₁ in FIG. 13 (B) is a time series waveform of the voltage applied to the intersection of the scanning electrode S ₁ and the signal electrode I ₁ . I ₂ −S ₁ is a time-series waveform of the voltage applied to the intersection of the scanning electrode S ₁ and the signal electrode I ₂ . Similarly, I ₁ −S ₂ is the scanning electrode S ₂ and the signal electrode I ₁
5 is a time-series waveform of a voltage applied to an intersection with the above. I ₂ −S ₂
Is a time-series waveform of the voltage applied to the intersection between the scanning electrode S ₂ and the signal electrode I _2.

Further, the present invention is not limited to the above-described driving waveform examples. For example, scanning may be performed at intervals of four lines, at intervals of five lines, at intervals of six lines, at intervals of seven lines, preferably at intervals of eight or more lines. it can. The scanning selection signal may have a waveform whose polarity is inverted for each field as shown in FIG. 12, or may have the same waveform for each field.

FIG. 14 schematically illustrates an example of a ferroelectric liquid crystal cell. 141a and 141b are substrates (glass plates) coated with transparent electrodes such as In ₂ O ₃ , SnO ₂ and ITO (indium-tein-oxide), between which the liquid crystal molecule layer 142 is perpendicular to the glass surface The liquid crystal of the SmC ^* phase, which is oriented likewise, is sealed. A bold line 143 represents a liquid crystal molecule, and the liquid crystal molecule 143 has a dipole moment (P⊥) 144 in a direction perpendicular to the molecule. Substrates 141a and 1
When a voltage above a certain threshold is applied between the electrodes on 41b,
The helical structure of the liquid crystal molecule 143 is unwound, and the dipole moment (P⊥) 144 is oriented in the direction of the electric field.
Can be changed. The liquid crystal molecules 143 have an elongated shape, exhibit refractive index anisotropy in the major axis direction and the minor axis direction, and therefore, for example, if a polarizer arranged in a crossed Nicols positional relationship above and below the glass surface is placed. It can be easily understood that the liquid crystal optical modulation element changes its optical characteristics depending on the polarity of the applied voltage. Further, when the thickness of the liquid crystal cell is made sufficiently thin (for example, 1 μm), the helical structure of the liquid crystal molecules is released even when no electric field is applied as shown in FIG. 15, and the dipole moment Pa or Pb of the liquid crystal molecule becomes It takes either the upward (154a) or downward (154b) state. To such a cell, when an electric field Ea or Eb having a different polarity over a certain threshold is applied for a predetermined time as shown in FIG. 15,
The dipole moment changes its direction to the upward direction 154a or downward direction 154b with respect to the electric field vector of the electric field Ea or Eb, and accordingly, the liquid crystal molecules are oriented in one of the first stable state 153a and the second stable state 153b. I do.

There are two advantages of using such a ferroelectric liquid crystal as the optical modulation element. First, the response speed is extremely fast, and second, the orientation of the liquid crystal molecules has a bistable state. The second point will be described with reference to FIG. 15, for example. When an electric field Ea is applied, the liquid crystal molecules are oriented to a first stable state 153a. This state is stable even when the electric field is turned off. When the electric field Eb in the opposite direction is applied, the liquid crystal molecules are brought into the second stable state 15.
Orientation to 3b changes the orientation of the molecule, but it remains in this state even after the electric field is turned off. As long as the applied electric field Ea does not exceed a certain threshold value, each orientation state is maintained. In order to effectively realize such a high response speed and bistability, it is preferable that the cell is as thin as possible, generally 0.5 μm to 20 μm, particularly 1 μm to
5μ is suitable.

〔The invention's effect〕

As described above, according to the present invention, it is possible to realize a display device that can cope with advanced display application software such as movement of a cursor and a pointing device and multi-window / multi-task even in a display driven by a low frame frequency. can do. In particular, according to the present invention, the display quality of the font display can be improved without depending on the display position, without generating the font display having the non-display portion.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a liquid crystal display device and a graphics controller, and FIG. 2 is a timing chart of image information communication between the liquid crystal display device and the graphics controller. FIG. 3 is a display screen diagram schematically showing a plurality of graphic events. FIG. 4 is a block diagram of a display control program used in the present invention. FIG. 5 is a block diagram of a graphics controller used in the present invention, and FIG. 6 is a block diagram of a digital interface. FIG. 7 is an interface timing chart for the display driving device used in the present invention, and FIG. 8 is an interface timing chart for the FLCD controller. FIG. 9 (A) ~
(D) is a sequence diagram showing an algorithm for partial rewriting used in the present invention. FIG. 10 is an explanatory diagram showing data mapping of scanning line address information and display information on a VRAM used in the present invention. FIG. 11 is a diagram of a multi-window display screen in this embodiment. FIGS. 12A and 12B are driving waveform diagrams used in the present invention, and FIGS.
FIG. 13C is a timing chart thereof, and FIG. 13D is a schematic diagram showing a display state of the pixel at that time. FIG. 14 and FIG. 15 are perspective views of the ferroelectric liquid crystal cell used in the present invention.

Claims (7)

(57) [Claims] An image information storage memory has a high display priority based on a display priority of a graphic event specified in advance, and the first graphic event information periodically received is prioritized and prioritized. The storage of the second graphic event information having a lower rank in the memory is prohibited, and the second graphic event information is stored in the memory when the content of the first graphic event information does not change. Information having means for controlling the image information storage memory so as to release the prohibition and start the transfer of the second graphic event information after the transfer of all image information based on the first graphic event information is completed Processing equipment. 2. The memory according to claim 1, wherein when the storage position of the first graphic event information in the image information storage memory has not changed, the prohibition of storage of the second graphic event information in the memory is released. The information processing apparatus according to claim 1, further comprising a control unit. 3. The first graphic event information is font information from a pointing device.
An information processing apparatus according to claim 1. 4. The information processing apparatus according to claim 1, wherein the second graphic event information is full screen image information or in-window image information. 5. The information processing apparatus according to claim 1, further comprising a time for transferring the dummy information before the transfer of the second graphic event information is started. 6. A scanning line address information for designating a scanning line to be selected by the stored image information and display information for controlling a display information signal applied to an information electrode on the selected scanning line. 2. The information processing apparatus according to claim 1, further comprising means for serially transferring the image information. 7. The information processing apparatus according to claim 1, further comprising means for storing the output scanning line address information.