JP2581558B2 - Distributed processing system - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data distribution processing system in which a series of data processing is distributed to a plurality of data processing devices and processed.

[Conventional technology]

A distributed processing system is a system in which a plurality of data processing devices (hereinafter, referred to as processing devices) using a computer are connected via a common transmission line by various coupling methods, and a series of data processing is performed by distributing the processing devices. is there.

In the distributed processing system, a program corresponding to the processing content distributed to each processing device is set, and a program of each processing device is started based on some information to execute a series of processing. As an example of a method of activating a program of each processing device, a method of fetching data necessary for executing the program into the own processing device from a common transmission line and activating the program when the data is ready (Japanese Patent Laid-Open No. Sho 57-1463)
No. 61). In this case, as an example of a method of determining whether data on the common transmission path is necessary for starting a program of the processing device, a method of determining using a function code is known (Japanese Patent Application Laid-Open No. 56-111353). issue). A distributed processing system using these methods can autonomously distribute data and execute data processing in an asynchronous free-run state by each processing device without the need for a management processing device to manage the entire system. It is.

[Problems to be solved by the invention]

In the prior art, when a function code is excessively generated due to a failure of a specific program or the like, there is a high possibility that the transmission buffer area of the function code becomes full and the system goes down.

It is an object of the present invention to reduce the probability that the transmission buffer will be full.

[Means for solving the problem]

The above object is achieved by constantly storing and monitoring the number of occurrences of function codes transmitted by a program for each function code, and delaying the program processing so that the number of occurrences becomes a certain value or less.

That is, the present invention relates to a distributed processing system in which a plurality of data processing devices for transmitting transmission data generated in its own data processing device with a function code indicating the data content added thereto and connected through a common transmission path. Wherein each of the data processing devices includes a counting unit that counts the number of occurrences of the function code each time a function code is generated, and a comparing unit that compares a limit value stored in a table with a value counted by the counting unit. A delay means for delaying the transmission of the function code when the number of occurrences of the function code is equal to or greater than a limit value by the comparison means, and a means for clearing the value counted by the counting means at a constant cycle. It is characterized by.

In a more specific aspect, the occurrence count limit value is set according to the transmission capacity of the common transmission path and the processing capacity of another processing device.

[Action]

According to the configuration of the present invention, in each data processing device, in order to suppress the number of occurrences of its own function code to be constant,
The probability of occurrence of transmission buffer overflow can be reduced, and the frequency of data transmission can be averaged between the data processing devices, so that each processing in the data distribution processing is performed on average. It becomes possible.

Embodiment Next, an embodiment of the distributed processing system according to the present invention will be described with reference to the drawings.

First, a schematic configuration of a distributed processing system will be described with reference to FIG. In the following embodiments, a method using a loop transmission line is shown as a method of coupling the respective processing devices, but the present invention can be applied to other types of engagement methods.

In FIG. 2, reference numerals 11 to 13 denote processing devices which store application programs therein and execute the programs. Reference numerals 21 to 23 denote transmission control devices (hereinafter referred to as NCPs (Network Control P
rocessor). Each NCP 21 to 23 and each processing unit 1
Reference numerals 1 to 13 each include a bidirectional transmission medium 24, 25, 26. The processing results of the processing units 11 to 13 are stored in messages (third
As shown in the figure, the data is transmitted to the transmission line 1 via the respective NCPs 21 to 23.
Each of the NCPs 21 to 23 determines whether or not the message flowing on the transmission line 1 is necessary for the processing devices 11, 12, and 13 connected thereto by the function code added to the message, and determines that the message set as necessary is To the processing unit connected to the Each of the devices 11 to 13 starts this program when all the messages necessary for executing the application program stored therein for performing the actual processing in the processing device are prepared. The activated program performs a process using the message, adds a function code FC32 to the execution result, and outputs the result as a message.

Message Format of Message FIG. 3 shows an example of a signal format of a message flowing on the transmission line 1. In FIG. 3, F31 is a flag indicating the start of a message. FC32 is a function code indicating the content and function of the transmission data transmitted by the own processing device. Based on the function code FC32, each of the NCPs 21 to 23 determines whether the transmission data of the transmission path 1 is necessary for the processing devices 11 to 13 connected thereto. DT36 is a data area indicating a processing result of each processing device 11 to 13 by an application program,
FCS37 is error detection data, and F38 is a flag indicating the end of the message.

FIG. 1 is a block diagram showing the internal configuration of the processing apparatus 11 shown in FIG. The other processing devices 12, 13 also have the same configuration. The transmission control unit 101 is a unit for transferring data between the NCP 21 and the processing device 11, and stores a message received from the NCP 21 in a reception buffer 102. Further, the message of the transmission buffer 103 is transmitted to the NCP 21. further,
When the message is required by the application program of the processing apparatus itself, the message is stored in the reception buffer 102.

The processing unit 104 is a unit for managing and controlling the execution of application programs 1081 to 108m to be described later.
A specific device is configured using a so-called CPU. As shown in FIG. 4, the processing unit 104 includes a control code generation means (program), a function code generation number counting means (program) 401, and a generation number calculation means (program) as shown in FIG. program),
Occurrence count data storage memory area 201, Occurrence count limit value table storage memory area 202, means (program) 40 for comparing the occurrence count limit value with the current function code occurrence count
2. Means (program) 403 for delaying the transmission timing of the function code when the number of occurrences is equal to or greater than the limit value, and means 4 for setting the transmission function code in the transmission buffer 103
04 is equipped. The limit value in the occurrence count limit value table indicates the capacity of each reception buffer 102 of each data processing device 11 to 13,
It is set based on the transmission capacity of the transmission path 1 or the load capacity of the NCP.

Next, the detailed contents of the input / output data storage area 105 are described in the fifth section.
Shown in the figure. 1051 in the first line of this input / output data storage area
Is an input / output message storage area for the application 1081. 10511 stores an input message, and 10513 stores an output message. 10511 stores an input message function code as an initial value. The startup program area 10512 is an area indicating a program to be started by the input message stored in the area 10511 (that is, 1081). The second line 1052 is an area for storing input / output messages of the application program 1082. Similarly, an input / output message area is provided for each application program.

Processing Operation FIG. 6 is a diagram showing a processing flow at the time of inputting a message of the processing unit shown by 104 in FIG. The processing device that fetches the message from the reception buffer 102 and sets it in the input data storage area 105 ml first determines whether or not an executable program exists, that is, all input messages necessary for executing the program are stored in the input / output message storage area 105. Check whether it is stored in (6
02). If there is no executable program, the process ends. If an executable program exists, the program is started.

The started application program executes its own processing using the input message, and then sets the processing result in the output data storage area data section (DT).

Further, the processing unit 104 includes an output data storage area 105.
When data is set in the internal DT section, the contents of the FC section and the DT section are set in the corresponding area in the transmission buffer 103. For detection of data setting in this area, a control flag is provided in the area, and the flag is set when the area is set,
Alternatively, this area is cleared by a predetermined method such as clearing the area at the time of transfer to the buffer.

Next, in FIG. 4, the contents of the DT section and the FC section in the input / output data storage area 105 in the processing unit 104 are transmitted by the transmission buffer 10.
3 shows a processing flow when setting is performed in a corresponding area in 3. When a transmission request is received, the generation count storage area 201 for each function code is incremented by "+1" (401). Next, it is determined with reference to the limit value table 202 whether the number of occurrences is equal to or greater than the limit value (402). If the number of occurrences is equal to or greater than the limit value, after a lapse of a certain time, that is, by delaying the generation timing of the function code (403), the contents of the DT and FC sections in the input / output data storage area 105 and the transmission buffer 103 (404). The occurrence count storage area 201 for each function code is cleared to 0 at a constant cycle.

〔The invention's effect〕

As described above, according to the present invention, the number of occurrences of function codes for each processing device is suppressed to a fixed value or less for each function code even if a program defect or the like occurs. Can be reduced in probability of becoming overflow.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the configuration of a data processing apparatus according to the present invention, FIG. 2 is a schematic configuration diagram of a distributed processing system, and FIG.
FIG. 4 is an explanatory diagram showing an example of the format of transmission information, FIG. 4 is a flowchart showing data processing according to the present invention, FIG. 5 is an explanatory diagram showing details of an output data storage area in the processing device, and FIG. 5 is a flowchart showing a processing flow when data is fetched from a reception buffer. 1 common transmission line, 11-13 processing device, 21-23 transmission control device, 101 transmission control unit, 102 reception buffer, 103 transmission buffer, 104 processing unit,
105: Input / output data storage area, 201: Function code generation count storage memory area, 202: Generation count limit value table storage memory area, 401: Function code generation count counting means, 402: Comparison means, 403 ... ... Delay means, 1081
~ 108n …… Application program.

Claims (2)

(57) [Claims] 1. A distributed processing system in which a plurality of data processing apparatuses for transmitting transmission data generated in its own data processing apparatus with a function code indicating the data content added thereto and connected thereto through a common transmission path. Each of the data processing devices includes a counting unit that counts the number of occurrences of the function code each time a function code is generated, and a comparison unit that compares a limit value stored in a table with a value counted by the counting unit. A delay means for delaying the transmission of the function code when the number of occurrences of the function code is equal to or greater than a limit value by the comparison means, and a means for clearing the value counted by the counting means at a constant cycle. A distributed processing system characterized by the following. 2. The distributed processing system according to claim 1, wherein said limit value is set according to the transmission capacity of said common transmission path and the processing capacity of another processing device.