JP2577765B2 - Color signal conversion decoder for facsimile broadcast receiver - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a color signal conversion decoder for a facsimile (hereinafter abbreviated as "FAX") broadcast receiver, and more particularly to a method of converting a composite signal obtained by demodulating a fax signal into RGB color signals of three primary colors. The present invention relates to an improvement in a color signal conversion decoder for converting a color signal into a color signal and outputting the color signal to a color printer.

[Conventional technology]

Conventionally, as a color signal conversion decoder of this type of fax broadcast receiver, a 16 Mbyte RAM is divided into first and second memory areas, and a demodulated fax signal is stored in the first memory area. Its fax by color signal conversion circuit
There is a configuration in which a signal is converted into an RGB color signal and stored in the second memory area.

In this case, the FAX signal is received, converted into an RGB color signal and stored, and the stored RGB color signal is output to a color printer as it is.

[Problems to be solved by the invention]

However, as shown in FIG. 6, one page of the transmitted fax signal is composed of a control signal, a phase signal, an image signal, a control signal, and a non-signal, and the screen signal is the same as that of FIG.
The color difference signal C _B 1 page is subsequent thereto and the luminance signal Y lines as shown in the figure, it consists of C _R of the line, between the synchronization signal SYC was configured in one page 2288 line 1696 bytes.

Therefore, in the color signal conversion decoder having the above configuration,
Since the luminance signal Y and the dye signals C _B and C _R before color conversion and the RGB signal after conversion are stored, a 16 Mbyte RAM is required, and the memory capacity is disadvantageously increased.

In addition, the reception time of a FAX signal in a FAX broadcast receiver and the printing time in a color printer are generally about two and a half minutes, respectively, but a color signal conversion circuit uses a conversion program.
Due to the fact that the fax signal is converted into an RGB color signal under the control of the CPU, an extra time of about one minute longer than the reception time is required.

As a result, even if the reception of the fax signal ends, the conversion of the RGB color signal does not end, and there is a possibility that the transmission timing of the RGB color signal to the color printer may be disturbed.

The present invention has been made in order to solve such a conventional disadvantage, and it is possible to significantly reduce the memory capacity for supplying a fax signal, and to say that color signal conversion does not end during reception of a fax signal. A color signal conversion decoder that has never been obtained is obtained.

[Means for solving the problem]

In order to achieve such an object, the present invention forms a facsimile signal memory circuit for sequentially storing a demodulated facsimile signal from data of a first line corresponding to one page of a transmission screen.
The signal memory circuit is connected to an address counter circuit for reading data every three lines while counting from a first line by a predetermined line from the first line stored therein, and the read address data is read to this address counter circuit. A color signal conversion circuit for converting data into RGB color signals is connected, and a line memory circuit for storing each converted RGB color signal for one line is connected as a buffer to the color signal conversion circuit. Have been.

In addition to the above configuration, an address memory circuit for storing a head address decoder of each line in the FAX signal memory circuit is connected to the address counter circuit, and the head address of a predetermined line from the first line is stored in the address counter circuit. It is configured to output to the address counter circuit and control it as the count initial value.

Further, the address memory circuit may be constituted by a part of the memory means constituting the FAX signal memory circuit.

(Operation)

According to the present invention provided with such means, a fax signal for one screen stored in a fax signal memory circuit is read out three lines at a time by an address counter circuit, and converted into RGB color signals by a color signal conversion circuit. One line is stored in the memory circuit and output to a color printer.

In addition, if an address memory circuit for storing the head address of each line of the fax signal memory circuit is provided, if there is a missing line in the received fax signal, for example, the leading addresses of the two lines before and after the missing line are replaced by the missing lines. By storing as a start address, continuous lines are converted into color signals.

〔Example〕

 Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of a color signal conversion decoder of a FAX broadcast receiver according to the present invention.

The FAX signal memory circuit 1 stores a FAX signal demodulated in the preceding stage. For example, as shown in FIG. 2, the FAX signal memory circuit 1 has a storage area of 1696 bytes per line and a storage area of 2288 lines.
It is capable of storing 2288 lines for one page of a signal, and is composed of a 4 Mbyte conventionally known RAM together with an address memory circuit 3 described later.

The fax signal is, as already shown in FIG.
And the subsequent color-difference signals C _B, sent a one page becomes C _R are each one screen one line at 2288 lines, the FAX signal memory circuit 1, as shown in FIG. 2, the The first line stores the luminance signal Y of the first line of the FAX signal, the second line stores half of the color difference signals C _B and C _R of the second line of the FAX signal. The data is stored alternately up to the line. In the second drawing convenience luminance signal Y codes Y, indicating the color difference signals C _B, the C _R in the code C.

The FAX signal input to the FAX signal memory circuit 1 is
This is a composite signal that has been selected, amplified, and voice detected after reception, and further demodulated by a fax signal detection circuit.

The address memory circuit 3 has an area for storing, for example, 2000 lines of the head address of each line in the fax signal memory circuit 1. The number of head addresses to be stored is arbitrarily selected depending on the memory capacity, the configuration of the color printer 15 described later, and the like.

The FAX signal memory circuit 1 and the address memory circuit 3 operate under the control of the CPU 5, and when the head address is written into the address memory circuit 3 by the CPU 5 and a missing line exists in the received FAX signal, As the leading address of the missing line, the leading address two lines before or two lines in the FAX signal memory circuit 1 is write-controlled.

An address generation circuit 7 is connected to the address memory circuit 3, and a function of designating, for example, three consecutive lines of the head address data of 1 to 2000 lines in the address memory circuit 3 and outputting the head address. have.

An address counter circuit 9 is connected to the fax signal memory circuit 1 and the address memory circuit 3.

The address counter circuit 9 fetches three lines of head address data from the address memory circuit 3 and
This is used as an initial value for the corresponding 3 of the fax signal memory circuit 1.
Specifies the line, the luminance signal Y and the color difference signals C _B of the start address, reads the C _R, sequentially luminance for one line from the start address of 3 lines specified to start counting the start address as the initial value signal Y and color difference signals C _B, and has a function of outputting C _R. The address counter circuit 9 for storing the color difference signal lines is also output to the automatic operation address of the color difference signals C _R of the middle line.

Address counter circuit 9, read 3 line luminance signal Y, color difference signals C (C _B, C _R) and averaging the luminance signal Y in the case of the luminance signal Y, the color difference signals C, the luminance signal Y and It has a function of outputting the luminance signal of the high precision of one line to the color signal conversion circuit 11 by averaging the color difference signals C Y and the color difference signals C _B, the C _R in the case of the color difference signal C.

However, the luminance signal Y and the color difference signals C _B , C
_The function of calculating _R can be configured to be performed by the color signal conversion circuit 11.

Color signal conversion circuit 11 is the luminance signal Y and color difference signals C _B, C _R
Has a function of performing, for example, a comparison operation to separate and convert it into RGB color signals of three primary colors, and outputs it to the line memory circuit 13 at the subsequent stage.

As shown in FIG. 3, the line memory circuit 13 is a buffer having a memory capacity of one line for each of the RGB color signals, and is composed of two RAMs of 2 Kbytes, and is connected to the color printer 15. ing.

Next, the operation of the present invention thus configured will be described.

When the fax signal is input to the fax signal memory circuit 1, the luminance signal Y of the first line for one page is applied to the first line of the fax signal memory circuit 1 and the color difference signal C _B of the second line of the fax signal. , C _R
Is written to the second line of the FAX signal memory circuit 1, and each line of one page of the FAX signal is sequentially written up to the 2288th line.

On the other hand, the head address of each line in the FAX signal memory circuit 1 is sequentially written to the address memory circuit 3 up to 2000 lines. If there is a missing line in the received FAX signal, the leading address two lines before or two lines in the FAX signal memory circuit 1 is written as the leading address of the missing line. These operate under the control of the CPU 5.

When a FAX signal for one page is written into the FAX signal memory circuit 1, the first to third lines of the address memory circuit 3 are sequentially designated from the address generation circuit 7 and applied to the address memory circuit 3, and the address memory circuit 3 Data from the circuit 3 to the first to third lines, that is, head addresses of the first to third lines of the FAX signal memory circuit 1 are read out to the address counter circuit 9.

The address counter circuit 9 uses those start addresses as FA
And outputs the X signal memory circuit 1, the first to third luminance signals stored in the head address of the line Y and the color difference signals C _B corresponding to the second view, the data D ₁ of the C _R, D _2, Read D ₃ and D ₄ .

Then, outputs data _{D 1, D 2, D 3} , the luminance signal by calculating the average value of D _1, D ₄ of the D ₄ Y and the color difference signals C _B, the C _R to the color signal conversion circuit 11, The counting is started with the start address as an initial value, and the data of the first to third lines are sequentially read for one line and output to the color signal conversion circuit 11.

Luminance signal in the color signal conversion circuit 11 Y and the color difference signals C _B, C
_R is compared, converted to an RGB color signal and output, and stored in each storage area of the line memory circuit 13.

When the RGB color signals for one line are stored in the line memory circuit 13, they are output to the color printer 15 dot by dot, and the color printer 15 prints the first line of the screen for one page. Since the color printer 15 reproduces colors by the subtractive color method, the color printer 15
(Yellow), converted into M (magenta) and C (cyan) and printed one by one in order.

For the second line of one page, the address memory circuit 3 designates the second to fourth lines of the address memory circuit 3 and reads out from the second to fourth lines of the facsimile signal memory circuit 1 based thereon. The color conversion of the signal is performed, and this is repeated thereafter. Note that the color conversion of the second line is the first line.
The time during which the RGB color signals of the line are set in the line memory circuit 13 and output to the color printer 15 is used. This relationship will be further clarified by the following description of FIG.

FIG. 4 shows the operation timing of the line memory circuit 13 and the color printer 15 turns.

A ▲ ▼ signal is output from the printer 15 side, and a ▲ ▼ signal is output from the line memory circuit 13 side.
▼ signal is output and vertical sync signal ▲ ▼
When the paper of the color printer is synchronized with the horizontal synchronization signal ▲ ▼, the RGB color signal is transmitted from the line memory circuit 13 to the color printer 15 in synchronism with the clock CLK, for example.
Output in msec and the first line is printed.

FIG. 5 is a diagram showing print data for one screen of an RGB color signal input from the line memory circuit 13 to the color printer 15. In FIG. 5, one line is 1536 dots. Selected according to the configuration.

After that, the RGB color signal on the second line is output in the next period (18.66
(msec), the data is stored and set in the line memory circuit 13 from the color signal conversion circuit 11 and sent to the printer 15 in synchronization with the horizontal synchronizing signal ク ロ ッ ク and the clock CLK to print the second line. Thereafter, processing for 2000 lines is sequentially performed to print one color of one screen, for example, Y (yellow).

Subsequently, the above-described operation is repeated to sequentially print the second and third colors of the first screen in M (magenta) and C (cyan), and the color screen is reproduced on the paper.

As described above, according to the present invention, the fax signal is stored in the fax signal memory circuit 1.
And the address counter circuit 9 stores one
The line signal is read out line by line, converted to RGB color signals by the color signal conversion circuit 11, and stored in the line memory circuit 13.
The memory capacity of the circuit that stores the signal is greatly reduced from 16 Mbytes to 4 Mbytes, and the color signal conversion circuit 11 is used to output the RGB color signals from the color signal conversion circuit 11 to the line memory circuit 13.
Then, since the next line signal is converted to an RGB color signal, there is no adverse effect that the conversion of the RGB color signal is not completed during reception of the fax signal.

Further, an address memory circuit 3 for storing a head address of each line of the FAX signal memory circuit 1 is provided, and a head address of a continuous line is written, thereby controlling the FAX signal memory circuit 1. It can be prevented.

Needless to say, the address memory circuit 3 does not need to be formed by a part of the RAM constituting the FAX signal memory circuit 1 and can be constituted by using a separate RAM.
However, since the remaining area is formed in the memory capacity due to the configuration of the RAM and the memory capacity necessary for storing the start address is small, it is more efficient to configure the FAX signal memory circuit 1 with a part of the RAM. good.

In the embodiment of the present invention described above, but reads the data by specifying the head address by 3 lines from the FAX signal memory circuit 1, which improves the luminance signal Y, the color difference signals C _B, the accuracy of the C _R For example, the color signal conversion circuit 11 may read out a predetermined line, for example, two lines at a time, and directly convert the color.

〔The invention's effect〕

As described above, according to the present invention, a fax signal is stored in a fax signal memory circuit, read out every three lines by an address counter circuit, converted into an RGB color signal by a color signal conversion circuit, and one line is stored in a line memory circuit. The configuration for storing and outputting to a printer has significantly reduced the memory capacity for storing fax signals, which has enabled the downsizing of equipment, reduction in power consumption and price, and termination of fax signal reception. Even RGB
The inconvenience of not completing the color signal conversion does not occur.

If an address memory circuit is provided to store the start address of each line of the FAF signal memory circuit, it is possible to compensate for missing lines in the received fax signal. Becomes possible.

Furthermore, if the address memory circuit is constituted by a part of the RAM constituting the FAX signal memory circuit, the RAM can be effectively used, and the size and operation efficiency can be further reduced.

[Brief description of the drawings]

FIG. 1 is a block circuit diagram showing an embodiment of the present invention.
FIG. 3 is a memory map diagram for explaining a storage state in the facsimile signal memory circuit and the address memory circuit in FIG. 1, FIG. 3 is a configuration diagram schematically showing the line memory circuit in FIG. 1, and FIG. FIG. 1 is a time chart for explaining an interface between the line memory circuit and the printer, and FIG.
FIG. 6 is a data configuration diagram for explaining color signal data transmitted from the line memory circuit to the printer in the figure, and FIGS. 6 and 7 are signal configuration diagrams showing the contents of a one-page fax signal transmitted in fax broadcasting; FIG. 4 is a waveform diagram showing a schematic waveform of one line. 1 FAX signal memory circuit 3 Address memory circuit 5 CPU 7 Address generation circuit 9 Address counter circuit 11 Color signal conversion circuit 13 Line memory circuit 15 Color printer

Claims (3)

(57) [Claims] 1. A facsimile signal memory circuit for sequentially storing a demodulated facsimile signal from data of a first line for one page of a transmission screen, and a content stored in the facsimile signal memory circuit from a first line. An address counter circuit for reading out every three lines while counting from the beginning by a predetermined line, a color signal conversion circuit for converting output data from the address counter circuit into RGB color signals, respectively; A line memory circuit for storing one line of each of the RGB color signals; and a color signal conversion decoder for a facsimile broadcast receiver. 2. An address memory circuit for storing head address data of each line in said facsimile signal memory circuit, wherein said head address for a predetermined line from said first line is output to said address counter circuit. 2. A color signal conversion decoder for a facsimile broadcast receiver according to claim 1, further comprising an address memory circuit for setting an initial value of the count. 3. The color signal conversion decoder of a facsimile broadcast receiver according to claim 2, wherein said address memory circuit is constituted by a part of a memory constituting said facsimile signal memory circuit.