JP2572041B2 - Image forming device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image forming apparatus, such as a laser beam printer, for forming an image for printing by converting image data into a dot light beam.

[Prior art] In recent years, with the progress of semiconductor technology and the maturation of electrophotographic technology, laser beam printers (hereinafter referred to as LBPs) and copiers using LBPs have been developed because of the feature that high-quality and high-speed image recording is possible. Spreading rapidly. With this spread,
Due to the expansion of application fields such as printing, the demand for higher quality image recording for LBP is increasing. For this reason, it has been proposed to increase the recording dot density or perform gradation recording by using image data as multi-valued data and using a method such as pulse width modulation recording.

[Problems to be Solved by the Invention] However, the above demand for high-quality image recording inevitably leads to an increase in the amount of information of image data. However, this has problems in the following points.

: The image data is increased on the image sending side, for example, in the case of a document reading device that reads a document image and outputs a digital image signal, in order to increase the reading density (sub-scanning scan density). , The charge accumulation time is shortened, and it becomes more susceptible to noise and the like.
In addition, an increase in the amount of image data has a problem that the transmission frequency becomes high in transmission of image data, the transmission path cannot be lengthened, and the image data is weak against external noise. Further, when the amount of image data is increased, for example, when it is converted into multi-valued data, there is a problem that the load on the image processing apparatus increases due to the processing.

The following problems occur in an optical printer using a light beam such as an LBP. That is, when a recording dot is formed by a laser beam, it is difficult to form a beam spot into a square or rectangular shape, and therefore, a spot having a circular or elliptical shape is often used. In this circular or elliptical spot, a gap is inevitably formed between the spots. For this reason, conventionally, the spots are overlapped with each other so that no gap is generated. Therefore,
In particular, when the gradation is to be expressed by pulse width modulation, the pulse width (beam spot width) representing the gradation is changed due to the overlap between the beam lines, and the gradation is difficult to be expressed.

In particular, when an image is formed from image data whose resolution has been increased by performing interpolation, the deterioration of the gradation due to the overlap cannot be ignored.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the prior art, and has as its object to provide an image forming apparatus which performs an interpolation process and forms an image from the interpolated image data, wherein an overlap of a light beam is interpolated. It is an object of the present invention to propose an image forming apparatus capable of preventing the deterioration of the resolution and / or the gradation caused on the image data.

[Means for Solving the Problems] An image forming apparatus according to the present invention for achieving the above object comprises: image data input means for inputting digital image data for each pixel obtained by scanning and reading for each line; Interpolated image data generating means for refining digital interpolated image data for each pixel from the digital image data for one or a plurality of interpolated lines for interpolating, and generating a line synchronizing signal synchronized with image formation for each line A synchronizing signal generating means, a first pulse width modulation signal generated by comparing the digital image data or the digital interpolation image data with a first pattern signal, and a second pattern signal Pulse width modulation signal generating means for selectively outputting the second pulse width modulation signal according to the line synchronization signal, and pulse width modulation signal generating means. The beam was generated in accordance with first, second pulse width modulated signal,
An image forming means for forming an image, wherein the first pattern signal is a pattern signal having a predetermined number of pixels of the image data as one cycle, and having an extreme value inside the one cycle, and Is a pattern signal having a phase different from that of the first pattern signal.

[Operation] In the above configuration, the interpolation image generation means of the present invention forms an image from the image data and the interpolation image data, and forms an image from the image data by the pulse width modulation signal generation means and the image formation means. The pattern signal of
Since the pattern signal has an extreme value inside the one cycle, the pulse width of the image signal after the pulse width modulation is not from the beginning of one cycle of the pattern signal, but is `` inside one cycle ''. Growing from the “extreme” position, the spatial frequency of an image formed using such a pattern signal becomes constant, and substantially continuous pulse width modulation is possible, so that moire development and the like can be performed. The effect of reducing the beat and maintaining the gradation can be obtained. Further, since the second pattern signal is a pattern signal having a phase different from that of the first pattern signal, not only the overlap of the recording dots in the main scanning direction but also the overlap in the sub-scanning direction is reduced. In particular, deterioration of reproducibility of gradation expression during gradation recording by pulse width modulation is prevented.

Embodiment An embodiment according to the present invention will be described below in detail with reference to the accompanying drawings. The general feature of this embodiment is that a buffer memory is built in an output device such as a printer, interpolated image data is created from sent image information, and this is recorded as a line whose recording dot phase is relatively shifted. By doing so, dot recording of the number of image data transmitted is performed by the output device, thereby enabling high-quality image reproduction. In addition, the multivalued image data is binarized by pulse width modulation, and gradation control is easily performed when performing gradation recording using the bivalent image data. A case where the dot output device having the above-described features is applied to a so-called laser beam printer (LBP) will be described below.

<Laser Beam Printer> FIG. 2 is a view showing a specific application example of the LBP 9 to which the present invention is applied. This embodiment shows an embodiment in which the LBP 9 is combined with a document reading apparatus to form a so-called copying apparatus.
An outline of this copying apparatus will be described.

An original 3 placed on a platen glass 4 with a reading surface facing downward is scanned by an optical unit including a contact type line image sensor 1 such as a CCD and a light source 2, and the original image is converted into an electric signal. That is, the image signal read by the line image sensor 1 is read one line in the main scanning direction in one reading, and the pulse signal is outputted by the pulse motor 7, the pulley 5, the pulley 6, and the driving belt 10 in the sub-scanning direction. The optical unit is moved in the illustrated sub-scanning direction by the configured sub-scanning drive system to read the entire surface of the document 3. The image data of the original image converted into an electric signal by the line image sensor 1 is sent to an image processing circuit 8, and after being subjected to electric processing such as analog-to-digital signal conversion and shading correction by the image processing circuit 8, a plurality of bits are formed. The data is output to the LBP 9 as digital multi-valued image data.

In general, the scanning speed in the sub-scanning direction (for example, paper feed speed) of the reproduced image output by the LBP 9 basically matches the scanning speed of the optical unit in the sub-scanning direction with respect to the original,
As a result, no reduction or enlargement is performed in either the main scanning direction or the sub-scanning direction, and a reproduction output is obtained. Therefore,
In such a case, the resolution and gradation of the reproduced image directly depend on the scanning density when reading the original. That is, high-definition output images cannot be obtained from image data read at a coarse scanning density.

By the way, the necessity of the coarse scanning density is firstly that the data transfer rate cannot be increased due to the problem of the interface between the image processing circuit 8 and the LBP 9, and secondly, the charge accumulation of the line image sensor 1 It comes from requests such as the need to lengthen the time. As a result, LBP9
If the scanning density is the same as that of the reading side, the coarse reading density becomes the coarse recording density as it is, resulting in a decrease in resolution and the like.

Therefore, by applying the present invention to the LBP 9 of the copying apparatus as shown in FIG. 2, it is possible to interpolate the image data on the LBP 9 side (on the output side). In particular, it is possible to reduce the pixel (line) density in the sub-scanning direction.

Next, the dot recording mechanism in the laser beam printer 9 will be described with reference to FIG. The laser beam output from the semiconductor laser 19 is a collimator lens
The light is corrected to parallel light by 11 and is emitted to the polygon mirror 12 rotated in the direction shown by the scanner motor 13. The binary signal input to the semiconductor laser 19 is obtained by binarizing multi-valued image data by, for example, pulse width modulation, as described later.

Further, the laser beam reflected by the polygon mirror 12 is corrected by the fθ lens 14 to form a dot on the photosensitive drum 18. The polygon mirror 12 performs main scanning in the LBP 9.
The mirror 15 reflects the laser light before the photosensitive drum 18 is irradiated with the laser light, and generates a timing signal (= BD) for starting recording dot output by the optical sensor 17 via the optical fiber 16. Used for That is, the signal BD is a horizontal synchronization signal. The rotation of the photosensitive drum 18 in the illustrated direction gives a sub-scan. As will be described later, all the signals used inside the LBP 9 are created based on the signal BD generated by the optical sensor 17. Therefore, as shown in FIG.
From P9, the PH signal generated based on the signal BD is sent to the image processing circuit 8, and the multi-valued image data MI for LBP9 is output from the image processing circuit 8 in synchronization with the PH signal. This signal PH will be described later in detail.

<Image Data Interpolation> FIG. 4 is a diagram showing an example of image data interpolation in the LBP 9 according to the present embodiment. The outline is as follows.

In the document reading apparatus shown in FIG. 2, the document is scanned in the main scanning and sub-scanning directions. As a result, as shown in FIG. 4, the image data of the first line, the second line, and the third line are sequentially read. On the other hand, on the LBP 9 side, an interpolation line is provided between the recording scan of the first line (this scan is referred to as a main scan) and the main scan of the second line, and the image data of the interpolation line is also scanned (sub-scan). Output. This is interpolation of image data. Basically, image data of an interpolation line (hereinafter, referred to as interpolation image data) is synthesized from image data actually read by a reading device.

Various methods can be considered for this combining method depending on how to determine the pixel density of the interpolated image data. In addition, such a pixel density is set to which pixel position, in other words, 1 pixel.
Various embodiments are conceivable as to when to perform binarization of two pieces of interpolation image data. In the embodiment described below, as a method for determining the pixel density of the interpolation image data, as shown in FIG.
A method of using the correlation density (for example, average density) of the density of two pixels as the pixel density of the interpolation image data, or, as shown in FIG. 5B, of four or more pixels surrounding the pixels of the interpolation image data. It is also conceivable to use the correlation density as the density of the interpolated image data, or to use the correlation density of the pixels between the preceding and following lines as the density of the interpolated image data as shown in FIG.

Pixel position of interpolation image data (position at recording dot)
5 (a) and 5 (b), there is a method of forming a recording dot at a position shifted by a half dot width from the pixel position of the previous line, or as shown in FIG. 5 (c). It is also conceivable to form the interpolated image data at the same pixel position as the image data of the preceding and following lines. In particular, regarding the pixel position of the interpolation image data, as described above, in the LBP, in order to minimize the overlap of the recording dots due to the use of a circular or elliptical spot-shaped beam, the recording dot position of the interpolation line is required. Figure 5 (a),
It is preferable to make it as shown in (b). First in that regard
This will be described with reference to the drawings.

FIG. 1 shows the concept of scanning when recording on the LBP 9 side is viewed from the point of the laser beam spot. After being stored in a buffer memory (described later) built in the LBP 9, the main scan 1 read out as shown is recorded in a circular dot in the order of 1, 2, 3, 4 to n-1, n. Next, the recording dots of the sub-scan 1 are recorded in the same manner using the data stored in the same buffer memory while shifting the half-dot phase. Thereafter, based on the image data of one line sent from the document reading device, the recording of two lines of the main scan and the sub scan is repeated by the LBP 9 in the same manner.

Since the number of dots to be recorded by the LBP 9 is larger than the number of image data sent by the original reading device, the reading density of the original reading device is smaller than the reading density of 1 in the main scanning direction. The reading density of about 0.56. Therefore, in the document reading apparatus, compared with the conventional reading density of 1: 1, the accumulation time of the photocharge of the line image sensor 1 can be increased, and the transmission time of the image data can be increased. The following advantages are obtained: the image frequency can be lowered, and the circuit configuration is very advantageous. That is, as can be seen from FIG. 1, the overlap portion of the recording dots in the main scanning direction is extremely small. This greatly contributes to the fact that the interpolation lines are shifted by half a dot.
In addition, the provision of the interpolation line eliminates the need for using a laser having an elliptical spot as in the prior art. Further, since the recording dot of the interpolation line is shifted by a half dot width, the overlap in the sub-scanning direction also occurs. The area of the part is reduced.

Note that the dots a and b (the last dot recording position of the sub-scan for one line) drawn by the broken line in FIG. 1 will be described. The sub-scan in this embodiment is shifted from the main scan by half a dot. Since the example of the present embodiment correlates the dot recording of the sub-scan with the image data adjacent to the main scan, it is not necessary to record the dots a and b. However, recording may be performed when the recording density is high or when it is not necessary to take correlation of the image data. or,
In the position embodiment described later, dot recording at the final position as shown in FIG. 6 becomes possible.

<Interpolated Image Data Generation / Binarization Circuit> FIG. 7 is a block diagram of a circuit serving as an original circuit for generating interpolated image data and binarizing the interpolated image data together with input image data.

The multi-valued image data MI from the image processing circuit 8 is stored in the buffer memory 200. The multi-valued image data MO stored in the buffer memory 200 is passed through the selector 202 directly to the binarization circuit 2 by pulse width modulation for the main scan.
It is binarized by 03. On the other hand, for the sub scan, the image data MO read out from the buffer memory 200 is again subjected to density calculation for the interpolated image data by the density calculation circuit 201, and is subjected to pulse width modulation binarization via the selector 202. The signal is binarized by the circuit 203. The density calculating circuit 201 can obtain various correlation densities as shown in FIGS. 5 (a) to 5 (c) depending on the mode of the calculation. These specific calculations will become more apparent in specific circuit examples described later.

For both the main scan and the sub scan, the output of the binarization circuit 203 is modulated by the laser driver 204 into a laser beam. As described above, this laser beam is partially reflected by the reflection mirror 15 shown in FIG. 3, and becomes a BD signal.
This BD signal is input to the timing generation circuit 205 shown in FIG. 7, and is used to generate various reference timings.
One of the reference timings is a PH signal, which is a select signal for selecting the image data by the selector 202, which is divided into a main scan and a sub scan. Other reference timings are a read clock and a binary clock. In some embodiments described below, the recording dot of the interpolation line as shown in FIGS. 5A and 5B is shifted by a half dot (although not limited to a half dot width) with respect to the preceding line. Next, the relative phase relationship between the BD signal, the read clock, and the binarized clock as shown in FIGS. 8A and 8B is realized.

In FIG. 8A, the read clock and the binarized clock have the same phase for both the main scan and the sub scan. Therefore, in order to shift by half a dot in the sub-scan, the two clocks described above need only be shifted from the BD signal of the sub-scan by a predetermined amount (left margin + half dot). In this way, the data is read out with a half dot width shifted from the main scan in time, and the image data is binarized as it is. As a result, the recording dot of the sub scan is shifted by half a dot.

In addition, as shown in FIG. 8 (b), the read clock of the main scan and the read clock of the sub scan are generated in the same phase, and the binarized clock is shifted by a half dot width between both scans. In this case, the recording dot of the sub-scan is shifted half a dot from the recording dot of the main scan, as in FIG. 8 (a). Also, by shifting the binarized clock by a half dot width, the binarized clock extends over two pixels. Therefore, even if the average density is not calculated as shown in FIG. It is effective. This point will be described in detail in a third specific example described later.

<Pulse Width Modulation Binarization Circuit> Here, a specific circuit of the pulse width modulation binarization circuit 203 will be described with reference to FIG. DT is image data of the main scan line or the sub scan line. Image data DT is
The digital / analog conversion circuit (D / A conversion circuit) 20 converts the digital signal into an analog signal TL. This signal TL
Is connected to the positive input terminal of the comparator 22 at the next stage. The triangular wave generating circuit 21 is a circuit for repeatedly generating a triangular wave for one cycle of the clock CK in synchronization with the binarized clock CK. The signal TW, which is a triangular wave output, is output from the comparator 22
Is connected to the negative input terminal. Even if the signal TW is not a triangular wave but has a predetermined period and pattern, for example, a sawtooth wave,
It may be a sine wave.

During one image clock, signal TL is constant and signal TW
Changes gradually, and the output of the comparator 22 becomes "1" when the signal TW is smaller than the signal TL, and becomes the pulse width signal PW corresponding to the analog value of the signal TL. That is, the density of the image data is modulated to the pulse width.

<First Embodiment> Next, an example of a specific circuit configuration diagram of dot recording according to the present embodiment will be described with reference to FIG.

The input image data MI from the image processing device 8 is stored in the memory 30,
The information is temporarily stored in the memory 31. The reason why there are two memories is to perform writing and reading to the memory at the same time. While writing one line of input image data MI into one of the memories 30 and 31, the image data of the previous line is read twice from the other memory, ie, 1 time.
One round is for the main scan and the other round is for the secondary scan.
As the memories 30, 31, a first-in-first-out memory (FIFO memory), a random access static RAM, or the like can be used.

The memory control circuit 34 generates a signal MS for controlling the writing / reading of the memories 30 and 31 and for controlling the selector 33. The image data selected by the signal MS is input as image data MO to a D-type flip-flop (hereinafter, referred to as DFF) 35 at the next stage. These memories 30, 31, the selector 33, the memory control circuit 34, and the like substantially constitute the buffer memory 200 described above. The DFFs 35, 37, and 43 are used to match timings of image signals. Especially
DFF 37 forms a delay circuit for density calculation.

FIG. 11 shows the write / read timing control of the memory. Referring to FIG. 11, the signal BD is the above-mentioned horizontal synchronizing signal and is generated every time the laser beam starts the main scanning. The signal PH is a signal for determining whether the current scan is the primary scan or the secondary scan.
“1” is the sub scan. The signal MS changes so that the memories 30 and 31 are alternately selected for each main scan.
Therefore, the output MO of the selector 33 selects only one of the memories 30 and 31 during one cycle of the signal PH for the signal MS,
As a result, the same data appears twice in the output MO during the above-described one cycle. The second data is for the secondary scan. In this manner, the input multi-valued image data MI may be stored in the memory during one clock of the PH signal (= two pulses of the signal BD) as shown in FIG. The data MO is read twice from the buffer, and dots for two lines are recorded on the photosensitive drum 18.

Next, a circuit for calculating the pixel density for an interpolation line (sub scan) will be described. Returning to FIG. 10, the adding circuit 39 is a circuit for creating the density of the image data at the time of the sub-scan. The embodiment of FIG. 10 performs the density calculation shown in FIG. 5A, that is, the averaging of adjacent pixel data in the previous line (main scan). The adder circuit 39 is, for example, an 8-bit adder, and the output Y = (A + B). By taking the upper 8 bits of this output and ignoring the lower 1 bit and inputting the upper 8 bits to the next selector 42, the division by 2 is realized. That is, Y = (A + B) / 2 is obtained. Thus, the density calculation circuit 201 shown in FIG. 7 is realized.

The selector 42 is a circuit for selecting data during the main scan and the sub scan. When the signal PH is "0", the A input (that is, the main scan) is selected, and when the signal PH is "1", the input is high. It is assumed that the B input (that is, the sub scan) is selected.

The image data DT timed by the DFF 43 is pulse width modulated by the PWM circuit 44 according to the value of the image data DT, and is converted into a pulse signal PW. This PWM circuit 44 has been described in detail in FIG. 9 in relation to the pulse width modulation binarization circuit 203 in FIG. It should be noted here that the binary clock used in the PWM circuit 44 and the clock used for reading the memory are the same clock CK. That is, since this corresponds to the phase relationship in FIG. 8A, in the sub-scan cycle, the clock CK needs to be shifted by half a dot as shown in FIG. 8A. A circuit for this will be described with reference to the following timing generation circuit.

The laser driver 45 is a pulse width modulated binary signal.
The semiconductor laser 46 (the semiconductor laser 19 in FIG.
The semiconductor laser 46 is turned on at a timing near the time when the signal BD is generated by the optical sensor 47 (corresponding to the optical sensor 17 in FIG. 3). The signal BD generated by the optical sensor 47 is used to generate a signal PH at a toggle flip flop (TFF) 48.
That is, the signal PH is inverted for each signal BD.

The signal BD is also used for synchronizing the clock CK by a counter 49 which is a synchronous up counter. The counter 49 divides the clock MC output from the oscillation circuit (OSC) 50 to generate a clock CK. In this embodiment, the counter 49
Is a 4-bit counter, so that the frequency ratio between the clock MC and the clock CK is 16: 1. In order to create a phase shift to be generated between the main scan and the sub scan, that is, to accurately record dots on the photosensitive drum 18 with respect to the signal BD, the uppermost preset input (D ) Is the signal PH input. The signal BD is input to the parallel load (LD) terminal of the counter 49. Then, each time the signal BD is input, the signal PH is inverted, and the preset value of the counter 49 becomes “0” or “8” according to the signal PH. Clock CK is the last stage of counter 49 (QD)
, The phase of the clock CK is shifted by a half cycle between the main scan and the sub scan. In this embodiment, the clock
Since one cycle of CK corresponds to one dot, a half cycle shift is a half dot shift.

Next, an example of the circuit operation of FIG. 10 will be described using the timing chart of FIG.

In FIG. 12, the timing when the output of the TFF 48 in FIG. 10 = PH signal is “0” (main scan) is set to the upper half,
The timing of “1” (sub scan) is shown in the lower half.

When the PH signal is "0", the image data DT is read out with a clock delay of only the left margin as shown in the figure.
When the PH signal is "0", the counter 49 in FIG. 10 starts the count-up operation from the value "0" when the signal BD changes from "1" to "0". Therefore, the output terminal of the clock MC divided by 16
The QD outputs a clock CK as shown in FIG.

On the other hand, when the PH signal is "1", the image data DT is read out with a clock delay of (left margin + half clock) as shown. This is the counter 49
This is because when the signal BD changes from "1" to "0", the count-up operation starts from the value "8". Thus, the sub scan is recorded at a position shifted by a half dot width from the recording dot of the main scan. The image data DT is a signal
Since the averaging value of the adding circuit 39 is selected by PH
For the dot when the PH signal is "0", the dot as shown is recorded.

<Effects of First Embodiment> According to the embodiment described above, the following effects can be obtained.

: By generating interpolation lines from image data,
A reproduced image having a high resolution can be obtained by the image data having a small amount of information. The small amount of information enables low-speed data transfer and prevents the occurrence of interface problems. Also, since the reading density in the sub-scanning direction can be lowered,
When D or the like is used, the charge accumulation time can be extended. Of course,
It is also possible to insert a plurality of interpolation lines between the preceding and following main lines.

: By adding an interpolation line, the spot of the laser beam can be changed from elliptical to circular.

: Since the recording dot in the sub-scan is shifted by a half dot width with respect to the recording dot in the main scanning, it is possible to reduce not only the overlapping of the recording dot in the main scanning direction but also the overlapping in the sub-scanning direction. At the time of gradation recording by pulse width modulation, reproducibility of gradation expression is prevented from deteriorating.

: Since the pixel density of the interpolated image data (sub scan) is the average value (correlation value) of the pixel densities of the left and right of the corresponding previous line (main scan), the image reproduction of the interpolated line is smooth and the resolution is deteriorated. do not do.

: To shift the recording dot of the sub scan by half a dot width, generate a read clock and a binarized clock after synchronizing with the horizontal synchronizing signal (BD), and generate a preset counter for the clock. , The deviation of the half dot can be reliably generated, and the circuit scale is simple.

<Second Embodiment> In the embodiment shown in FIG. 10, the density of the interpolated image data of the sub-scan is generated based on the concept shown in FIG. 8A. In the next embodiment shown in FIG. 13, the density is set in accordance with the concept of FIG. 8 (b). That is, for the interpolated image data of the interpolated line, the average density of the four pixels of the two main lines around the interpolated line is calculated. By doing so, the reproducibility of fine lines and the reproducibility of gradation can be further improved as compared with the embodiment of FIG.

Description will be made according to the circuit shown in FIG. Memory 30,31,
The number 32 is required because two lines of image data are processed simultaneously. The select signal MS of the selector 33 is a 2-bit signal.
MS ₀ and MS ₁ . The adders 39 to 41 are circuits for obtaining the image data density of the sub scan. The adder circuit 39 calculates the average density of the previous main line, the adder 40 calculates the average density of the next main line, and the adder 41 calculates the average density of four pixels. In the counters 39 to 41, similarly to the adder of the tenth circuit, a bit shift technique is used to divide by "2". As a result, two bits are shifted, and (A + B + C + D) / 4 is obtained.

FIG. 14 shows the timing charts of the signals BD, PH, MI, MO, MO ', MS ₀ and MS ₁ . Here, MO and MO 'are image data outputs of the preceding main line and the following main line, respectively.

<Effects of Second Embodiment> In addition to the effects obtained from the above-described FIG. 10 embodiment, since the density is averaged also in the sub-scanning direction, the resolution is improved, and in particular, the reproducibility of fine lines in the vertical direction is improved. To rise.

<Third Embodiment> The main purpose of the third embodiment shown in Fig. 15 is to achieve substantially the same effect with a circuit simplified than the above two embodiments. As shown in FIG. 8 (b), the binarization clock is generated by shifting the half-dot width in the sub-scan, so that one binarization clock extends over two pixels. When binarization is performed by pulse width modulation, an effect equivalent to binarization based on the average density described in the two embodiments can be obtained.

Therefore, the read clock CC and the binary clock CK
Are generated with a shift of a half cycle. The counter 49 is the same as that of the first and second embodiments. Readout clock
CC always has a constant phase for any signal BD because of the exclusive OR gate 52. That is, the phase does not change between the main scan and the sub scan. However, the phase of the binarized clock CK is shifted by a half cycle between the main scan and the sub scan as in the above two embodiments. This way,
As shown in FIG. 16, the read clock CC and the binary clock CK have the same phase in the main scan (signal PH is "0"), but have the opposite phase in the sub scan (PH is "1").

When such a binarized clock CK is input to the PWM circuit shown in FIG. 9, the signal TW is output in synchronization with the clock CK. Therefore, in the sub-scan, it is binarized by a triangular wave TW shifted by half a dot. . At this time, the output of the PWM circuit is the image data DT
Can be considered as a dot based on the average value of adjacent pixels, and the same effect can be obtained simply by shifting the binarized clock by a half cycle. In addition, PH =
In the timing chart for “1”, the shape of the recording dot is set to a semicircle so that it can be visually understood that the dot of the secondary scan based on this example produces the same effect as the binarization based on the average density. It is drawn with something like that. Of course, the actual dot shape is a circle, but the dot width corresponds to the average density of two pixels.

<Fourth Embodiment> In the fourth embodiment shown in FIG. 17, in order to obtain the same effect as the second embodiment shown in FIG. The method of calculating the "pseudo" average density described in the third embodiment is applied. As a result, the circuit configuration of this example is different from the circuit of FIG. 13 in that the number of necessary adders is only 39 for calculating the average density only in the sub-scanning direction. The circuit configuration is the same as that of FIG. 15 so that the phase relationship of the clock CC is reversed in the sub scan cycle. By doing so, the effect obtained by the embodiment of FIG. 13 can be obtained with a much simplified circuit configuration.

<Other Modifications> In the embodiment described above, a circular recording dot is used as shown in FIG. 1 and the like. However, by using an ellipse or the like as the dot shape, a laser beam printer can be used. Recording methods shown in FIGS. 18 (a) to 18 (c) are conceivable.

FIG. 18 (a) is a diagram showing an arrangement of recording dots when the ratio between the main scanning density and the sub-scanning density of the image data sent to the LBP 9 is 1: 1. Similarly, FIG. 18 (b) shows LB
FIG. 11 is a diagram showing an arrangement of recording dots when the ratio between the main scanning density and the sub-scanning density of the image data sent to P9 is 2: 1. FIG. 18 (c) is a diagram showing an arrangement of recording dots when the ratio between the main scanning density and the sub-scanning density of the image data sent to the LBP 9 is 1: 2.

In this embodiment, LBP is assumed as an output device. However, the present invention is applicable to any output device capable of dot recording, and thus this embodiment is not limited to this.

[Effect of the Invention] As described above, the image forming apparatus of the present invention can generate an image with improved resolution by performing image interpolation. Further, at least two pattern signals are used in pulse width modulation of the image, and one of the pattern signals is a pattern signal having a predetermined number of pixels of image data as one cycle and having an extreme value inside the one cycle, Since the other pattern signal is a pattern signal having a phase different from that of the one pattern signal, it is possible to prevent an overlap phenomenon and maintain gradation.

[Brief description of the drawings]

FIG. 1 is a diagram for explaining the occurrence of recording dots when the present invention is applied to an LBP, FIG. 2 is a block diagram of a copying apparatus when the present invention is applied to an LBP, and FIG. FIGS. 4 (a) and 4 (b) are diagrams for explaining the relationship between original reading scanning and laser beam scanning. FIGS. 5 (a) to 5 (c) illustrate the principle of generating the density of interpolated image data. FIG. 6 is a diagram for explaining a modification of FIG. 1, FIG. 7 is a circuit block diagram for explaining the principle operation of the embodiment, and FIGS. 8 (a) and (b) are read clocks and FIG. FIG. 9 is a circuit diagram of a PWM circuit, FIG. 10 is a circuit diagram of a first embodiment, FIG. 11 is a memory read timing chart of a buffer memory in the first embodiment, FIG. 12 is an operation timing chart of the first embodiment and the second embodiment. FIG. 13 is a circuit diagram of the second embodiment, FIG. 14 is a timing chart of memory reading of the second and fourth embodiments, FIG. 15 is a circuit diagram of the third embodiment, and FIG. FIG. 17 is a circuit diagram of the fourth embodiment, and FIGS. 18 (a) to 18 (c) are diagrams for explaining recording dots in other modified examples. In the figure, 1 ... line image sensor, 3 ... document, 8 ... image processing circuit, 9 ... LBP, 11 ... collimator lens, 12 ...
… Polygon mirror, 15… Reflection mirror, 17 …… Sensor,
19,46… Semiconductor laser, 20… D / A converter, 21… Triangular wave generation circuit, 22… Comparator, 30, 31, 32… Memory, 33, 42… Selector, 35, 36, 37 , 38, 43, 48… flip flop, 39, 40, 41… adder, 44… PWM circuit, 45
... Laser driver, 49 ... Counter, 200 ... Buffer memory, 201 ... Density calculation circuit, 202 ... Selector, 20
Reference numeral 3 denotes a pulse width modulation binarization circuit, and reference numeral 205 denotes a timing chart generation circuit.

Claims (1)

(57) [Claims] 1. An image data input means for inputting digital image data for each pixel obtained by scanning and reading for each line, and said digital image data for one or a plurality of interpolation lines for complementing between said lines. An interpolated image data generating means for generating digital interpolated image data for each pixel, a synchronizing signal generating means for generating a line synchronizing signal synchronized with image formation for each line, and the digital image data or digital interpolated image data, A first pulse width modulation signal generated by comparing with the first pattern signal and a second pulse width modulation signal generated by comparing with the second pattern signal are changed according to the line synchronization signal. A pulse width modulation signal generating means for selectively outputting; a first signal generated by the pulse width modulation signal generating means;
Image forming means for generating a beam in accordance with a second pulse width modulation signal to form an image, wherein the first pattern signal has a predetermined number of pixels of the image data as one cycle, and the inside of the one cycle Is a pattern signal having an extreme value, and the second pattern signal is
An image forming apparatus, wherein the pattern signal has a phase different from that of the pattern signal.