JP2570624B2 - Encryption device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an encryption device, and more particularly to a data encryption device for encrypting and decrypting data exchanged between a data terminal device and a line connection device.

[0002]

2. Description of the Related Art Conventionally, as shown in FIG. 3, a data encryption device of this type is provided between a data terminal equipment (DTE) 2 and a line connection device (DCE) 4, or between a line connection device 6 and a host device. (HOST) 8.

That is, for example, data transmitted from the data terminal equipment 2 is transmitted to a data encryption device (CIPHER) 3
Is transmitted to the line connection device 4 via the network (NW) 5 from the line connection device 4.
Sent to Data received by the line connection device 6 via the network 5 is decrypted by the data encryption device 7 and sent to the host device 8.

[0004] As shown in FIG. 4, the data terminal device 2 includes an encryption unit including an encryption circuit 31, a timer 32 and an OR circuit 33, and a timer 34, a decryption circuit 35 and an OR circuit 36. And a decoding unit.

[0005] The encryption circuit 31 of the encryption unit converts the transmission data DSD from the data terminal equipment 2 into a transmission timing MST2 from the line connection device 4 and a transmission enable signal MCS from the line connection device 4 indicating whether transmission is possible or not. And sends the transmission data MSD to the line connection device 4.

The timer 32 transmits a transmission enable signal MCS from the line connection device 4 to a transmission request DRS from the data terminal equipment 2.
The signal is output to the OR circuit 33 after being delayed for a certain time by the transmission timing MST2 from the line connection device 4.

The OR circuit 33 takes the logical sum of the transmission request DRS from the data terminal equipment 2 and the transmission enable signal MCS delayed by a certain time by the timer 32, and outputs the operation result as the transmission enable signal DCS.

Here, the transmission timing MST2 from the line connection device 4 is transmitted to the data terminal equipment 2 by the transmission timing DS.
Output as T2, the transmission request DRS from the data terminal equipment 2 is output to the line connection device 4 as a transmission request MRS.

On the other hand, the timer 34 of the decoding section delays the reception signal detection signal MCD from the line connection device 4 by a predetermined time to generate a reception signal detection signal MCD3, and outputs the reception signal detection signal MCD3 to the OR circuit 36. I do.

A decoding circuit 35 decodes the data MRD received from the line connection device 4 by using the reception timing MRT and the reception signal detection signal MCD from the line connection device 4,
The decrypted data is sent to the OR circuit 36.

The OR circuit 36 performs an OR operation on the reception signal detection signal MCD3 from the timer 34 and the reception data MRD decoded by the decoding circuit 35, and sends the operation result to the data terminal equipment 2 as transmission data DRD. I do.

That is, the OR circuit 36 is connected to the decoding circuit 35
Is clamped by the received signal detection signal MCD3 from the timer 34.

Here, the reception timing MRT from the line connection device 4 is transmitted to the data terminal equipment 2 by the reception timing DRT.
And the received signal detection signal MCD from the line connection device 4 is transmitted to the data terminal equipment 2 by the received signal detection signal DCD.
Is output as

The data encryption device 7 has the same configuration as the data encryption device 3 described above, and its operation is the same as that of the data encryption device 3.

FIG. 5 is a time chart showing the operation of the data encryption device 3 configured as described above. The operation of the data encryption device 3 will be described with reference to FIGS.

When receiving the transmission request DRS from the data terminal equipment 2, the data encryption device 3 outputs the transmission request DRS to the line connection device 4 as a transmission request MRS. Thereafter, the data encryption device 3 transmits the transmission enable signal MCS output from the line connection device 4 in response to the transmission request MRS,
A transmission request signal MCS is delayed by the timer 32 for a fixed time by the transmission request DRS from the data terminal device 2 and the transmission timing MST2 from the line connection device 4 and the delayed transmission enable signal MCS is transmitted to the data terminal device 2 via the OR circuit 33. Output as DCS.

When the data terminal device 2 sends out the transmission data DSD in response to the transmission enable signal DCS, the data encryption device 3 uses the encryption circuit 31 to transmit the transmission data DSD (plaintext) from the data terminal device 2. Is encrypted by the transmission timing MST2 from the line connection device 4 and the transmission enable signal MCS from the line connection device 4, and is transmitted to the line connection device 4 as transmission data MSD (cipher text).

However, the encryption circuit 31 is configured to start transmitting the transmission data MSD (encrypted text) from the time when the transmission enable signal MCS from the line connection device 4 is input.

On the other hand, the data encryption device 3 receives the reception data MRD and the reception signal detection signal MCD from the line connection device 4.
Is received, the reception signal detection signal MCD is output to the data terminal equipment 2 as the reception signal detection signal DCD, and the reception signal detection signal MCD is delayed by the timer 34 for a predetermined time to generate the reception signal detection signal MCD3.

When the data encryption device 3 receives the received signal detection signal MCD from the line connection device 4, the data encryption device 3 starts the decoding of the reception data MRD from the line connection device 4 by the decryption circuit 35.

However, the received data MRD decoded by the decoding circuit 35 is clamped by the OR circuit 36 until the timer 34 outputs the received signal detection signal MCD3.

The received signal detection signal MCD3 from the timer 34
Is output, the OR circuit 36 sends the received data MRD decoded by the decoding circuit 35 to the data terminal equipment 2 as the received data DRD.

Generally, in order to decrypt the encrypted data, it is necessary that the data in the encrypting unit and the data in the decrypting unit match, but on the receiving side, a certain amount of data is kept until the decrypting circuit 35 synchronizes the received data. It is necessary to receive data by the number of bits of.

The time from when the reception signal detection signal MCD output from the line connection devices 4 and 6 is turned on to when data actually appears in the reception data MRD output from the line connection devices 4 and 6 is applied. There are differences and variations depending on the line and the transmission method.

Accordingly, the timer 34 of the data encryption device 3 is set to a sufficiently long time including the time required for synchronizing the decryption circuit 35 and these variations.

The delay time of the timer 32 for delaying the transmission enable signal MCS supplied from the line connection devices 4 and 6 is set to be longer than the delay time of the timer 34 with a margin. .

[0027]

In the above-described conventional data encryption apparatus, as described above, the delay time of the timer for delaying the transmission enable signal becomes long, and the transmission request from the data terminal equipment is turned on. Since the time from when the transmission enable signal to the data terminal device is turned on to the ON state becomes longer, the waiting time in the data terminal device becomes longer, and the use efficiency of the communication line is reduced.

Therefore, an object of the present invention is to solve the above-mentioned problems and to reduce the waiting time in a data terminal device by shortening the time from when a transmission request is turned on to when a transmission enable signal is turned on. Another object of the present invention is to provide an encryption device capable of improving the efficiency of use of a communication line.

[0029]

According to the present invention, there is provided a cryptographic apparatus comprising: a communication terminal for transmitting data between a data terminal device and a line connection device; An encryption circuit for encrypting data transmitted to the data connection device, and a decryption circuit for decrypting data received from the line connection device in response to a received signal detection signal indicating transmission of data from the line connection device to the data terminal device A change point detecting means for detecting a change point of the transmission enable signal from the transmission disable to the transmission enable, and transmitting the change signal when the change point detection means detects the change point. Insertion means for inserting a signal of a predetermined level at the beginning of the encrypted data of the data, and the transmission permission signal indicating the transmission permission, which is set in advance after the change point detection means detects the change point. A transmission enable signal delay unit that outputs the data signal to the data terminal device with a constant time delay, wherein the predetermined signal inserted into the encrypted data after the reception signal detection signal changes from incapable to incapable. Detection means for detecting a signal of a level, a reception signal detection signal delay means for outputting an output signal of the detection means with a delay of a predetermined time, and delaying the decoded reception data with the reception signal detection signal Means for fixing the output signal from the means to a preset level.

In another encryption apparatus according to the present invention, in addition to the above-mentioned configuration, the transmission permission signal indicating the transmission permission is fixed to a predetermined setting level by an output signal of the transmission permission signal delay means. Provided in the encryption circuit.

[0031]

A "0" is inserted at the beginning of the transmission data from the encryption circuit, which is output after a change point of the transmission enable signal from the line connection device from off to on is detected, and transmission indicating that transmission is possible. After detecting the change point, the enable signal is output to the data terminal device with a delay of a predetermined time.

On the other hand, after detecting the "0" inserted at the head of the received data after the received signal detection signal is turned on, the received data from the decoding circuit is clamped by the received signal detection signal delayed for a predetermined time. Cancel.

Thus, the delay time of the timer for delaying the transmission enable signal can be made equal to the delay time of the timer for delaying the reception signal detection signal.

Therefore, it is possible to prevent variations in the operation timing of the line connection device, etc., so that the time from when the transmission request is turned on to when the transmission enable signal is turned on is shortened, and , It is possible to reduce the waiting time, and it is possible to improve the use efficiency of the communication line.

[0035]

Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of one embodiment of the present invention. In the figure, an encryption unit of the data encryption device 1 includes an encryption circuit 11, OR circuits 12, 19, an AND circuit 13, an inversion circuit 14, and a flip-flop 1.
5, 16, a NAND circuit 17, and a timer 18.

The decryption unit of the data encryption device 1 includes inverting circuits 20 and 21, a flip-flop 22, a timer 23, a decrypting circuit 24, and an OR circuit 25.

The system configuration including the data encryption device 1 according to one embodiment of the present invention is the same as that of the conventional example shown in FIG. 3, and the data encryption device 1 includes a data terminal device 2 and a line connection device 4. Or between the line connection device 6 and the host device 8.

The encryption circuit 11 of the encryption section encrypts the transmission data DSD from the data terminal equipment 2 by the transmission timing MST2 from the line connection device 4 and the output of the flip-flop 16, and transmits the transmission data DSD to the line connection device 4. MS
D is transmitted through the OR circuit 12 and the AND circuit 13.

The OR circuit 12 takes the logical sum of the output of the encryption circuit 11 and the output of the flip-flop 16 and outputs the result of the operation to the AND circuit 13. The AND circuit 13 calculates the logical product of the output of the OR circuit 12 and the output of the NAND circuit 17, and outputs the operation result to the line connection device 4 as transmission data MSD.

The inverting circuit 14 inverts the transmission timing MST 2 from the line connection device 4 and supplies the inverted output to flip-flops 15 and 16.

The flip-flop 15 holds the transmission enable signal MCS from the line connection device 4 at the timing of the inverted output of the inverting circuit 14, and stores the held content in the flip-flop 16
And outputs the inverted value of the held content to the NAND circuit 17.

The flip-flop 16 holds the output of the flip-flop 15 at the timing of the inverted output of the inverting circuit 14, and outputs the held content to the encryption circuit 11, the OR circuit 12, and the NAND circuit 17, respectively.

The NAND circuit 17 takes the NAND of the inverted output of the flip-flop 15 and the output of the flip-flop 16 and outputs the operation result to the AND circuit 13.

The timer 18 outputs the output of the flip-flop 16 (the transmission enable signal MCS from the line connection device 4) to the transmission request DRS from the data terminal equipment 2, the transmission timing MST 2 from the line connection device 4, and from the line connection device 4. Is output to the OR circuit 19 after being delayed for a predetermined time by the transmission enable signal MCS.

The OR circuit 19 takes the logical sum of the transmission request DRS from the data terminal equipment 2 and the output of the flip-flop 16 delayed for a predetermined time by the timer 18, and uses the result of the operation as the transmission enable signal DCS. Output to

Here, the transmission timing MST2 from the line connection device 4 is transmitted to the data terminal equipment 2 by the transmission timing DS.
Output as T2, the transmission request DRS from the data terminal equipment 2 is output to the line connection device 4 as a transmission request MRS.

The inverting circuit 20 of the decoding unit is connected to the line connection device 4
, And supplies the inverted output to the flip-flop 22. The inversion circuit 21 inverts the received signal detection signal MCD from the line connection device 4 and outputs the inverted output to the flip-flop 22.

The flip-flop 22 holds the logical value "1" at the timing of the inverted output of the inverting circuit 20, and outputs the held content to the timer 23 as the received signal detection signal MCD1. The flip-flop 22 is reset by the inverted output of the inverting circuit 21.

The timer 23 generates the reception signal detection signal MCD2 by delaying the reception signal detection signal MCD1 from the flip-flop 22 by a predetermined time according to the reception timing MRT and the reception signal detection signal MCD from the line connection device 4,
This reception signal detection signal MCD2 is output to the OR circuit 25.

The decoding circuit 24 decodes the data MRD received from the line connection device 4 by using the reception timing MRT and the reception signal detection signal MCD from the line connection device 4,
The decrypted data is sent to the OR circuit 25.

The OR circuit 25 performs an OR operation on the reception signal detection signal MCD2 from the timer 23 and the data decoded by the decoding circuit 24, and calculates the result of the OR operation with the transmission data DRD.
To the data terminal equipment 2. That is, the OR circuit 25 releases the clamp of the data decoded by the decoding circuit 24 with the received signal detection signal MCD2 from the timer 23.

Here, the reception timing MRT from the line connection device 4 is transmitted to the data terminal equipment 2 by the reception timing DRT.
And the received signal detection signal MCD from the line connection device 4 is transmitted to the data terminal equipment 2 by the received signal detection signal DCD.
Is output as

FIG. 2 is a time chart showing the operation of the data encryption device 1 of FIG. The operation of the data encryption device 1 will be described with reference to FIGS.

When receiving the transmission request DRS from the data terminal equipment 2, the data encryption device 1 outputs the transmission request DRS to the line connection device 4 as a transmission request MRS. After that, the data encryption device 1 samples the transmission enable signal MCS output from the line connection device 4 by the flip-flops 15 and 16 in response to the transmission request MRS.

When the transmission enable signal MCS is sampled by the flip-flops 15 and 16 and a change point of the transmission enable signal MCS from off (“1”) to on (“0”) is detected, the flip-flop 15 is inverted. A pulse (“0”) having a 1-bit width is output from the NAND circuit 17 to the AND circuit 13 based on the output (“1”) and the output (“1”) of the flip-flop 16.

The transmission enable signal MCS is output to the timer 18 via the flip-flops 15 and 16, and is transmitted for a fixed time by the timer 18 based on the transmission request DRS from the data terminal equipment 2 and the transmission timing MST 2 from the line connection device 4. Be delayed.

The transmission enable signal MCS delayed by the timer 18 for a predetermined time is output to the data terminal equipment 2 via the OR circuit 33 as the transmission enable signal DCS.

When the data terminal device 2 sends out the transmission data DSD in response to the transmission enable signal DCS, the data encryption device 1 uses the encryption circuit 11 to transmit the transmission data DSD (plaintext) from the data terminal device 2. Is encrypted by the transmission timing MST2 from the line connection device 4 and the output from the flip-flop 16, and the encrypted data is
2 and to the line connection device 4 via the AND circuit 13 as transmission data MSD (cipher text).

At this time, “0” is inserted at the head of the transmission data MSD to the line connection device 4 by a 1-bit width pulse (“0”) from the NAND circuit 17 in the AND circuit 13. Further, the encryption circuit 11 has a flip-flop 16
The transmission of the transmission data MSD (encrypted text) is started at the time when the output of the data is input.

On the other hand, the data encryption device 1 receives the reception data MRD and the reception signal detection signal MCD from the line connection device 4.
Is received, the reception signal detection signal MCD is output to the data terminal equipment 2 as the reception signal detection signal DCD.

When the flip-flop 22 detects “0” inserted at the head of the reception data MRD after the reception signal detection signal MCD is turned on, the flip-flop 22 detects the reception signal detection signal MCD.
1 is generated and output to the timer 23. Timer 23 receives reception signal detection signal MC input from flip-flop 22.
D1 is delayed for a predetermined time to generate a received signal detection signal MCD2.

When the data encryption device 1 receives the received signal detection signal MCD from the line connection device 4, the data encryption device 1 starts the decryption of the reception data MRD from the line connection device 4 by the decryption circuit 24.

However, the received data MRD decoded by the decoding circuit 24 is clamped by the OR circuit 25 until the timer 23 outputs the received signal detection signal MCD2.

The received signal detection signal MCD2 is output from the timer 23.
Is output, the OR circuit 25 releases the clamp of the reception data MRD decoded by the decoding circuit 24, and sends it to the data terminal equipment 2 as the reception data DRD.

Although the configuration and operation of the data encryption device 1 are shown in the case of low active, it can be easily applied to the case of high active by changing the circuit configuration and operation.

As described above, the flip-flops 15, 16
, The transmission data M from the encryption circuit 11 which is output after a change point of the transmission enable signal MCS from off to on is detected.
The AND circuit 13 inserts “0” at the beginning of the SD, and the transmission enable signal MCS indicating the transmission permission is detected by the above-mentioned change point and then delayed by the timer 18 for a preset fixed time so that the data terminal equipment 2 And the received signal detection signal MCD
Is turned on, the flip-flop 22 detects "0" inserted at the head of the received data MRD, and the OR circuit 25 decodes the received signal detection signal MCD2 delayed by the timer 23 for a predetermined time. The delay time of the timer 18 for delaying the transmission enable signal MCS is the same as the delay time of the timer 24 for delaying the reception signal detection signal MCD1 from the flip-flop 22 by clamping the reception data DRD from the conversion circuit 24. Can be

Therefore, it is possible to prevent variations in the operation timing of the line connection device 4 and the like.
The time from when the transmission request DRS is turned on to when the transmission enable signal DCS is turned on can be shortened, the waiting time in the data terminal equipment 2 can be reduced, and the efficiency of use of the communication line can be improved.

[0069]

As described above, according to the present invention, encryption of transmission data is performed when a change point from a transmission disable signal to a transmission enable state of a transmission enable signal from a line connection device indicating transmission enable or disable is detected. A signal of a predetermined level is inserted at the beginning of the coded data, and a transmission enable signal indicating that transmission is possible is output to the data terminal equipment with a predetermined fixed time delay after detecting the change point and outputting the data to the data terminal equipment. The output signal of the detection means for detecting a signal of a predetermined level inserted in the encrypted data after the reception signal detection signal indicating the data transmission to change from impossible to enabled is output with a predetermined specific time delay, By clamping the received data decoded with this output signal, the time from when the transmission request is turned on to when the transmission enable signal is turned on is shortened, and the waiting time in the data terminal device is reduced. Can cause lack, there is an effect that it is possible to improve the utilization efficiency of the communication line.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

FIG. 2 is a time chart illustrating an operation of the data encryption device of FIG. 1;

FIG. 3 is a block diagram showing a system configuration of data transmission.

FIG. 4 is a block diagram illustrating a configuration of the data encryption device of FIG. 3;

FIG. 5 is a time chart showing an operation of the data encryption device of FIG. 4;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Data encryption device 11 Encryption circuit 12, 19, 25 OR circuit 13 AND circuit 14, 20, 21 Inversion circuit 15, 16, 22 Flip-flop 17 NAND circuit 18, 23 Timer 24 Decryption circuit

 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-62-234447 (JP, A) JP-A-3-129936 (JP, A) JP-A-2-135937 (JP, A) JP-A-2- 100437 (JP, A) JP-A-8-149318 (JP, A) W. DAVIS, W.M. L. PRI CE, translated by Kamizono, "Network Security" (Showa 60-12-5), Nikkei Tuna Uhill p. 302−307

Claims (3)

(57) [Claims] 1. An encryption circuit for encrypting transmission data to said line connection device according to a transmission enable signal from said line connection device indicating whether transmission is possible or not between a data terminal device and a line connection device. A decryption circuit for decrypting data received from the line connection device in response to a reception signal detection signal indicating data transmission from the line connection device to the data terminal device, A change point detecting means for detecting a change point from the transmission impossible to the transmission enable state of the enable signal; and a predetermined level at the head of the encrypted data of the transmission data when the change point detection means detects the change point. Insertion means for inserting a signal;
The transmission enable signal delay means for outputting the transmission enable signal indicating the transmission enable to the data terminal device with a delay of a preset fixed time after the change point detection means detects the change point; Detecting means for detecting the signal of the predetermined level inserted in the encrypted data after the received signal detection signal changes from unacceptable to enabled, and identifying an output signal of the detecting means in a predetermined manner A reception signal detection signal delay unit that outputs with a time delay, and a unit that fixes the decoded reception data to a preset level preset by an output signal of the reception signal detection signal delay unit are included in the decoding circuit. An encryption device comprising: 2. The encryption circuit according to claim 1, wherein said encryption circuit includes means for fixing said transmission enable signal indicating said transmission enable to a predetermined setting level by an output signal of said transmission enable signal delay means. Encryption device. 3. The encryption device according to claim 1, wherein the insertion unit is configured to insert a signal indicating a logical zero at a head of the transmission data.