JP2569594B2 - Color image display circuit - Google Patents

Description

The present invention relates to a mosaic pixel array color image display circuit.

[Conventional technology]

2. Description of the Related Art In the field of image devices such as televisions, devices using a liquid crystal or the like as a display are increasing. For example, in a liquid crystal television, as a method of transferring an image signal to a liquid crystal display unit, there is a method in which an image signal that is an analog value is converted into a digital value by an A / D converter and transferred.

Conventionally, as shown in FIG. 3, A / D converters 31 to 33 are provided for each color signal (R, G, B), and an N-bit digital output signal is multiplexed to drive a color image display 36. Was.

[Problems to be solved by the invention]

However, the conventional color image display circuit requires three A / D converters, which causes an increase in cost. Furthermore, the number of outputs after A / D conversion was 3N, which was extremely large, and the printed circuit board mounting area was increased.

Therefore, the present invention solves such a problem.
The purpose is to reduce the cost by reducing the number of A / D converters to one, and to reduce the printed circuit board mounting area.

[Means for solving the problem]

The color image display circuit of the present invention is a color image display circuit for displaying an image on a color image display body in which pixels of three primary colors are repeatedly arranged in a horizontal direction and the same color is not arranged adjacent to each other in a vertical direction. A circuit for sequentially selecting and outputting analog three primary color signals of an image signal based on a selection signal; and an A / D for converting an output of the selection means into a digital signal.
A converter, a drive circuit for generating a drive signal for driving the image display body based on the digital signal, and as the supply position of the image signal sequentially advances in a vertical direction of a screen of the image display body, the selection signal A setting circuit for outputting a setting signal for setting the order of generation in accordance with the supply position; and a counter for dividing the pixel clock signal and generating the selection signal based on the dividing operation. And a selection signal generation circuit set by the setting signal, wherein an order of generation of the selection signal is switched according to the supply position.

〔Example〕

Hereinafter, the present invention will be described in detail based on examples.

FIG. 1 is a circuit diagram of a color image display circuit of the present invention, and FIG. 2 is a timing chart showing the operation of FIG.

The video signal is decomposed into three primary colors and input to the analog multiplexer 1 as an R color signal 9, a G color signal 7, and a B color signal 8. The color signal integrated by the analog multiplexer 1 is converted into an N-bit digital value by the A / D converter 2 and input to the image drive circuit 3 as gradation data. The image drive circuit 3 changes the amount of twist of each liquid crystal element of the liquid crystal color image display 4 by changing the drive voltage based on the gradation data. Therefore, the amount of transmitted light changes,
The image is played.

Here, the pixel array of the color image display 4 has a mosaic structure as shown in FIG. That is, on the basis of the upper left of the screen, the first column is shifted to the left by RGB, the second column is shifted to the left by one pixel, the GBR is shifted by one pixel to the third column, and BRG is repeated. That is, the pixels are shifted one pixel at a time in the vertical pixel direction, and the same pixel arrangement is obtained every three pixels. Therefore, the generation order of the selection signals 13 to 15 for sequentially selecting each color signal is as follows.
In the (1 + 3N) column, the R selection signal 15, the G selection signal 13, and the B selection signal 14, and in the (2 + 3N) column, the G selection signal 13, the B selection signal 14.
In the R selection signal 15, (3 + 3N) columns, the B selection signal 14, the R selection signal 15, and the G selection signal 13 are repeated. (However,
N = 0, 1, 2,...) To realize this, the three-phase selection signal generation circuit 6 is configured by a 1/3 frequency-divided ring counter, and only one of the three selection signals is " 1 ", and turns on one of the three analog switches in the analog multiplexer 1.

Also, (1 + 3N) row, (2 + 3N) row, and (3 + 3N) row
A selection signal phase setting circuit 5 is provided to set the phase of the selection signal at the start of image display of a column. That is,
The vertical start signal 11 generated for each vertical period allows D
Shape flip-flops (FF) 23 and 24 are set and reset, respectively. Thereafter, the horizontal start signal 10 indicating the image display start timing in the horizontal period is 1/3 which is constituted by FFs 23 and 24 as a clock signal.
It is input to the frequency division ring counter. The horizontal start signal 10 is also input to the falling differentiation circuit 20, and generates a pulse signal at the start of image display. The pulse signal is input to gates 20 to 22.
It is controlled by the output of a ring counter composed of FFs 23 and 24. Therefore, in the (1 + 3N) column, the gate 22 opens, and the pulse signal sets the counter of the three-phase selection signal generation circuit 6 as the R setting signal 17, and only the R selection signal 15 is "1".
Becomes Also, at (2 + 3N), the gate 20 opens, the pulse signal operates similarly as the G setting signal 18, and the G selection signal
Only 13 becomes “1”. Further, in the (3 + 3N) column, the gate 21 opens, the pulse signal operates similarly as the B setting signal 16, and only the B selection signal 14 becomes "1".

The above operation achieves analog multiplexing for the mosaic pixel array.

〔The invention's effect〕

As described above, according to the present invention, when displaying a color image of a mosaic pixel array, the setting circuit and the selection signal generation circuit switch the order of generation of selection signals for selecting three color signals, and Since the signal was multiplexed in an analog manner and then A / D converted, the number of A / D converters, which was conventionally required three, becomes one, and the cost can be significantly reduced. Furthermore, the number of A / D conversion outputs is reduced to one third, and the printed circuit board mounting area can be reduced.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram of a color image display circuit according to the present invention. FIG. 2 is a timing chart showing the operation of FIG. FIG. 3 is a block diagram of a conventional color image display circuit. FIG. 4 is a structural diagram of a color image display having a mosaic pixel array. DESCRIPTION OF SYMBOLS 1 ... Analog multiplexer 2 ... A / D converter 3 ... Image drive circuit 4 ... Color image display 5 ... Selection signal phase setting circuit 6 ... 3 phase selection signal generation circuit 19 ... Falling differential Circuits 20 to 22 Gate 23, 24 D-type flip-flop 25 NOR gate

Claims (1)

(57) [Claims] 1. A color image display circuit for displaying an image on a color image display in which pixels of three primary colors are repeatedly arranged in a horizontal direction and the same color is not arranged adjacent to each other in a vertical direction. Selecting means for sequentially selecting and outputting analog three primary color signals of the signal based on the selection signal; an A / D converter for converting an output of the selecting means into a digital signal; and displaying the image display body based on the digital signal. A drive circuit for generating a drive signal for driving; and a setting signal for setting the order of generation of the selection signal according to the supply position as the supply position of the image signal sequentially advances in a vertical direction of the screen of the image display body. And a counter that divides the pixel clock signal and generates the selection signal based on the frequency division operation, wherein the initial state of the counter is set to the setting signal. Ri set; and a selection signal generating circuit comprising, a color image display circuit order of occurrence of said selection signal is characterized by comprising switched in response to the supply position.