JP2567642Y2 - Lateral bipolar transistor - Google Patents

Description

[Detailed description of the invention]

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lateral bipolar transistor.

[0002]

2. Description of the Related Art A conventional lateral bipolar transistor will be described. As shown in FIG. 2, a P-type silicon substrate 1
A high-concentration N-type buried region 2 is formed thereon, and an N-type epitaxial layer 3 is grown thereon.
A type collector region 4C and an N type diffusion region 5 are provided by diffusion. Further, a silicon oxide film 6 is formed, and the silicon oxide film 6 on the P-type diffusion region (4C, 4E) and the N-type diffusion region 5 is opened to provide a collector electrode 8C, an emitter electrode 8E, and a base electrode 8B. A PNP transistor is formed. Generally, it is required that a transistor has a large DC current amplification factor hFE and a good hFE-collector current Ic characteristic.

[0003]

However, in the conventional lateral bipolar transistor, the minority carriers injected from the emitter region into the vertical base region are hardly collected at the collector region bottom portion by the electric field of the high concentration N-type buried region. , But some of the minority carriers injected from the emitter region into the lateral base region recombine at the surface between the emitter and collector, so that hFE
Has the disadvantage of lowering

[0004]

A lateral bipolar transistor according to the present invention has a second conductivity type emitter region and a second conductivity type emitter region selectively formed at a predetermined distance from a first conductivity type semiconductor layer on the surface of a semiconductor substrate. A collector of a second conductivity type, an emitter region of the second conductivity type and a collector of a second conductivity type
In the first conductivity type semiconductor layer between and around the region,
A base region and the second conductivity type emitter region;
Conductive collector region and base region
A portion having a first opening over the second conductivity type emitter region and covering the surface of the semiconductor substrate with
An insulating film, the second conductivity type emitter region and the base
Of the second conductivity type emitter region and the second conductivity type collector region.
Covering the insulating film over the entire area sandwiched between the
A second conductive type polysilicon film which is connected to the emitter region through said first opening, provided in said insulating film
Provided covering the periphery thereof a second open port, wherein the second conductive
A collector electrode connected to an electrical collector region via the second opening; and a third opening provided in an oxide film of the second conductive polysilicon film.
Possess an emitter electrode that will be connected to Rishirikon film, wherein
The second conductivity type according to the voltage applied to the emitter electrode;
Minority in the first conductivity type semiconductor layer between the emitter region
Prevents DC current gain from lowering due to carrier recombination
It is stopped .

[0005]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In a lateral PNP transistor according to an embodiment of the present invention, P-type transistors selectively formed at a predetermined distance from an N-type epitaxial layer 3 on the surface of a P-type silicon substrate 1 are formed.
Emitter region 4E and P-type collector region 4C,
Between the emitter region 4E and the collector region 4C.
A conductive P-type polysilicon film 7 covering the entire surface of the type epitaxial layer 3 and connected to the P-type emitter region 4E is provided via the silicon oxide film 6. Reference numeral 2 denotes a high-concentration N-type buried region provided at the boundary between the P-type polysilicon film 1 and the N-type epitaxial layer 3. Furthermore, P-channel transistor type polysilicon
After oxidizing the film, make an opening in the oxide film
An electrode 8E may be provided.

Holes injected from the P-type emitter region 4E into the lateral base region are prevented from recombination on the surface by the positive potential of the emitter electrode 8E and the P-type polysilicon film 7, thereby preventing hFE from decreasing. Is done.

Furthermore, after the P-type polysilicon film 7 is oxidized, an opening is provided in the oxide film and the emitter electrode 8E is provided , so that a short circuit between the collector electrode 8C and the emitter due to foreign matter or the like is prevented.

[0008]

As described above, according to the present invention, in a lateral bipolar transistor, a conductive film is formed on a base region between an emitter region and a collector region via an insulating film, and the conductive film is contacted by the emitter region. By doing so, the minority carriers injected into the lateral base region from the emitter region have an effect that recombination at the surface is suppressed by the potential applied to the emitter and hFE is prevented from lowering.

[Brief description of the drawings]

FIG. 1 is a sectional view of a semiconductor chip for explaining one embodiment of the present invention.

FIG. 2 is a sectional view of a semiconductor chip showing a conventional example.

[Explanation of symbols]

 Reference Signs List 1 P-type silicon substrate 2 High-concentration N-type buried region 3 N-type epitaxial layer 4 C P-type collector region 4 EP-type emitter electrode 5 N-type diffusion region 6 silicon oxide film 7 P-type polysilicon film 8 B base electrode 8 C collector electrode 8 E emitter electrode

Claims (1)

(57) [Scope of request for utility model registration] A first conductive type semiconductor layer on a surface of a semiconductor substrate, the second conductive type semiconductor layer being selectively formed at a predetermined distance from each other;
A conductivity type emitter region and a second conductivity type collector region;
The second conductivity type emitter region and the second conductivity type collector region
And the first conductivity type semiconductor layer in the vicinity thereof and in the vicinity thereof.
A base region, the second conductivity type emitter region, a second conductivity type
Between the collector and base regions
A single insulating film that covers the surface of the semiconductor substrate at and around the portion and has a first opening on the second conductivity type emitter region; and a second insulation type emitter region and a base region.
Region of the second conductivity type and collector of the second conductivity type
Wherein covering the insulating layer on portions throughout sandwiched between the region
A second opening connected to the emitter region through a first opening;
A conductive polysilicon film, the provided on the insulating film 2
Apertures and arranged to cover the surrounding, the second conductivity type
A collector electrode connected to the collector region through the second opening and an oxide film of the second conductivity type polysilicon film;
Through the third opening provided in the second conductivity type policy.
Possess an emitter electrode that will be connected to the silicon film, the Emi
The second conductivity type emitter by a voltage applied to the
Minority capacitor in the first conductivity type semiconductor layer between the
Prevents reduction of DC current gain due to rear surface recombination
A lateral bipolar transistor.