JP2560742B2 - Character pattern generator - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a character pattern generator, and more particularly to a character pattern generator suitable for a matrix type display printer.

[Conventional technology]

Conventionally, this type of character pattern generator employs a simple method of storing all the various character patterns required for printing as they are and selectively outputting them according to a command from a host machine.

Therefore, even if the same character, for example, the Gothic type and the framed characters shown in FIGS. 2 and 3 are stored separately, the storage capacity of the storage unit is significantly large. There was an inconvenience.

[Object of the Invention]

The present invention has improved the disadvantages of the conventional example, and in particular, it is possible to store a framed character in advance and very easily form and output a Gothic character and other ordinary characters from the framed character. It is an object of the present invention to provide a character pattern generator in which the storage capacity of the storage unit is reduced.

[Means for solving problems]

According to the present invention, a character pattern memory storing framed characters or numbers and a character pattern conversion circuit provided in an output stage of the character pattern memory are provided, and the character pattern conversion circuit is provided in each of the character pattern memories. An exclusive OR circuit K _i (for example, K = 2,3,4, ... n) and a logical NOT circuit L _i , which are separately connected in parallel to each other at the bit output end, and a logical product of these two is taken to obtain a predetermined value. And a logical product circuit P _i for outputting a bit signal, the output signal of the exclusive OR K _i-1 is input to the other input terminal of the exclusive OR circuit K _i ,
The output of the exclusive logic circuit Kn at the final stage is sent to the character pattern generator reading means, and a flip-flop is provided which operates by receiving the output signal of the character pattern generator reading means. The output signal of this flip-flop is exclusive. It is configured to be fed to the other input end of the logical OR circuit K ₂ . This is intended to achieve the aforementioned objectives.

Example of Invention

An embodiment of the present invention will be described below with reference to FIGS.

The embodiment shown in FIG. 1 is a character pattern memory 1 for storing framed characters or numbers, and a character pattern conversion circuit provided at the output stage of the character pattern memory 1 for another read output circuit (not shown). 2 and.

Among them, the character pattern memory 1 stores the color of white / black pixels or black / white pixels of a white / black binary image obtained by scanning and sampling characters in the horizontal direction in order from the top. The change point is represented by "1", the point where white pixels or black pixels are continuous is represented by "0", and the memory is formed by a readable memory that stores n bits arranged in the horizontal direction in the scanning order.

The character pattern conversion circuit 2 outputs each bit of the character pattern memory 1 (eight bits in this embodiment, ie, n = 9).
, And an exclusive OR circuit K connected in parallel to each
_i (however, for example, K = 2,3,4, ... 9) and the logical NOT circuit L
_{It has an i} and an AND circuit P _i that takes the logical product of both of them and outputs a predetermined bit signal.

Among these, the output signal of the exclusive OR K _i-1 is input to the other input terminal of the exclusive OR circuit K _i , and the output of the exclusive OR circuit K ₉ at the final stage is the character pattern generator. It is adapted to be sent to the reading means 27. A flip-flop 26 which operates by receiving the output signal of the character pattern generator reading means 27 is provided.
The 26 output signals are sent to the other input terminal of the exclusive OR circuit K ₂ .

More specifically, the 8-bit output signal m _{0 to} m ₇ of the readable 8-bit character pattern memory 1 is 2
Input exclusive OR circuits K _{2 to} K ₉ and logical NOT circuits L _{2 to} L ₉
Connected to. Output signal l ₂ to l ₉ of the logic NOT circuit L ₂ ~L ₉ is connected to the AND circuit P ₂ to P ₉ of the two inputs. On the other hand to the input of the exclusive OR circuit K ₃ ~K ₉ the other output signal R ₂ to R ₉ in the exclusive OR circuit immediately before the adjacent connected, the other input of the exclusive OR circuit K ₂ The output signal b of the flip-flop 26 is connected to. Here, the reading of the character pattern generator is performed by a character pattern generator reading means having an address generating function and a read timing generating function of a character pattern memory such as a microprocessor or a DMA circuit. In this embodiment, the character pattern generator reading means 27 can store the output signal c of the exclusive OR circuit 9 and can provide it to the flip-flop 26 via the signal a as required. Has become.

 Next, the operation of the above embodiment will be described.

Now, the case of outputting the Gothic characters shown in FIG. 2 (1) from the framed characters shown in FIG. 3 (1) stored in the character pattern memory 1 will be described. Figure 2 (2)
3 and FIG. 3 (2) respectively show a code and a symbol representing a character pattern.

First, the 8-bit output signal m _{0 of} the character pattern memory 1
FIG. 3 (2) the first row of the character pattern "4002" of the ~m ₇ is "40" is output. In this case, the signal b is "0" because of the left end of the character, so the signals ₀ to ₇ are "3F".
However, "1" is generated in the signal c. Then at the output signal m ₀ ~m ₇ of "02" is 8-bit character pattern memory 1 of the "4002", the signal _0-7 if it is "1" is set in the previous flip-flop 26 "FC" is generated. In other words, "4002" to "3FFC" can be generated. This is equivalent to the first row in FIG.

In this way, the character pattern of FIG. 2 can be easily generated from the character pattern of FIG. 3, and the character pattern of FIG. 3 can be used as it is as a modified character.

〔The invention's effect〕

As described above, according to the present invention, by simply adding a relatively simple circuit and changing the contents of the character pattern memory, economically and without impairing the display / printing speed of the character, and the conventional character, It has an excellent effect that it is possible to provide characters only in the outer frame.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 (1).
(2) and FIGS. 3 (1) and (2) are explanatory views showing examples of print output characters and a storage state in the memory, respectively. 1 ... Character pattern memory, 2 ... Pattern conversion circuit,
26 ... Flip-flop, 27 ... Character pattern generator reading means, K _i (where i = 2,3,4, ... n) ... Exclusive OR circuit, L _i ... Logic negation circuit, P _i ... AND circuit.

Claims (1)

(57) [Claims] 1. A character pattern memory for storing framed characters or numbers, and a character pattern conversion circuit provided at an output stage of the character pattern memory, wherein the character pattern conversion circuit is the character pattern memory. An exclusive OR circuit K _i (where, for example, i = 2,3,4, ... n) and a logical NOT circuit L _i connected in parallel to each bit output terminal of And a logical product circuit P _i for outputting a predetermined bit signal, the output signal of the exclusive OR K _i-1 is input to the other input terminal of the exclusive OR circuit K _i , respectively. The output of the exclusive logic circuit Kn of the stage is sent to the character pattern generator reading means, and a flip-flop that operates by receiving the output signal of the character pattern generator reading means is provided, and the output signal of the flip-flop is the exclusive signal. Theory A character pattern generator characterized in that it is configured so as to be fed to the other input end of the Riwa circuit K ₂ .