JP2556996B2 - Sample preparation method for damage evaluation during semiconductor manufacturing process and its evaluation method - Google Patents

Sample preparation method for damage evaluation during semiconductor manufacturing process and its evaluation method

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Publication number
JP2556996B2
JP2556996B2 JP1244995A JP24499589A JP2556996B2 JP 2556996 B2 JP2556996 B2 JP 2556996B2 JP 1244995 A JP1244995 A JP 1244995A JP 24499589 A JP24499589 A JP 24499589A JP 2556996 B2 JP2556996 B2 JP 2556996B2
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JP
Japan
Prior art keywords
damage
manufacturing process
semiconductor manufacturing
evaluation
sample
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP1244995A
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Japanese (ja)
Other versions
JPH03108327A (en
Inventor
周邦 籔本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP1244995A priority Critical patent/JP2556996B2/en
Publication of JPH03108327A publication Critical patent/JPH03108327A/en
Application granted granted Critical
Publication of JP2556996B2 publication Critical patent/JP2556996B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体や金属を始めとする各種材料をドラ
イエッチングやプラズマ気相蒸着等のプラズマ処理をす
る際に、その表面に発生するダメージを評価する試料の
作製方法およびダメージの評価方法に関するものであ
る。
DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention is directed to damages that occur on the surface of various materials such as semiconductors and metals during plasma processing such as dry etching and plasma vapor deposition. The present invention relates to a method for producing a sample for evaluating the above and a method for evaluating damage.

〔従来の技術〕[Conventional technology]

プラズマに晒された表面には、結晶欠陥と不純物が混
在するダメージが発生する。従来、ダメージを評価する
には、その結晶性の変化や、表面の組成変化を解析する
方法があった。また、MOSやダイオード等を形成し、そ
の電気特性の変化からダメージを評価する方法があっ
た。
On the surface exposed to plasma, crystal defects and impurities are mixed and damaged. Conventionally, in order to evaluate damage, there has been a method of analyzing a change in crystallinity and a change in composition of the surface. In addition, there is a method of forming a MOS, a diode, or the like, and evaluating the damage from the change in the electric characteristics.

〔発明が解決しようとする課題〕[Problems to be Solved by the Invention]

結晶性の評価には、電子線回折法や電子顕微鏡等が使
われるが、試料の作製が難しく、また100eV以下の低エ
ネルギーイオンによるダメージの検出ができないと言う
欠点があった。表面の組成変化を調べる方法では、腐食
性ガスを用いた場合や、製造装置のチャンバから鉄やニ
ッケル等が混入する場合には、それらの深さ方向分布を
測定することによって低エネルギーイオンによるダメー
ジも評価できるが、不活性ガスを用いた場合や、不純物
の混入が分析装置の検出限界以下の場合にはダメージを
評価することができなかった。
Although electron diffraction method, electron microscope, etc. are used for the evaluation of crystallinity, there are drawbacks that it is difficult to prepare a sample and damage due to low energy ions of 100 eV or less cannot be detected. In the method of investigating changes in the composition of the surface, when corrosive gas is used or when iron, nickel, etc. are mixed in from the chamber of the manufacturing equipment, the distribution in the depth direction is measured to damage the low energy ions. However, the damage could not be evaluated when an inert gas was used or when the mixing of impurities was below the detection limit of the analyzer.

電気特性の変化からダメージを推定する方法は、最も
敏感な方法であるが、特性評価用素子の作製過程で新た
な変化要因が入ったりすると言う欠点があった。
The method of estimating damage from changes in electrical characteristics is the most sensitive method, but has the drawback that new change factors may be introduced during the process of manufacturing the element for characteristic evaluation.

〔課題を解決するための手段〕[Means for solving the problem]

このような欠点を除去するために本発明による半導体
製造工程中のダメージ評価用試料作製方法は、半導体製
造工程において半導体中に発生するダメージを評価する
にあたり、半導体製造工程や評価用試料作製処理時に環
境から混入しない物質を半導体表面に吸着させた後、半
導体製造の処理を行なう工程と、半導体表面に評価用試
料と同じ材質の材料を真空蒸着する工程とを含むように
したものである。
In order to eliminate such defects, the damage evaluation sample preparation method in the semiconductor manufacturing process according to the present invention, in evaluating the damage generated in the semiconductor in the semiconductor manufacturing process, during the semiconductor manufacturing process and the evaluation sample manufacturing process. After adsorbing a substance that is not mixed in from the environment on the semiconductor surface, a step of performing a semiconductor manufacturing process and a step of vacuum-depositing a material of the same material as the evaluation sample on the semiconductor surface are included.

また、本発明による半導体製造工程中のダメージの評
価方法は、ダメージ評価用試料に吸着させた物質の成分
を表面から深さ方向に分析し、その深さ方向分布の半値
幅から半導体製造工程で発生するダメージの大きさを評
価するようにしたものである。
Further, the damage evaluation method during the semiconductor manufacturing process according to the present invention, the component of the substance adsorbed to the damage evaluation sample is analyzed from the surface in the depth direction, and the half-value width of the depth direction distribution is used in the semiconductor manufacturing process. It is designed to evaluate the amount of damage that occurs.

〔作用〕[Action]

本発明においては、プラズマ処理やその後の試料作製
過程で混入しない物質を予め表面に吸着させ、その吸着
成分の深さ方向分布状態からダメージの程度が知られ、
低ダメージあるいはダメージの無いプロセス条件が決定
できる。
In the present invention, a substance that is not mixed in the plasma treatment or the subsequent sample preparation process is adsorbed on the surface in advance, and the degree of damage is known from the depth distribution state of the adsorbed component,
Low or no damage process conditions can be determined.

〔実施例〕〔Example〕

プラズマ工程中に表面に形成されるダメージには、結
晶欠陥と不純物が混在する。ダメージは、まず結晶欠陥
が形成され、この結晶欠陥を介して不純物が増速拡散す
ることによって形成される。本方法はプロセス処理時の
ダメージに応じて表面吸着物が内部へ侵入する現象を活
用している。即ち、表面から内部に侵入した不純物の深
さ方向分布からダメージの大きさを評価する。本方法で
は、この不純物に、従来法と異なり、試料作製過程で混
入しない成分や同位体を使うことによって、ダメージの
大きさを明確にとらえることができるようにした。
Crystal defects and impurities are mixed in the damage formed on the surface during the plasma process. The damage is formed by first forming a crystal defect and then accelerating diffusion of impurities through the crystal defect. This method makes use of the phenomenon that surface adsorbates penetrate into the interior depending on the damage during process treatment. That is, the degree of damage is evaluated from the depthwise distribution of impurities that have penetrated from the surface to the inside. In this method, unlike the conventional method, by using a component or isotope that is not mixed in during the sample preparation process, it is possible to clearly detect the magnitude of damage.

第1図は、本発明をドライエッチングによるダメージ
の評価に適用した実施例を説明する図であって、後の処
理によって表面に混入しない物質として重水素を用いる
場合である。第1図(a)において、重水1中に試料2a
を沈浸させると、表面の一部あるいは全てに重水や重水
素が吸着した試料2ができる(第1図(b))。このよ
うな処理により、試料表面に同位体比以上の重水素を吸
着させることができる。
FIG. 1 is a diagram for explaining an example in which the present invention is applied to evaluation of damage due to dry etching, and is a case where deuterium is used as a substance that is not mixed into the surface by a subsequent process. In Fig. 1 (a), sample 2a was placed in heavy water 1.
Is immersed, a sample 2 is formed in which heavy water or deuterium is adsorbed on a part or all of the surface (Fig. 1 (b)). By such a treatment, deuterium having a higher isotope ratio can be adsorbed on the sample surface.

第2図は、Siウェハ上のドライエッチングダメージを
調べる試料の例である。第1図の方法で重水や重水素を
吸着させた試料としてのSiウェハ2にドライエッチング
を行なうと、重水素3が内部へ拡散する。この表面に、
SIMS(Secondary Ion Spectrocopy,二次イオン質量分析
法)分析を行なうための保護膜として非晶質Si4を真空
蒸着する。ここで真空蒸着を行なうのは、非晶質Si4の
膜作製時に新たなダメージを形成しないためである。
FIG. 2 is an example of a sample for examining dry etching damage on a Si wafer. When the Si wafer 2 as a sample on which heavy water or deuterium is adsorbed by the method of FIG. 1 is dry-etched, deuterium 3 diffuses inside. On this surface,
Amorphous Si4 is vacuum-deposited as a protective film for SIMS (Secondary Ion Spectrocopy) analysis. The vacuum deposition is performed here so that no new damage is formed when the amorphous Si4 film is formed.

第3図は、第2図の試料2の重水素濃度深さ方向にSI
MS分析した結果である。横軸は深さ、縦軸は重水素濃度
であり、異なるイオンエネルギーのArでドライエッチン
グを行なっ場合の重水素の深さ方向分布を示している。
S1はエッチング前、S2はイオンエネルギー10数eV以下の
時、S3はイオンエネルギー20eV以上の時のものである。
また、W1,W2,W3は各イオンエネルギー曲線S1,S2,S3の半
値幅である。イオンエネルギーが20eV以上の時(曲線S
3)、10数eVの時に比べて残留重水素量が多く、かつ、
その半値幅がエッチング前(曲線S1)や10数eVでエッチ
ングした時に比べて広がっていることが分かる。
Fig. 3 shows SI in the depth direction of deuterium concentration of sample 2 in Fig. 2.
This is the result of MS analysis. The horizontal axis is the depth and the vertical axis is the deuterium concentration, which shows the distribution of deuterium in the depth direction when dry etching is performed with Ar having different ion energies.
S1 is before etching, S2 is at an ion energy of 10 eV or less, and S3 is at an ion energy of 20 eV or more.
W1, W2, W3 are the half widths of the ion energy curves S1, S2, S3. When the ion energy is 20 eV or more (curve S
3), the amount of residual deuterium is large compared to the case of 10 and several eV, and
It can be seen that the full width at half maximum is wider than that before etching (curve S1) and when etching is performed at 10's eV.

第4図は、横軸にドライエッチング時のArイオンエネ
ルギー、縦軸にエッチング前の重水素プロファイルの半
値幅に対するエッチング後の重水素プロファイルの半値
幅の比(重水素プロファイルのFWHM(Full Width at Ha
lf Maximum,半値幅)比)をプロットした結果を示すグ
ラフである。同図に示すように、15eVを臨界点にして半
値幅の比が増加する。これは15eV以上のイオンエネルギ
ーを持つArのドライエッチングにより、表面に吸着した
重水素が内部にまで拡散したこと、すなわち、この領域
にダメージが形成されたことを示している。従って、Ar
イオンでSiウェハの表面にダメージを入れないようにド
ライエッチングを行なうには、表面を10数eV以上のイオ
ンに晒してはならないことが分かる。
In FIG. 4, the horizontal axis represents the Ar ion energy during dry etching, and the vertical axis represents the ratio of the half width of the deuterium profile after etching to the half width of the deuterium profile before etching (FWHM (Full Width at Ha
It is a graph which shows the result of having plotted (lf Maximum, half-width) ratio). As shown in the figure, the half-width ratio increases with 15 eV as the critical point. This indicates that the dry etching of Ar having an ion energy of 15 eV or more diffused the deuterium adsorbed on the surface to the inside, that is, formed damage in this region. Therefore, Ar
It can be seen that in order to perform dry etching so that the surface of the Si wafer is not damaged by ions, the surface should not be exposed to ions of 10 s eV or more.

このように、本方法を用いれば、低エネルギーのイオ
ンによって表面が受けるダメージを評価することができ
る。上記の他、本方法により、Si以外の半導体や金属等
の表面が、低エネルギーのドライエッチングによって受
ける表面のダメージの大きさを評価することが可能であ
り、低ダメージやダメージの無いエッチング条件の決定
等に役立てることができる。ここではドライエッチング
のダメージの評価方法について述べたが、ドライエッチ
ング時には重水素等の吸着物が飛散する可能性を持って
いるため評価が難しい。これに対して、薄膜形成につい
て本方法を活用した場合はその可能性が小さく、より的
確にダメージを評価することができる。
Thus, using this method, it is possible to evaluate the damage to the surface caused by low energy ions. In addition to the above, by this method, the surface of semiconductors or metals other than Si, it is possible to evaluate the size of the damage of the surface that is received by low-energy dry etching, low etching or damage-free etching conditions It can be useful for decisions. Although the method for evaluating the damage of dry etching has been described here, the evaluation is difficult because there is a possibility that adsorbates such as deuterium will scatter during dry etching. On the other hand, when this method is used for thin film formation, the possibility is small, and damage can be evaluated more accurately.

本方法の実施例では、Siウェハに重水を吸着させた試
料でドライエッチングダメージの評価を行なったが、プ
ロセス処理やその後の試料作製過程で混入しない成分を
有する物質であれば、重水に限る必要はない。例えば、
半導体表面を塩素ガスでエッチングする場合には、フッ
酸溶液に浸け、表面をフッ素化した試料等が考えられ
る。また、分析法もSIMSに限る必要はない。例えば、フ
ッ素化した表面のフッ素の深さ方向分析では、角度分析
XPS(X−ray Photoelectron Spectroscopy,X線光電子
分析法)のような非破壊で表面の深さ方向の変化に敏感
な分析方法によってフッ素の侵入深さの変化を測定する
方法等が考えられる。この場合は表面保護膜を付ける必
要はない。
In the example of the present method, the dry etching damage was evaluated on the sample in which heavy water was adsorbed on the Si wafer. There is no. For example,
When the semiconductor surface is etched with chlorine gas, a sample in which the surface is fluorinated by dipping it in a hydrofluoric acid solution is considered. Also, the analysis method need not be limited to SIMS. For example, in the depth direction analysis of fluorine on a fluorinated surface, the angle analysis
A non-destructive analysis method sensitive to changes in the depth direction of the surface, such as XPS (X-ray Photoelectron Spectroscopy), may be used to measure changes in the penetration depth of fluorine. In this case, it is not necessary to attach a surface protective film.

〔発明の効果〕〔The invention's effect〕

以上説明したように本発明は、半導体製造工程や評価
用試料作製処理時に環境から混入しない物質を半導体表
面に吸着させた後、半導体製造の処理を行ない、半導体
表面に評価用試料と同じ材質の材料を真空蒸着してダメ
ージ評価用試料を作製し、このダメージ評価用試料に吸
着させた物質の成分を表面から深さ方向に分析し、その
深さ方向分布の半値幅から半導体製造工程で発生するダ
メージの大きさを評価するようにしたことにより、低エ
ネルギーのイオンにより容易にダメージを評価すること
ができ、低ダメージあるいはダメージの無いプロセス条
件を決定できると言う利点がある。
As described above, the present invention, after adsorbing on the semiconductor surface a substance that is not mixed in from the environment during the semiconductor manufacturing process or the evaluation sample preparation process, the semiconductor manufacturing process is performed, and the semiconductor surface is made of the same material as the evaluation sample. The material for vacuum evaluation is prepared by vacuum evaporation of the material, and the components of the substance adsorbed to this sample for damage evaluation are analyzed in the depth direction from the surface, and the half-value width of the distribution in the depth direction causes it in the semiconductor manufacturing process. By evaluating the magnitude of the damage to be performed, there is an advantage that the damage can be easily evaluated by the low-energy ions and a process condition with low damage or no damage can be determined.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例の説明図、第2図はダメージ
を分析するために表面を保護した試料を示す構成図、第
3図は重水を吸着させた後ArでドライエッチングしたSi
ウェハの重水素のSIMS深さ方向分布を示すグラフ、第4
図はドライエッチングに使用したArの持つイオンエネル
ギーと重水素の侵入深さの関係を示すグラフである。
FIG. 1 is an explanatory view of an embodiment of the present invention, FIG. 2 is a block diagram showing a sample whose surface is protected to analyze damage, and FIG. 3 is a Si which was subjected to dry etching with Ar after absorbing heavy water.
Graph showing SIMS depth distribution of deuterium on wafer, 4th
The figure is a graph showing the relationship between the ion energy of Ar used for dry etching and the penetration depth of deuterium.

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】半導体製造工程において半導体中に発生す
るダメージを評価するにあたり、前記半導体製造工程や
評価用試料作製処理時に環境から混入しない物質を前記
半導体表面に吸着させた後、前記半導体製造の処理を行
なう工程と、前記半導体表面に評価用試料と同じ材質の
材料を真空蒸着する工程とを含むことを特徴とする半導
体製造工程中のダメージ評価用試料作製方法。
1. When evaluating damage generated in a semiconductor in a semiconductor manufacturing process, a substance that is not mixed in from the environment is adsorbed on the semiconductor surface during the semiconductor manufacturing process or the evaluation sample preparation process, and then the semiconductor manufacturing process is performed. A method of preparing a sample for damage evaluation during a semiconductor manufacturing process, comprising: a step of performing a treatment; and a step of vacuum-depositing a material of the same material as the evaluation sample on the semiconductor surface.
【請求項2】ダメージ評価用試料に吸着させた物質の成
分を表面から深さ方向に分析し、その深さ方向分布の半
値幅から半導体製造工程で発生するダメージの大きさを
評価することを特徴とする半導体製造工程中のの評価方
法。
2. A component of a substance adsorbed on a damage evaluation sample is analyzed in the depth direction from the surface, and the magnitude of damage generated in a semiconductor manufacturing process is evaluated from the half-value width of the distribution in the depth direction. A characteristic evaluation method during a semiconductor manufacturing process.
JP1244995A 1989-09-22 1989-09-22 Sample preparation method for damage evaluation during semiconductor manufacturing process and its evaluation method Expired - Fee Related JP2556996B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1244995A JP2556996B2 (en) 1989-09-22 1989-09-22 Sample preparation method for damage evaluation during semiconductor manufacturing process and its evaluation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1244995A JP2556996B2 (en) 1989-09-22 1989-09-22 Sample preparation method for damage evaluation during semiconductor manufacturing process and its evaluation method

Publications (2)

Publication Number Publication Date
JPH03108327A JPH03108327A (en) 1991-05-08
JP2556996B2 true JP2556996B2 (en) 1996-11-27

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JP1244995A Expired - Fee Related JP2556996B2 (en) 1989-09-22 1989-09-22 Sample preparation method for damage evaluation during semiconductor manufacturing process and its evaluation method

Country Status (1)

Country Link
JP (1) JP2556996B2 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5480671A (en) * 1977-12-10 1979-06-27 Sony Corp Diffusion method of cu to semiconductor layer
JPS6115342A (en) * 1984-07-02 1986-01-23 Oki Electric Ind Co Ltd Evaluation of film quality of silicon dioxide film

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JPH03108327A (en) 1991-05-08

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