JP2547314B2 - LCD drive circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a drive circuit of a matrix type liquid crystal display device in which a switching element is added to each picture element arranged in a display area.

[0002]

2. Description of the Related Art A matrix type liquid crystal display device in which a group of line electrodes are arranged in directions orthogonal to each other has a feature that it can be driven at a low voltage and consumes low power, and a character / image display means of a pocketable device. However, when multiplex drive is performed, it is difficult to obtain a sufficiently sharp display with a large capacity display because the display contrast gradually decreases due to the crosstalk phenomenon when the duty ratio is gradually reduced. There is a drawback that On the other hand, in a matrix type liquid crystal display device in which a switching transistor is added to each picture element arranged in the display area, crosstalk can be suppressed by the switching transistor, so even when multiplex driving with a small duty ratio is performed. Since it is possible to obtain a clear display contrast equivalent to that of static drive, it is suitable as a large-capacity display device.

2A and 2B are a circuit configuration diagram showing a basic block circuit of a matrix type liquid crystal display device and a timing waveform diagram showing an example of signal waveforms applied to row / column electrodes. Reference numeral 11 denotes a liquid crystal display panel, and a switching transistor 11-c is formed at each intersection of a row electrode 11-a and a column electrode 11-b arranged in a plurality in a direction orthogonal to each other.
The gate electrode of the switching transistor 11-c is connected to the row electrode 11-a, the source electrode is connected to the column electrode 11-b, and the drain electrode is connected to the display pixel electrodes arranged in a matrix. . A row electrode drive circuit 12 outputs a scanning pulse such as Ps shown in FIG. 2B to each row electrode. 13 is a column electrode drive circuit, P
A data waveform corresponding to the display content such as _D is output to each column electrode. Reference numeral 14 is a control circuit for operating the row and column electrode drive circuits.

In such a display device, when a row in the display area is selected by the scanning pulse Ps and the switching transistor 11-c is turned on, the data waveform P
_The voltage corresponding to that row of _D is supplied to the display picture element electrode via the switching transistor 11-c, and the liquid crystal 11-d located between the display picture element electrode and the counter electrode facing it.
A voltage is applied to. Next, when this row is deselected, the switching transistors are turned off and the display pixel electrodes and the column electrodes are separated, so that the voltage applied to the liquid crystal 11-d is maintained as it is without being affected by the data waveform. This is repeated sequentially in the row direction to obtain a clear display pattern without crosstalk.

3A and 3B are a general block circuit configuration diagram of the row electrode drive circuit and a timing waveform diagram showing main voltage waveforms. The row electrode drive circuit is mainly the shift register 2
1 and a buffer circuit 22, the pulse S is shifted by a clock φ ₁ having a cycle of a selection period H corresponding to the drive duty ratio, and a scanning pulse is sequentially output to the row electrodes via the buffer circuit 22.

FIG. 4A and FIG. 4B are block circuit block diagrams of a column electrode drive circuit generally used when performing halftone display such as image display, and timing waveforms showing main voltage waveforms. It is a figure. A portion a in the figure is a circuit portion that receives the display signal voltage V sequentially sent according to the display content and samples only the voltage corresponding to the display content of the picture element in the corresponding column. Switch 32
And a sampling capacitor 33. The shift register 31 sequentially shifts the pulse D with a clock φ ₂ having a cycle of a time t corresponding to one picture element, and sequentially turns on the switches 32 in each column to display the display signal voltage V.
The voltage at a certain moment is sampled by the capacitor 33. A portion b in the figure is a circuit for holding the sampled voltage for at least the next one selection period (H), and transfers the voltage of the sampling capacitor 33 to the holding capacitor 35 via the switch 34 and holds it. A portion c in the figure is a buffer circuit, which outputs the voltage of the hold capacitor 35 to each column electrode through the buffer amplifier 36. As a result of the above, as shown in FIG. 4B, the voltage corresponding to the display content of the column is output to the column electrode for 1H.

[0007]

When the above liquid crystal display device is used as a display device for pocketable equipment,
At the same time as the display quality, the power consumption of the drive circuit becomes a big problem. In particular, as described above, when performing halftone display, since the column electrode drive circuit includes a considerable amount of analog circuit, power consumption increases, and as the display information increases in capacity, the clock frequency increases accordingly. Therefore, there is a problem that power consumption further increases.

The present invention has been made in view of the above problems in a drive circuit of a matrix type liquid crystal display device, and provides a new and useful drive circuit of a liquid crystal display device having good display quality and low power consumption. The purpose is.

[0009]

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems in a drive circuit of a matrix type liquid crystal display device, and a matrix type liquid crystal display device in which a switching transistor is added to each picture element of a display. In the drive circuit, the drive circuit which selectively line-sequentially drives each of the switching transistors and outputs a drive signal based on an input video signal is divided into a plurality of blocks.
Stopping all operations of all of the blocks in the blanking period Rutotomoni, blanking period of the input of the display signal
And disconnect the block electrically from the external signal circuit.
Ri By configuring the drive circuit of the signal cutoff means a liquid crystal display device which is formed by including releasing, aims to provide a driving circuit of the display quality level is novel useful liquid crystal display device consumes less power good Is.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The drive circuit of this embodiment is characterized in that the circuit is divided into several blocks, and at a certain moment, only the necessary blocks among them are operated, and the other blocks are electrically driven by the drive circuit. This is to reduce power consumption by disconnecting and stopping all operations of all circuit blocks in the blanking period.

In the liquid crystal display panel, switching elements such as thin film transistors and MOS transistors are formed on the inner surface of one of the substrates constituting the panel, and pixel electrodes for obtaining a display pattern are connected to each switching element and arranged in a matrix. It has an electrode structure arranged.
The switching elements are connected to the row and column electrode lines corresponding to respective intersections of the driving electrode lines formed of the row electrode lines and the column electrode lines arranged in directions orthogonal to each other. On the other substrate constituting the liquid crystal display panel, a counter electrode for the picture element electrode and a red corresponding to each of the picture element electrodes as necessary,
Three primary color filters of green and blue are arranged. A field effect liquid crystal layer such as a twisted nematic liquid crystal layer is enclosed between both substrates.

The amount of light passing through the liquid crystal layer is modulated by the change in the optical characteristics of the liquid crystal layer in response to the electric field applied between the pixel electrode and the counter electrode in synchronism with the on / off operation of the switching element. The unit display is executed.

A row electrode line and a column electrode line for controlling ON / OFF of the switching element are connected to a row electrode driving circuit and a column electrode driving circuit, respectively. The row electrode drive circuit has a configuration similar to that of FIG. 3, and applies a scanning pulse to the row electrode lines. On the other hand, the column electrode drive circuit applies a display signal including a color signal to the column electrode lines in synchronization with the scanning pulse applied to the row electrode lines, and is configured as shown in FIG. 1A and 1B are configuration diagrams of a column electrode drive circuit in a drive circuit of a liquid crystal display device and timing waveform diagrams showing voltage waveforms of main parts of the column electrode drive circuit, which are used for explaining an embodiment of the present invention. There is a case where the sampling circuit unit is divided into four blocks.

In the figure, reference numeral 41 denotes a sampling circuit section which is divided into four blocks 41a to 41d. The operation of each block is controlled by the control signals Ea to Ed. For example, when the control signal is at a high level, it operates, and when it is at a low level, it is electrically disconnected from the circuit. 42 and 43 are a hold circuit and a buffer circuit, respectively.

In the column electrode driving circuit of this embodiment, when focusing on only a certain moment, sampling is performed by 4
Only one of the four blocks 41a-41d,
Other blocks are not sampling. For example, at the instant t ₁ shown in FIG. 1B, only the block 41b is sampling. Therefore, each block 41a
Even if a control signal such as Ea to Ed is added to ~ 41d so that only one block is operated at all times, the whole operation is unchanged, and the number of circuits is reduced to 1/4 on average. Power consumption is greatly reduced. In addition, the operation of all blocks is stopped during a blanking period that does not participate in display such as television image display.

FIGS. 5A and 5B show an example of an actual circuit configuration of the sampling circuit section 41 shown in FIG. 1A and main drive waveforms. Shift register 5 as in FIG.
1, a switch 52 and a sampling capacitor 53, and a gate circuit 54 for stopping the clock φ ₂ for controlling the operation and a switch 55 for stopping the input of the display signal V are newly added. When the control signal E becomes low level in this circuit, the gate φ 54 and the switch 55 cause the clock φ ₂ and the display signal V.
Is stopped, and this circuit is in a state in which it is electrically separated from other circuits. A signal R in the figure is a reset signal for holding all the outputs q ₁ q _m of the shift register at a low level while the operation is stopped.

FIGS. 6A and 6B show another embodiment of the sampling circuit section 41. The configuration of this circuit also includes a shift register 61, switches 62 and 65, a capacitor 63, and a gate circuit 64 as in FIG. 5, and further includes a control flip-flop circuit 66. Further, the shift register 61 is provided with one register for detecting the end of the operation at the final stage thereof. When the pulse D (high level) to be shifted in this circuit is input, the output Q of the flip-flop circuit 66 becomes high level Q at low level, the clock φ ₂ and the display signal V are input, and the circuit becomes in the operating state. . Then, the pulses are sequentially shifted, and when the final stage q _m is reached, q _m becomes the input pulse D ′ of the next block and puts the next block into the operating state. At the next clock, the pulse shifts to q _m +1 and the output of the instant flip-flop 66 when the pulse D ′ is read in the first stage of the next block is inverted, and the input of the clock φ ₂ and the display signal V is stopped. The shift register 61 is kept in the reset state and the operation is in the rest state. As described above, the present circuit automatically starts the operation by the input pulse D and automatically enters the dormant state at the end of the operation. Therefore, it is not necessary to input a control signal from the outside, and it is a very effective drive circuit. .

The above description has been made by taking the case where the present invention is applied to the sampling circuit section of the column electrode drive circuit as an example. However, the present invention is applied to other portions of the drive circuit, for example, the shift register section of the row electrode drive circuit. It is clear from this explanation that the method is applicable to the above. However, since the sampling circuit portion of the column electrode drive circuit has the highest operating frequency in the drive circuit, the power consumption in this portion accounts for a considerable proportion. Therefore, it is very effective to reduce power consumption in this part by reducing power consumption.

[0019]

INDUSTRIAL APPLICABILITY As described above, the present invention provides a liquid crystal display device driving device.
When operating, display signals are supplied only to the necessary circuit blocks
To reduce the power consumption of the drive circuit
Is possible. Driving times in driving liquid crystal display devices
The power consumption of the road is based on the control signal such as the clock
Directly for switching transistor operation like a check signal
Since the signal voltage involved is much larger, these
Of the signal voltage involved in the operation of the switching transistor
Reducing power consumption reduces the power consumption of the entire drive circuit
Is very effective in

[Brief description of drawings]

1A and 1B show an embodiment of the present invention, FIG. 1A is a circuit block diagram of a column electrode drive circuit, and FIG. 1B is a drive waveform diagram of a main part.

FIG. 2 shows a matrix type liquid crystal display device in which a switching transistor is added, (A) is a block diagram,
(B) is a drive waveform diagram.

3A and 3B show a conventional row electrode drive circuit, in which FIG. 3A is a circuit diagram and FIG. 3B is a drive waveform diagram.

FIG. 4 shows a conventional row electrode drive circuit, in which (A) is a circuit diagram and (B) is a drive waveform diagram.

5A and 5B show one embodiment of a sampling circuit section in the drive circuit shown in FIG. 1, FIG. 5A being a circuit diagram and FIG. 5B being a drive waveform diagram.

6A and 6B show another embodiment of the sampling circuit section in the drive circuit shown in FIG. 1, where FIG. 6A is a circuit diagram and FIG. 6B is a drive waveform diagram.

[Explanation of symbols]

 12 row electrode driver 13 column electrode driver 21, 31, 51, 61 shift register 32, 34, 52, 55, 62, 65 switch 33, 35, 53, 63, capacitor 22, 36, 43 output buffer circuit

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hiroshi Take 22-22-22 Nagaike-cho, Abeno-ku, Osaka-shi, Osaka Inside Sharp Corporation (56) Reference JP-A-55-164889 (JP, A) Japanese Patent Publication 5- 81913 (JP, B2)

Claims (1)

(57) [Claims] 1. A drive circuit of a matrix type liquid crystal display device in which a switching transistor is added to each pixel of a display, the switching transistors are selectively line-sequentially driven and a drive signal is output based on an input video signal. Drive circuit is divided into a plurality of blocks, and all the operations of all the blocks are stopped in the blanking period.
In addition, the input of the display signal is stopped during the blanking period.
A drive circuit for a liquid crystal display device, comprising: a signal blocking means for stopping the block and electrically disconnecting the block from an external signal circuit.