JP2546833B2 - Solid-state imaging device - Google Patents

Description

The present invention relates to a solid-state image pickup device, and more particularly to a solid-state image pickup device capable of compressing and transferring an image information amount in addition to a normal image pickup function.

[Conventional technology]

FIG. 2 is a principle diagram of a conventional MOS type two-dimensional solid-state imaging device. In the figure, a photosensitive portion including a large number of photodiodes 1 arranged in a matrix, and a photodiode 1
A vertical read switch MOS transistor 2 and a horizontal read switch MOS transistor 3 for reading the optical signal stored in the vertical scanning circuit, and a vertical scanning circuit shift register 4 and a horizontal scanning circuit shift register 5 for sequentially switching the respective switches. , 6 is a vertical gate line, 7 is a vertical signal line, 8 is a horizontal scanning line, 9 is a horizontal output line, 10 is an output end, and 11 is an output load resistance. 12 is a video voltage source. The gate voltages of the vertical and horizontal switching MOS transistors 2 and 3 are controlled by the shift registers 4 and 5, and a switching operation is obtained. In such an image pickup device, the reading order of each pixel is determined in consideration of use in a normal TV camera. Explaining with the symbols in the figure, first, the photodiodes a ₁₁ , a ₁₂ , ... In the first row are read out in order, and 1H time (about 64 μ
Second), the second row photodiodes a ₂₁ , a ₂₂ ... Are read, and after the first field time (1/60 second), the first photodiode is read again.
That is, the description returns to the photodiodes a ₁₁ , a ₁₂ ... In the row.

[Problems to be solved by the invention]

By the way, considering such a solid-state image pickup device as an input device to the image signal processing device, it is understood that the signal of each pixel does not necessarily have to be output in a temporally sequential manner. For example, consider the case where a circular object is imaged as shown in FIG. In the same figure (b), the horizontal axis is the i coordinate and the vertical axis is the addition output of the pixels in the column direction (j coordinate direction). It is a collection of. It can be seen from the signal waveform in FIG. 7B that there is a round object on the left side of the screen. Similarly, in FIG. 7C, the horizontal axis is the j-coordinate, the vertical axis is the addition output in the row direction (i-coordinate direction), It is a collection of. FIG. 4 also shows an example of the case where the subject is a triangle. Thus, the third
It can be understood from the projected images of FIGS. 4 (b) and 4 (c) that the position, shape, and size of the object to be imaged can be grasped.

The object of the present invention is to add to each conventional pixel independent reading method,
An object of the present invention is to provide a solid-state image sensor capable of reading the addition output of column-direction pixels or the addition output of row-direction pixels.

[Means for solving problems]

The above object is achieved by providing signal output lines of the solid-state imaging device independently in the horizontal and vertical directions and providing a mechanism for selecting each of these signal output lines.

[Action]

According to the configuration of the present invention, since the signals of the photodiodes for one column or one row are collectively transferred to each vertical signal line or each horizontal signal line, addition processing can be performed.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG. In the figure, reference numerals 1 to 12 respectively indicate the same elements as those in FIG. The switch transistor 21 is for transmitting the signal of the photodiode 1 to the horizontal signal line 22,
The signal for one row transferred to the horizontal signal line 22 is a switching transistor selected by the vertical shift register 24.
The signal is transferred to the vertical output line 25 via 23, converted into a voltage by the detection resistor 27 connected to the video voltage source 26, and output to the output end 28. Reference numeral 29 is a shunt transistor for ensuring the operation when a signal is transferred via the vertical signal line 7, and may be omitted. 30 is a vertical buffer circuit.

The element shown in this embodiment is (A) a normal imaging operation,
(B) Addition and output operation of signals for one column and (C) Addition and output operation of signals for one row are possible.

First, the operation (A) will be described with reference to the timing chart shown in FIG. The signal for one row is transferred to each vertical signal line 7, and then output to the outside 10 via the horizontal switch transistor 3.

Next, the operation (B) will be described with reference to the timing chart shown in FIG. All the vertical gate lines 6 are selected from the buffer circuit 30 and the signal for each column is transferred to each vertical signal line 7 and externally transmitted via the horizontal switch transistor 3.
Output to 10.

As described above, during the operations of (A) and (B), the output pulse of the vertical shift register 24 is unnecessary, and the gate voltage (V _Y'G ) of the transistor 29 is set to a high level to ensure the operation. good.

Finally, the operation (C) will be described with reference to the timing chart shown in FIG. The outputs V _Y1 , V _Y2 , ... Of the buffer circuit 30 are set to a low level voltage to set the transistors in a non-conducting state. The signal of each photodiode is transferred for one row to the horizontal signal line 22 via the transistor 21, and is output to the outside 28 via the transistor 23 selected by the register 24. At this time, the gate voltage (V _Y'G ) of the transistor 29
Is, of course, kept at a low level voltage.

As described above, according to the present embodiment, it is possible to obtain the addition output of the pixel in the column direction and the pixel in the row direction, not to mention the normal imaging operation. As a result, the position, size, and
Shape and image recognition are the same as conventional one-field time (1 /
The speed can be increased about 250 times from the unit of 60 seconds to the unit of 1H time (64 μs).

In the above embodiments, the pn diode is used as the photoelectric conversion unit, but a MOS diode or a photoelectric conversion film may be used. Although a MOS-FET is used as the switch transistor, another element such as a bipolar transistor or a junction FET may be used as long as it does not depart from the gist of the present invention.

〔The invention's effect〕

According to the present invention, since the data acquisition time for image recognition can be shortened from 1 field time to 1H time,
250 times faster image processing is possible.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of a solid-state image pickup device which is an embodiment of the present invention, FIG. 2 is a block diagram of a conventional device, and FIGS. 3 and 4 are objects of the present invention. FIG. 5 is an explanatory diagram of image processing contents, FIG. 5 is a conventional signal output timing chart, and FIGS. 6 and 7 are signal output timing charts for an embodiment of the present invention. 1 ... Photodiode, 2 ... Vertical switch transistor, 21 ... Switch transistor, 7 ... Vertical signal line, 22 ... Horizontal signal line.

Front page continued (72) Inventor Toshifumi Ozaki 1-280 Higashi Koigakubo, Kokubunji City, Central Research Laboratory, Hitachi, Ltd. (72) Hajime Akimoto 1-280 Higashi Koigakubo, Kokubunji City, Central Research Laboratory, Hitachi Ltd.

Claims (6)

(57) [Claims] 1. A solid-state imaging device comprising a plurality of light-receiving elements arranged two-dimensionally on the same semiconductor substrate and means for sequentially selecting signals from the light-receiving elements and outputting the signals to each row or each row. A solid-state image pickup device, comprising means for adding the signals of the columns and outputting the result of the addition to the outside. 2. The plurality of light receiving elements are provided with signal output lines of each of the rows and columns independently connected to each other through switching elements, and means for selecting the signal output lines is provided. The solid-state image sensor according to claim 1, characterized in that: 3. The solid-state imaging device according to claim 1 or 2, wherein a switching element for directly selecting the light receiving element is connected to each of the plurality of light receiving elements. element. 4. The solid-state imaging device according to claim 3, wherein two or more switching devices are connected to each of the plurality of light receiving devices. 5. The light receiving element is a pn junction diode or a MOS.
The solid-state imaging device according to any one of claims 1 to 4, which is a diode or a photoelectric conversion film. 6. The solid-state image pickup device according to claim 1, wherein the switching element is a MOS transistor, a bipolar transistor, or a junction FET.