JP2544676B2 - Method for manufacturing semiconductor device - Google Patents

Abstract

PURPOSE:To facilitate the manufacture of a semiconductor device in excellent radiating characteristics by a method wherein the metallic members different from leads are laid between flange parts and a semiconductor element. CONSTITUTION:A semiconductor device wherein metallic members 3, 4 different from the leads 1, 2 are laid between flange parts 9, 10 and a semiconductor element 5 is manufactured. Accordingly, the wall thickness and the diameter of the metallic members 3, 4 can be set up freely to be actuated effectively as radiators. Furthermore, non-oxidative gas for heating process can be fed to the region containing solder layers 11, 12, 13, 14 from multiple positions such as a gas inlet port 20 and a gas introducing channel 23 between jigs 15 and 16. Through these procedures, respective solder layers 11, 12, 13, 14 can be contained in excellent non-oxidative gas atmosphere. Accordingly, the oxidation of the solder can be satisfactorily avoided.

Description

The present invention relates to a method for manufacturing a semiconductor device having a structure in which a semiconductor element is sandwiched between two lead flange portions and soldered.

[Prior Art and Problems to be Solved by the Invention] A nail-head-shaped header portion (hereinafter, referred to as a flange portion) formed at the tips of two leads coaxially opposed to each other.
There is a diode with a structure in which a semiconductor chip is sandwiched between. This kind of diode is widely used for small signals to power. By the way, in the case of a power diode, it is necessary to improve the heat dissipation thereof as much as possible. Although there is a method of thickening the lead wire diameter as an effective means for improving heat dissipation, there is a limit to thickening the lead wire in terms of bending and the like. Therefore, it is desirable that the flange portion be formed thick so that it can effectively function as a heat dissipation plate. However, since the flange portion is formed by crushing the tip end of the rod-shaped lead portion in the axial direction, it is difficult to form the flange portion with a large thickness.

Therefore, an object of the present invention is to provide a method capable of easily manufacturing a semiconductor device having good heat dissipation.

[Means for Solving the Problems] The present invention for achieving the above object will be described with reference to the reference numerals of the drawings showing an embodiment. Having first and second leads 1, 2 each having a formed flange portion 9, 10,
Between the flange portion 9 of the first lead 1 and the flange portion 10 of the second lead 2, the first solder layer 11, the first metal member 3, the second solder layer 12, and the semiconductor element 5 are provided. Third solder layer
In a method of manufacturing a semiconductor device in which a third metal member 4, a second metal member 4, and a fourth solder layer 14 are sequentially arranged, a flange portion 9 of the first lead 1 and the first solder are formed on one main surface. layer
11, the first metal member 3, the second solder layer 12, the semiconductor element 5, the third solder layer 13, the second metal member 4, and the fourth solder layer 14 A first jig 15 having a recess 17 deeper than the thickness and having a first lead insertion hole 19 and a gas introduction hole 20 formed in the bottom surface of the recess 17;
A step of preparing a second jig 16 having a second lead insertion hole 21 formed on one main surface; and a step of preparing the first jig 15 in the first lead insertion hole 19 of the first jig 15. The lead portion 7 of the lead 1 is inserted, and the recess 17 of the first jig 15 is inserted.
Inside, the flange portion 9 of the first lead 1, the first solder layer 11, the first metal member 3, and the second
Solder layer 12, the semiconductor element 5, and the third solder layer
13, a step of stacking the second metal member 4 and the fourth solder layer 14 in this order, and the second lead insertion hole 21 of the second jig 16 with the second The lead portion 8 of the lead 2 is inserted, the main surface of the second jig 16 is opposed to the main surface of the first jig 15, and the fourth solder layer 14
Via the step of placing the flange portion 10 of the second lead 2 on the above, and the gas introduction path 23 and the gas introduction hole 20 between the facing surfaces of the first and second jigs 15 and 16 A flange portion of the first lead 1 is formed by introducing a non-oxidizing gas into the recess 17 and heating the first, second, third and fourth solder layers 11, 12, 13 and 14. 9, the first metal member 3, the semiconductor element 5, the second metal member 4, and the second lead 2
And a step of fixing the flange portion (10) and the first, second, third and fourth solder layers (11, 12, 13, 14), respectively, to a method for manufacturing a semiconductor device. is there.

[Operation] According to the present invention, it is possible to provide a semiconductor device in which the metal members 3 and 4 separate from the leads 1 and 2 are interposed between the flange portions 9 and 10 and the semiconductor element 5. Therefore, the thicknesses and diameters of the metal members 3 and 4 can be freely set, and this can effectively function as a heat radiator. As a result, a semiconductor device with improved heat dissipation can be provided. Further, according to the present invention, when heating the solder layers 11, 12, 13, 14 from the gas introduction hole 20 and the plurality of gas introduction passages 23 between the first and second jigs 15, 16 in the area where the solder layers 11, 12, 13, 14 are accommodated. Since non-oxidizing gas is supplied, each solder layer 1
A good non-oxidizing gas atmosphere can be created around 1, 12, 13, and 14. Therefore, the oxidation of the solder is satisfactorily prevented, the connection strength for soldering is sufficiently increased, and the electrical resistance and thermal resistance of the semiconductor device are reduced.

[Embodiment] Next, a method of manufacturing a power diode according to an embodiment of the present invention will be described with reference to FIGS. 1 to 5.

As shown in FIGS. 2 and 5, the coaxial lead type power diode manufactured according to the present embodiment has first and second leads 1 and 2, first and second metal members 3 and 4, and Diode chip 5 as a semiconductor element, and resin sealing body 6
It consists of and.

The first and second leads 1 and 2 are formed by crushing the rod-shaped lead portions 7 and 8 extending linearly and the tip end portions of the rod-shaped lead portions 7 and 8 into a nail-head shape (a collar shape). And flange portions 9 and 10 which are respectively formed. Since the flange portions 9 and 10 as the header are relatively thin, they can be easily and inexpensively formed by pressing.

The first and second metal members 3 and 4 are substantially trapezoidal metal blocks, and are copper (Cu) blocks with good heat dissipation provided with a Ni (nickel) plating layer with good solderability on the surface. . First and second solder layers 11 and 12 are provided on one and the other surfaces of the first metal member 3, and third and fourth solder layers are provided on the one and the other surface of the second metal member 4. Layers 13 and 14 are provided.

The diode chip 5 is composed of a semiconductor substrate including a pn junction and a pair of nickel electrode layers provided on a pair of main surfaces of the substrate. The nickel electrode layer of the diode chip 5 is fixed to the metal members 3 and 4 via the solder layers 12 and 13.

When manufacturing the power diode shown in FIG. 5 based on the assembly parts shown in FIG. 2, first and second jigs 15 and 16 shown in FIGS. 1, 3, and 4 are prepared. The first and second jigs 15 and 16 have first and second recesses 17 and 18 on their main surfaces facing each other. Although only the recesses 17 and 18 corresponding to one diode are shown in FIGS. 1 and 3, in reality, a large number of recesses 17 and 18 are provided in the first and second jigs 15 and 16. It is provided like a honeycomb in the vertical and horizontal directions. First of the first jig 15
The recess 17 is deeper than the second recess 18 of the second jig 16.

As is clear from FIG. 4, the first lead insertion hole 19 and a plurality of (four) gas introduction holes 20 surrounding the first lead insertion hole 19 are formed on the bottom surface of the first recess 17, as shown in FIG. Second recess
A second lead insertion hole 21 is formed on the bottom surface of 18.
The first and second lead insertion holes 19 and 21 are arranged at the centers of the bottom surfaces of the first and second recesses 17 and 18, respectively. Also,
The bottom surfaces of the first and second recesses 17 and 18 are formed in the shape of an inverted cone or an inverted truncated cone. Further, the gas introduction hole 20 is located outside the region where the flange portion 9 shown by the dotted line in FIG. 4 is arranged.

Next, as shown in FIG. 3, after arranging the first jig 15 and the second jig 16 with one main surface thereof facing upward,
The first lead 1 is arranged in the first jig 15 so that the lead portion 7 and the flange portion 9 of the lead 1 are housed in the first lead insertion hole 19 and the first recess 17, respectively, and further, First
Then, the metal member 3, the diode chip 5, and the second metal member 4 are charged. Although the diode chip 5 and the metal member 4 are shown in a floating state in FIG. 3, they are, of course, placed on the first metal member 3 in order. In addition, the second lead 2 is arranged on the second jig 16 so that the lead portion 8 and the flange portion 10 of the second lead 2 are housed in the second lead insertion hole 21 and the second recess 18, respectively. To do. The peripheral edge of the flange portion 9 contacts the tapered portion formed on the bottom surface of the first recess 17. Therefore, even if the diameter of the flange portion 9 varies, the flange portion 9 stably contacts the bottom surface of the recess 17.

The depth of the first recess 17 is determined by the flange portion 9 and the solder layer 11.
, Metal member 3, solder layer 12, diode chip 5, solder layer
It is deeper than the total thickness of 14, the metal member 4, and the solder layer 13.
Further, the diameter of the first recess 17 is equal to the diameter of the first and second metal members 3,
4 and the diameter of the diode chip 5 are approximately equal, so that these coaxial arrangements are achieved.

Next, as shown by the arrow in FIG. 3, the second jig 16 is inverted so that one main surface thereof faces downward, and the first jig 15 and the second jig 16 are It is arranged so that one main surface faces each other and the first and second recesses 17 and 18 face each other. The first jig 15 and the second jig 16 are separated by a spacer (not shown) by about 0.3 mm. When the first and second jigs 15 and 16 are combined, the first and second jigs
The first metal member 3, the diode chip 5, the second metal member 4, and the flange portion 10 of the second lead 2 are arranged in this order in the space region 22 formed by the recesses 17 and 18 of the first flange portion 9 in this order. Placed on top of. In addition, the first and second jigs 15 and 16
A gas introduction path 23 leading to the space region 22 is obtained therebetween.

Next, the second lead 2 is lightly pressed to the flange portion 9 side by means such as placing a weight. by this,
The first metal member 3, the diode chip 5, and the second metal member 4 are the flange portions 9 and 10 of the first and second leads 1 and 2.
Sandwiched between. The periphery of the flange portion 9 of the first lead 1 is pressed against the bottom surface of the recess 17. At this time,
On the bottom surface of the recess 17, the first gas introduction hole 20 is located outside the flange portion 9 in plan view and is close to the first solder layer 11. Further, the first gas introduction hole 20 is located below the first metal member 3. 1 and 3, for convenience of explanation, the lead portions 7 and 8 and the lead insertion hole 19,
Although a gap is formed between the peripheral surface of 21 and the peripheral face, the above gap is actually negligibly small in order to limit the lateral movement of the first and second leads 1 and 2 during assembly. .

Next, the heating furnace is maintained in a reducing gas atmosphere in which hydrogen gas is mixed with nitrogen gas, and then the first and second jigs are used.
The diode assembly with 15 and 16 is put into a heating furnace. The entire space region 22 consisting of the first and second recesses 17 and 18 is replaced by the reducing gas introduced through the gas introduction hole 20 and the gas introduction passage 23 at the interface between the first and second jigs 15 and 16. To be done. Then, by heating based on predetermined temperature control, the solder layers 11, 12, 13, 14 are once melted and then solidified. Since the reducing gas is continuously supplied from above and below the space region 22 during the heating of the solder layers 11, 12, 13, and 14, the solder layers 11 and 12 during the heating,
Oxidation of 13, 14 and the part that becomes the adhesive surface is prevented.
Therefore, good soldering can be performed without using a solder flux, and the first and second metal members 3 and 4 and the diode chip 5 are mechanically and electrically strong between the pair of flange portions 9 and 10. Can be soldered well. Further, since it is not necessary to use the flux, the characteristic deterioration due to the residue of the flux, which has been a problem in the past, does not occur.

A power diode is completed by forming a resin encapsulant 6 on the diode assembly obtained as described above by a well-known transfer mold as shown in FIG.

The metal members 3 and 4 of this power diode effectively function as a heat radiator. Therefore, it is possible to provide a power diode with improved heat dissipation without forming the flange portions 9 and 10 of the leads 1 and 2 large. Further, in the present embodiment, the first
Since the reducing gas is supplied to the space region 22 formed by the second recesses 17 and 18 from the upper side and the lower side thereof, all the solder layers 11, 12, 13, 14 accommodated in the space region 22. It is possible to create a reducing gas atmosphere around. Therefore, the solder layers 11, 1
Oxidation of 2, 13, 14 is surely prevented. As a result, it is possible to provide a power diode having a sufficiently large soldering strength and good electrical characteristics.

[Modifications] The present invention is not limited to the above-described embodiments, and the following modifications are possible.

(1) The solder layers 11 and 14 may be preformed on the flange portions 9 and 10 and supplied. Further, the solder layers 12 and 13 may be provided by being provided on the diode chip 5 side. Also, the solder layers 11, 1
2, 13, 14 may be supplied as independent solder foils.

(2) Normally, reducing gas is used as non-oxidizing gas,
Inert gas may be used depending on the material of the leads and the solder.

(3) The formation position of the gas introduction hole 20 can be changed as appropriate,
It is preferable that the solder layer 11 is arranged outside the flange portion 9 and below the first metal member 3 in plan view so that the non-oxidizing gas can be directly supplied to the periphery of the solder layer 11.

(4) The gas introduction path 23, which is a separation portion formed at the interface between the first jig 15 and the second jig 16, is not provided by a spacer, and the first and / or second jig 15, It may be formed based on the groove portion (gas introduction groove) formed in 16.

(5) The recess 18 of the second jig 16 can be omitted.

[Advantages of the Invention] As described above, according to the present invention, it is possible to easily form a semiconductor device having improved heat dissipation and good mechanical and electrical connection of solder.

[Brief description of drawings]

FIG. 1 is a sectional view showing first and second jigs in which parts of a power diode according to an embodiment of the present invention are housed, FIG. 2 is a front view showing parts for assembling a diode, and FIG. Sectional drawing which shows the 1st and 2nd jig | tool before combining, FIG. 4 is sectional drawing in the IV-IV line of FIG. 1, and FIG. 5 is sectional drawing which shows the completed power diode. 1 ... first lead, 2 ... second lead, 3 ... first
Metal member, 4 ... second metal member, 5 ... diode chip, 7,8 ... lead portion, 9,10 ... flange portion, 11 ...
... first solder layer, 12 ... second solder layer, 13 ... third solder layer, 14 ... fourth solder layer, 15 ... first jig, 16 ...
Second jig, 17 ... first recess, 18 ... second recess, 19
...... First lead insertion hole, 20 ...... Gas introduction hole, 21 ...... Second lead insertion hole.

Claims (1)

(57) [Claims] 1. A lead portion (7) (8) and the lead portion (7).
(8) having first and second leads (1) and (2) each having a flange portion (9) (10) formed at a tip portion thereof, and a flange portion of the first lead (1) The first portion is provided between the (9) and the flange portion (10) of the second lead (2).
Solder layer (11), first metal member (3), second solder layer (12), semiconductor element (5), third solder layer (13), second
A method for manufacturing a semiconductor device in which a metal member (4) and a fourth solder layer (14) are sequentially arranged, wherein a flange portion (9) of the first lead (1) and the flange portion (9) are provided on one main surface. A first solder layer (11), the first metal member (3), the second solder layer (12), the semiconductor element (5), the third solder layer (13), and the second solder layer (13). A recess (17) deeper than the total thickness of the metal member (4) and the fourth solder layer (14) is formed, and a first lead insertion hole (19) is formed on the bottom surface of the recess (17). A first jig (15) having a gas introduction hole (20) formed therein and a second jig (16) having a second lead insertion hole (21) formed on one main surface thereof. A step of preparing and inserting the lead portion (7) of the first lead (1) into the first lead insertion hole (19) of the first jig (15), and In front of the jig (15) In the recess (17), the flange portion (9) of the first lead (1), the first solder layer (11), the first metal member (3), and the second The solder layer (12), the semiconductor element (5), the third solder layer (13), and the second
Laminating the metal member (4) and the fourth solder layer (14) in this order, and the second lead insertion hole (21) of the second jig (16).
Insert the lead portion (8) of the second lead (2) into
On the main surface of the first jig (15), the second jig (1
6) placing the flange portion (10) of the second lead (2) on the fourth solder layer (14) with the main surfaces facing each other, and the first and second A non-oxidizing gas is introduced into the recess (17) through the gas introduction path (23) between the facing surfaces of the jigs (15) and (16) and the gas introduction hole (20), and The second, third and fourth solder layers (11) (12) (13) (14) are heated to heat the flange portion (9) of the first lead (1) and the first metal member (3). ), The semiconductor element (5), the second metal member (4) and the flange portion (10) of the second lead (2), and the first, second, third and fourth solder layers. (11) (12) (13) (14), respectively, and the process of fixing, The manufacturing method of the semiconductor device characterized by the above-mentioned.