JPH11260968A - Composite semiconductor device - Google Patents
Composite semiconductor deviceInfo
- Publication number
- JPH11260968A JPH11260968A JP10082599A JP8259998A JPH11260968A JP H11260968 A JPH11260968 A JP H11260968A JP 10082599 A JP10082599 A JP 10082599A JP 8259998 A JP8259998 A JP 8259998A JP H11260968 A JPH11260968 A JP H11260968A
- Authority
- JP
- Japan
- Prior art keywords
- heat sink
- semiconductor device
- insulating case
- composite semiconductor
- thermal expansion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、複合半導体装置に関
し、特に放熱板を絶縁ケースにインサートモールドした
構造の複合半導体装置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a composite semiconductor device, and more particularly to a composite semiconductor device having a structure in which a heat sink is insert-molded in an insulating case.
【０００２】[0002]
【従来の技術】従来のこの種の複合半導体装置を図７及
び図８を参照して説明する。なお、図７は蓋体を取り除
いた複合半導体装置の内部を示す断面図、図７は完成状
態を示す複合半導体装置の斜視図である。図７におい
て、１は放熱板であり、この放熱板１上に絶縁基板２が
載置・固着されるが、該絶縁基板２上には所定の形状の
導体パターン４が形成され、この導体パターン４上に半
導体チップ３等の電子部品搭載・固着される。また、上
記半導体チップ３の上面電極と絶縁基板２上の導体パタ
ーン４とがボンディングワイヤ５で結線される。次に、
放熱板１上に上記の絶縁基板２が搭載・固着された後、
両端開口の絶縁ケース６の下端に形成した切欠部に接着
剤７を塗布して放熱板１の外周部に被せる。次で必要に
応じ、絶縁ケース６の内部に封止用樹脂を充填した後、
図示を省略した蓋体を被せる。また、蓋体から導出した
外部導出端子８及び信号端子９は図８に示すように、蓋
体表面で水平に折曲げられて図示のような複合半導体装
置１０を得る。2. Description of the Related Art A conventional composite semiconductor device of this type will be described with reference to FIGS. FIG. 7 is a cross-sectional view showing the inside of the composite semiconductor device with the lid removed, and FIG. 7 is a perspective view of the composite semiconductor device showing a completed state. In FIG. 7, reference numeral 1 denotes a heat sink, on which an insulating substrate 2 is placed and fixed, on which a conductor pattern 4 having a predetermined shape is formed. Electronic components such as the semiconductor chip 3 are mounted and fixed on the substrate 4. Further, the upper surface electrode of the semiconductor chip 3 and the conductor pattern 4 on the insulating substrate 2 are connected by bonding wires 5. next,
After the insulating substrate 2 is mounted and fixed on the heat sink 1,
An adhesive 7 is applied to a cutout formed at the lower end of the insulating case 6 at both ends and is placed over the outer peripheral portion of the heat sink 1. Next, if necessary, after filling the inside of the insulating case 6 with a sealing resin,
A cover not shown is placed. Further, as shown in FIG. 8, the external lead-out terminal 8 and the signal terminal 9 led out from the lid are horizontally bent on the surface of the lid to obtain the composite semiconductor device 10 as shown in the figure.
【０００３】[0003]
【発明が解決しようとする課題】ところで上記のような
複合半導体装置の場合、絶縁ケース６の下端に形成した
切欠部に接着剤７を塗布し、放熱板１と接着する工程を
必要とし、作業工数が増加し、そのため製造原価の増加
を招来させていた。However, in the case of the above-described composite semiconductor device, a step of applying an adhesive 7 to a notch formed at the lower end of the insulating case 6 and bonding the adhesive 7 to the heat sink 1 is required. The number of man-hours has increased, which has led to an increase in manufacturing costs.
【０００４】[0004]
【発明の目的】本発明は、上記のような課題を解決する
ためのなされたもので、絶縁ケースと放熱板との接着工
程を不要とし、作業工数を減少させ、製造原価を低減し
得る複合半導体装置を提供することを目的とするもので
ある。本発明の他の目的は、絶縁ケースと放熱板とを一
体化する場合に、両者の熱膨張率の差による放熱板の反
り及び絶縁ケースに加わる機械的ストレスを緩和する構
造の複合半導体装置を提供することを目的とするもので
ある。SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and eliminates the need for a bonding step between an insulating case and a heat sink, thereby reducing the number of working steps and the manufacturing cost. It is an object to provide a semiconductor device. Another object of the present invention is to provide a composite semiconductor device having a structure in which, when an insulating case and a heat sink are integrated, a warp of the heat sink due to a difference in thermal expansion coefficient between the two and a mechanical stress applied to the insulating case are reduced. It is intended to provide.
【０００５】[0005]
【課題を解決するための手段】本発明の複合半導体装置
は、導体パターン上に半導体チップ、外部導出端子等の
電子部品を搭載し、所定の電気回路を構成した絶縁基板
と、この絶縁基板を搭載する放熱板と、この放熱板に被
せられる両端開口の絶縁ケースと、この絶縁ケースの開
口部に配置される蓋体とを有する複合半導体装置におい
て、前記絶縁ケースの下端に前記放熱板をインサートモ
ールドして一体化したことことを特徴とするものであ
る。また、本発明の複合半導体装置は、前記放熱板の外
周部に熱膨張吸収用溝を設けたことを特徴するものであ
る。さらに、本発明の複合半導体装置は、前記熱膨張吸
収用溝が放熱板の両面の外周部に形成されていることを
特徴とするものである。さらに、本発明の複合半導体装
置は、前記放熱板として、低熱膨張特性と高熱伝導特性
を備えた異種金属を多層に積層し、熱間静水圧プレスを
利用して接合して得られた異種金属複合材を使用したこ
とを特徴とするものである。According to the present invention, there is provided a composite semiconductor device comprising an insulating substrate on which electronic components such as a semiconductor chip and an external lead terminal are mounted on a conductor pattern to form a predetermined electric circuit; In a composite semiconductor device having a heat sink to be mounted, an insulating case having openings at both ends covered by the heat sink, and a lid disposed at an opening of the insulating case, the heat sink is inserted into a lower end of the insulating case. It is characterized by being molded and integrated. The composite semiconductor device of the present invention is characterized in that a groove for absorbing thermal expansion is provided on an outer peripheral portion of the heat sink. Further, the composite semiconductor device of the present invention is characterized in that the grooves for thermal expansion absorption are formed on the outer peripheral portions on both surfaces of the heat sink. Further, in the composite semiconductor device of the present invention, as the heat sink, a dissimilar metal obtained by laminating dissimilar metals having low thermal expansion characteristics and high heat conduction characteristics in multiple layers and joining them using a hot isostatic press. It is characterized by using a composite material.
【０００６】[0006]
【実施例】以下、本発明の複合半導体装置を図を参照し
て説明する。図１は本発明の第１の実施例を示す絶縁ケ
ースの断面図であり、図２はその裏面図である。図にお
いて、１１は放熱板であり、この放熱板１１の外周には
絶縁ケース１６の内部にインサートされる突出部１２が
形成されている。上記放熱板１１の両面には、該放熱板
１１の全周に亘って熱膨張吸収用溝１３が形成されてい
る。この熱膨張吸収用溝１３の溝の本数は、この実施例
では上面及び下面に各１本ずつ形成されているが、これ
に限定されず必要に応じて複数本設けることもできる。
また、該溝１３の深さについても放熱板１１の機械的強
度を損なわない範囲内で任意に決定し得る。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A composite semiconductor device according to the present invention will be described with reference to the drawings. FIG. 1 is a sectional view of an insulating case showing a first embodiment of the present invention, and FIG. 2 is a rear view thereof. In the figure, reference numeral 11 denotes a heat radiating plate, and a projecting portion 12 inserted into the insulating case 16 is formed on the outer periphery of the heat radiating plate 11. On both surfaces of the radiator plate 11, grooves 13 for absorbing thermal expansion are formed over the entire circumference of the radiator plate 11. In this embodiment, the number of the grooves 13 for thermal expansion absorption is one on each of the upper surface and the lower surface. However, the number is not limited to this, and a plurality of grooves may be provided as necessary.
Also, the depth of the groove 13 can be arbitrarily determined as long as the mechanical strength of the heat sink 11 is not impaired.
【０００７】以上のように加工された放熱板１１を樹脂
成形用金型の中に仮固定して樹脂成形することにより、
図１に示すように、絶縁ケース１６の側壁内に放熱板１
１の突出部１２がインサートモールドされた形状の絶縁
ケース１６が完成する。後の工程は、従来と同様の工程
を経て所定の複合半導体装置を得るものである。[0007] By temporarily fixing the heat sink 11 processed as described above in a resin molding die and molding the resin,
As shown in FIG.
An insulating case 16 in which one protrusion 12 is insert-molded is completed. In the subsequent steps, a predetermined composite semiconductor device is obtained through the same steps as in the related art.
【０００８】次に、図３は、本発明の第２の実施例を示
す絶縁ケースの断面図であり、図４はその裏面図であ
る。この実施例では、放熱板１１の下面側のみに熱膨張
吸収用溝１３を設け、その溝の本数を１本としたもので
ある。なお、該溝１３の加工方法は切削若しくはプレス
により行なわれ、通常の手段により容易に加工すること
が可能できる。Next, FIG. 3 is a sectional view of an insulating case showing a second embodiment of the present invention, and FIG. 4 is a rear view thereof. In this embodiment, the thermal expansion absorbing groove 13 is provided only on the lower surface side of the heat radiating plate 11, and the number of the grooves is one. The groove 13 is processed by cutting or pressing, and can be easily processed by ordinary means.
【０００９】次に、本発明の第３の実施例を図５及び図
６を参照して説明する。この実施例では、放熱板１６と
して低熱膨張と高熱伝導特性に優れた金属複合材を使用
する。この金属複合料は、例えば鉄（Ｆｅ）−ニッケル
（Ｎｉ）合金と銅（Ｃｕ）とを熱間静水圧プレスを利用
して接合したもので、それらの低熱膨張材料と高熱伝導
材料を多層かつ超微細複合構造としたものである。Next, a third embodiment of the present invention will be described with reference to FIGS. In this embodiment, a metal composite material having excellent low thermal expansion and high thermal conductivity is used as the heat sink 16. This metal composite material is obtained by joining an iron (Fe) -nickel (Ni) alloy and copper (Cu) using a hot isostatic press, for example, and comprises a low thermal expansion material and a high thermal conductive material in multiple layers. It has an ultrafine composite structure.
【００１０】図６は上記の金属複合材の外観図である。
図において、金属複合材１７は、Ｃｕ板１８とＦｅ−Ｎ
ｉ合金板１９とが交互に積層され、熱間静水圧プレスを
利用して超微細複合組織により接合されている。この金
属複合材１７の熱膨張係数αは、図示の横方向Ｔと縦方
向Ｌでは異なっており、例えばＴ方向のα＝１４×１０
↑−６／℃程度、Ｌ方向のα＝７×１０↑−６／℃程度
である。本発明では、この熱膨張率の差を考慮してＬ方
向が絶縁ケース１６の長手方向になるようにしてインサ
ートモールドする。このようにすることにより放熱板１
１の反り、樹脂製の絶縁ケース１６への機械的ストレス
を小さくすることができる。FIG. 6 is an external view of the above metal composite.
In the figure, the metal composite material 17 is composed of a Cu plate 18 and Fe-N
The i-alloy plates 19 are alternately laminated, and joined by a superfine composite structure using hot isostatic pressing. The thermal expansion coefficient α of the metal composite material 17 is different between the horizontal direction T and the vertical direction L shown in the figure, for example, α = 14 × 10 in the T direction.
↑ −6 / ° C., α in the L direction = about 7 × 10７−6 / ° C. In the present invention, insert molding is performed such that the L direction is the longitudinal direction of the insulating case 16 in consideration of the difference in the coefficient of thermal expansion. By doing so, the heat sink 1
1 warp and mechanical stress on the insulating case 16 made of resin can be reduced.
【００１１】[0011]
【発明の効果】以上のように、本発明の複合半導体装置
は、放熱板をインサートモールドし、一体化した絶縁ケ
ースを使用するようにしたので、概略次のような効果を
奏する。 （１）絶縁ケースと放熱板とを接着剤により接着する工
程が不要となり、工数が削減され製造原価を低減するこ
とができる。 （２）放熱板の外周に熱膨張吸収用溝を形成したので、
絶縁ケースと放熱板との熱膨張差を吸収し、放熱板の反
りを減少させることができる。 （３）インサートモールドする放熱板に金属複合材を使
用する場合には、熱膨張吸収用溝を設けなくても低熱膨
張特性により、放熱板の反りをさらに減少させることが
できる。As described above, the composite semiconductor device of the present invention uses the insulating case integrated by insert-molding the heatsink, so that the following effects can be obtained. (1) The step of bonding the insulating case and the heat radiating plate with an adhesive is not required, so that the number of steps can be reduced and the manufacturing cost can be reduced. (2) Since a groove for absorbing thermal expansion is formed on the outer periphery of the heat sink,
The difference in thermal expansion between the insulating case and the heat sink can be absorbed, and the warpage of the heat sink can be reduced. (3) In the case where a metal composite material is used for a heat radiating plate to be insert-molded, warpage of the heat radiating plate can be further reduced due to low thermal expansion characteristics without providing a thermal expansion absorbing groove.
【図１】本発明の複合半導体装置に使用する第１の実施
例を示す絶縁ケースの断面図である。FIG. 1 is a sectional view of an insulating case showing a first embodiment used for a composite semiconductor device of the present invention.
【図２】上記絶縁ケースの裏面図である。FIG. 2 is a rear view of the insulating case.
【図３】本発明の第２の実施例を示す絶縁ケースの断面
図である。FIG. 3 is a sectional view of an insulating case showing a second embodiment of the present invention.
【図４】上記第２の実施例の絶縁ケースの裏面図であ
る。FIG. 4 is a rear view of the insulating case of the second embodiment.
【図５】本発明の第３の実施例を示す絶縁ケースの断面
図である。FIG. 5 is a sectional view of an insulating case showing a third embodiment of the present invention.
【図６】上記第３の実施例を示す絶縁ケースに使用する
金属複合材の外観図である。FIG. 6 is an external view of a metal composite material used for an insulating case according to the third embodiment.
【図７】従来の複合半導体装置の断面図である。FIG. 7 is a cross-sectional view of a conventional composite semiconductor device.
【図８】上記従来の複合半導体装置の外観図である。FIG. 8 is an external view of the conventional composite semiconductor device.
１１ 放熱板 １２ 突出部 １３ 熱膨張吸収用溝 １６ 絶縁ケース １７ 金属複合材 １８ Ｃｕ板 １９ Ｆｅ−Ｎｉ合金板 DESCRIPTION OF SYMBOLS 11 Heat sink 12 Projection part 13 Groove for thermal expansion absorption 16 Insulation case 17 Metal composite material 18 Cu plate 19 Fe-Ni alloy plate
Claims (4)
出端子等の電子部品を搭載し、所定の電気回路を構成し
た絶縁基板と、この絶縁基板を搭載する放熱板と、この
放熱板に被せられる両端開口の絶縁ケースと、この絶縁
ケースの開口部に配置される蓋体とを有する複合半導体
装置において、 前記絶縁ケースの下端に前記放熱板をインサートモール
ドして一体化したことを特徴とする複合半導体装置。1. An insulating substrate on which electronic components such as a semiconductor chip and an external lead-out terminal are mounted on a conductor pattern to form a predetermined electric circuit, a heat sink on which the insulating substrate is mounted, and the heat sink. A composite semiconductor device comprising: an insulating case having openings at both ends; and a lid disposed at an opening of the insulating case, wherein the heat sink is integrated with the lower end of the insulating case by insert molding. Semiconductor device.
設けたことを特徴する請求項１に記載の複合半導体装
置。2. The composite semiconductor device according to claim 1, wherein a groove for absorbing thermal expansion is provided on an outer peripheral portion of said heat radiating plate.
周部に形成されていることを特徴とする請求項２に記載
の複合半導体装置。3. The composite semiconductor device according to claim 2, wherein said grooves for absorbing thermal expansion are formed on outer peripheral portions on both surfaces of a heat sink.
伝導特性を備えた異種金属を多層に積層し、熱間静水圧
プレスを利用して接合して得られた異種金属複合材を使
用したことを特徴とする請求項１乃至請求項３のいずれ
かに記載の複合半導体装置。4. A dissimilar metal composite material obtained by laminating dissimilar metals having low thermal expansion characteristics and high heat conduction characteristics in multiple layers and joining them using a hot isostatic press is used as the heat sink. The composite semiconductor device according to claim 1, wherein:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10082599A JPH11260968A (en) | 1998-03-13 | 1998-03-13 | Composite semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10082599A JPH11260968A (en) | 1998-03-13 | 1998-03-13 | Composite semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH11260968A true JPH11260968A (en) | 1999-09-24 |
Family
ID=13778958
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10082599A Pending JPH11260968A (en) | 1998-03-13 | 1998-03-13 | Composite semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH11260968A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009033171A (en) * | 2007-07-26 | 2009-02-12 | Semikron Elektronik Gmbh & Co Kg | Power semiconductor module having connection mechanism |
| KR100886808B1 (en) * | 2002-02-19 | 2009-03-04 | 페어차일드코리아반도체 주식회사 | Power semiconductor module assembling unit having heat sink |
| KR100917170B1 (en) * | 2008-11-26 | 2009-09-15 | 페어차일드코리아반도체 주식회사 | Power semiconductor module assembly having heat sink |
| JP2009212647A (en) * | 2008-03-03 | 2009-09-17 | Kyocera Corp | Electronic apparatus |
| JP2014146653A (en) * | 2013-01-28 | 2014-08-14 | Dainippon Printing Co Ltd | Multifaceted body of lead frame with resin, multifaceted body of optical semiconductor device, lead frame with resin, optical semiconductor device |
| JP5729563B2 (en) * | 2009-10-30 | 2015-06-03 | 国立研究開発法人宇宙航空研究開発機構 | Joining structure of metal member and composite material member |
| JP2019117878A (en) * | 2017-12-27 | 2019-07-18 | 株式会社豊田自動織機 | Semiconductor device |
-
1998
- 1998-03-13 JP JP10082599A patent/JPH11260968A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100886808B1 (en) * | 2002-02-19 | 2009-03-04 | 페어차일드코리아반도체 주식회사 | Power semiconductor module assembling unit having heat sink |
| JP2009033171A (en) * | 2007-07-26 | 2009-02-12 | Semikron Elektronik Gmbh & Co Kg | Power semiconductor module having connection mechanism |
| JP2009212647A (en) * | 2008-03-03 | 2009-09-17 | Kyocera Corp | Electronic apparatus |
| JP4523046B2 (en) * | 2008-03-03 | 2010-08-11 | 京セラ株式会社 | Electronics |
| KR100917170B1 (en) * | 2008-11-26 | 2009-09-15 | 페어차일드코리아반도체 주식회사 | Power semiconductor module assembly having heat sink |
| JP5729563B2 (en) * | 2009-10-30 | 2015-06-03 | 国立研究開発法人宇宙航空研究開発機構 | Joining structure of metal member and composite material member |
| JP2014146653A (en) * | 2013-01-28 | 2014-08-14 | Dainippon Printing Co Ltd | Multifaceted body of lead frame with resin, multifaceted body of optical semiconductor device, lead frame with resin, optical semiconductor device |
| JP2019117878A (en) * | 2017-12-27 | 2019-07-18 | 株式会社豊田自動織機 | Semiconductor device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6690087B2 (en) | Power semiconductor module ceramic substrate with upper and lower plates attached to a metal base | |
| CN100517696C (en) | Semiconductor device having semiconductor element, insulation substrate and metal electrode | |
| JP4825259B2 (en) | Power semiconductor module and manufacturing method thereof | |
| EP1394826B1 (en) | Micro-relay and method for manufacturing the same | |
| US6297074B1 (en) | Film carrier tape and laminated multi-chip semiconductor device incorporating the same and method thereof | |
| US5703398A (en) | Semiconductor integrated circuit device and method of producing the semiconductor integrated circuit device | |
| JP4899481B2 (en) | Manufacturing method of resin-encapsulated semiconductor device having a heat radiator exposed outside | |
| US20130093082A1 (en) | Semiconductor device, electrode member, and electrode member fabrication method | |
| JP4254527B2 (en) | Semiconductor device | |
| KR102228945B1 (en) | Semiconductor package and method of fabricating the same | |
| JP2829925B2 (en) | Semiconductor package and electronic circuit board | |
| US20060220188A1 (en) | Package structure having mixed circuit and composite substrate | |
| JP4100332B2 (en) | Electronic device and manufacturing method thereof | |
| JPH11260968A (en) | Composite semiconductor device | |
| JPH1022435A (en) | Semiconductor device and manufacture thereof | |
| JPH04249353A (en) | Resin-sealed semiconductor device | |
| JPH0637217A (en) | Semiconductor device | |
| JP4810898B2 (en) | Semiconductor device | |
| KR19980070675A (en) | Semiconductor package having offset die pad and manufacturing method thereof | |
| JPH1012788A (en) | Semiconductor device, manufacture thereof and lead frame for the semiconductor device | |
| WO2022195865A1 (en) | Four-sided cooling power module | |
| JP2012238737A (en) | Semiconductor module and manufacturing method therefor | |
| JP2960698B2 (en) | Resin-sealed semiconductor device with heat sink and method of manufacturing the same | |
| JP4249366B2 (en) | Metal base circuit board and electronic module manufacturing method | |
| JP2686156B2 (en) | Heat dissipation type semiconductor package |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Written amendment |
Effective date: 20040122 Free format text: JAPANESE INTERMEDIATE CODE: A523 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20040122 |
|
| A871 | Explanation of circumstances concerning accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A871 Effective date: 20040122 |
|
| A975 | Report on accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A971005 Effective date: 20040212 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20040218 |
|
| A131 | Notification of reasons for refusal |
Effective date: 20040302 Free format text: JAPANESE INTERMEDIATE CODE: A131 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20040423 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20040513 |
|
| A02 | Decision of refusal |
Effective date: 20050329 Free format text: JAPANESE INTERMEDIATE CODE: A02 |