JP2542431B2 - Light emitting diode print head - Google Patents
Light emitting diode print headInfo
- Publication number
- JP2542431B2 JP2542431B2 JP33181488A JP33181488A JP2542431B2 JP 2542431 B2 JP2542431 B2 JP 2542431B2 JP 33181488 A JP33181488 A JP 33181488A JP 33181488 A JP33181488 A JP 33181488A JP 2542431 B2 JP2542431 B2 JP 2542431B2
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- emitting diode
- pitch
- electrodes
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05553—Shape in top view being rectangular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は発光ダイオード（以下、「LED」という）プ
リントヘッドに関し、特に、LEDアレイチップの電極の
配列構造に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting diode (hereinafter referred to as "LED") printhead, and more particularly to an electrode array structure of an LED array chip.
第２図は特開昭62−56163号公報に開示された従来のL
EDアレイを示している。この従来例においては、LEDア
レイ32に128ドットのLED32a（以下、個々のLEDを示すと
きには符号32a−１乃至32a−128を用いる）が等ピッチP
0で配列されており、LED32aのそれぞれには駆動信号を
入力するアルミ電極32b（以下、個々のLEDを示すときに
は符号32b−１乃至32b−128を用いる）が備えられてい
る。FIG. 2 shows a conventional L disclosed in JP-A-62-56163.
The ED array is shown. In this conventional example, LEDs 32a of 128 dots (hereinafter, reference numerals 32a-1 to 32a-128 are used to indicate individual LEDs) are arranged in the LED array 32 at an equal pitch P.
0 are arranged in aluminum electrode 32b to each LED32a is for inputting the driving signal (hereinafter, when showing the individual LED using code 32b-1 to 32b-128) is provided.
そして、アルミ電極32bはLEDアレイ32aと等ピッチP0
で備えられており、両端の電極32b−１と32b−128は幅
狭に形成され、電極32b−１と32b−２間、32b−127と32
b−128間がピッチP0より狭いピッチP1になるようにして
いる。これは、LEDアレイ32をウエハからダイシングす
るときに、ダイシング位置がずれて誤って短く裁断して
も、僅かなずれであればアルミ電極32b−１又は32b−12
8を破損させず不良品の発生を防止するためである。The aluminum electrode 32b and the LED array 32a have the same pitch P 0.
The electrodes 32b-1 and 32b-128 at both ends are formed to have a narrow width, and the electrodes 32b-1 and 32b-2 are provided between the electrodes 32b-1 and 32b-2.
The pitch P 1 between b and 128 is narrower than the pitch P 0 . This is because when the LED array 32 is diced from the wafer, the aluminum electrodes 32b-1 or 32b-12 can be cut even if the dicing position is misaligned and accidentally cut short.
This is to prevent the generation of defective products without damaging the item 8.
しかしながら、上記従来例においては、LEDアレイ32
の基板設置に際し、電極の幅の小さいアルミ電極32b−
１と32b−128を検出してLEDアレイ32の端部を認識して
いたが、他の電極と幅の差が小さいため、装置が誤認識
するおそれがあった。この場合、LEDアレイ32同士を重
ねて設置してしまい破損により製造歩留まりを低下させ
る問題があった。また、この場合にはアルミ電極32b−
１と32b−128を位置基準手段とせず、別に位置基準手段
となる認識マークを設けることも考えられるが、アルミ
電極32bがLEDアレイ32の長さ方向の全域に亘って配列さ
れている構成上、LEDアレイを大きくしない限り、別に
認識マークを設けるスペースが取りにくかった。However, in the above conventional example, the LED array 32
The aluminum electrode 32b-
Although 1 and 32b-128 were detected to recognize the end portion of the LED array 32, there was a possibility that the device would erroneously recognize it because the width difference from other electrodes was small. In this case, there is a problem in that the LED arrays 32 are placed so as to overlap each other, and the manufacturing yield is reduced due to damage. In this case, the aluminum electrode 32b-
1 and 32b-128 may not be the position reference means but a recognition mark may be separately provided as the position reference means, but the aluminum electrodes 32b are arranged over the entire length of the LED array 32. As long as the LED array is not enlarged, it is difficult to get a space to provide a separate recognition mark.
そこで、本発明は上記したような従来技術の課題を解
決するためになされたもので、その目的とするところ
は、LEDアレイを基板に設置する際の位置認識を容易に
することによって製造歩留をよくすることができる発光
ダイオードプリントヘッドを提供することにある。Therefore, the present invention has been made in order to solve the above-mentioned problems of the prior art, and an object of the present invention is to make the manufacturing yield by facilitating the position recognition when the LED array is installed on the substrate. It is an object of the present invention to provide a light emitting diode print head capable of improving the above.
本発明に係るLEDプリントヘッドは、基板と、それぞ
れ所定ピッチに配列された複数の発光ダイオードと各発
光ダイオードに個々に接続された駆動信号入力用の複数
の入力電極とを有し、上記基板上に列状に配設された複
数の発光ダイオードアレイチップと、上記基板上に上記
発光ダイオードアレイチップに近接して配設され且つそ
の出力で上記各入力電極を介し上記各発光ダイオードの
駆動を行う複数の駆動回路チップとを備え、上記発光ダ
イオードアレイチップ上の上記複数の発光ダイオードの
それぞれに駆動信号を入力する複数の入力電極は、上記
発光ダイオードの配列ピッチより狭いピッチで配列され
ていることを特徴としている。The LED print head according to the present invention has a substrate, a plurality of light emitting diodes arranged at a predetermined pitch, and a plurality of input electrodes for driving signal input individually connected to each light emitting diode. A plurality of light emitting diode array chips arranged in a row, and the light emitting diodes are arranged on the substrate in the vicinity of the light emitting diode array chips and the outputs thereof drive the light emitting diodes via the input electrodes. A plurality of drive circuit chips, and a plurality of input electrodes for inputting a drive signal to each of the plurality of light emitting diodes on the light emitting diode array chip are arranged at a pitch narrower than the arrangement pitch of the light emitting diodes. Is characterized by.
また、本発明に係るLEDプリントヘッドの他の形態に
おいては、上記入力電極の配列ピッチを狭くすることに
よって確保された上記基板上のスペースに位置基準手段
を備えている。In another form of the LED print head according to the present invention, the position reference means is provided in the space on the substrate secured by narrowing the arrangement pitch of the input electrodes.
本発明においては、LEDアレイの入力電極を発光ダイ
オードの配列ピッチより狭いピッチで配列したことによ
って、LEDアレイ上にスペースを確保でき、このスペー
スに位置基準手段を設けることができる。In the present invention, by arranging the input electrodes of the LED array at a pitch narrower than the arrangement pitch of the light emitting diodes, a space can be secured on the LED array, and the position reference means can be provided in this space.
以下に本発明を図示の実施例に基づいて説明する。 The present invention will be described below based on the illustrated embodiments.
第１図は本発明に係るLEDプリントヘッドを概略的に
示す平面図である。FIG. 1 is a plan view schematically showing an LED print head according to the present invention.
同図において、１は基板であり、この基板１上には複
数の（図では１個のみを示す）LEDアレイ２が備えられ
ている。このLEDアレイ２にはLED2aが直線状に且つ等ピ
ッチP0に配列されている。In the figure, 1 is a substrate, and a plurality of (only one is shown in the figure) LED arrays 2 are provided on the substrate 1. In this LED array 2, LEDs 2a are linearly arranged at an equal pitch P 0 .
また、LEDアレイ２上にはLED2aに駆動信号を入力する
ためのアルミ電極2bが備えられている。本実施例におい
ては、このアルミ電極2bはLED2aの配列ピッチより狭い
ピッチP2で配列され、しかもLED2a全体をLEDアレイ２の
中央寄りに備えている。このピッチP2は、例えばLED2a
のピッチP0が63.5μｍの場合にはピッチP2を60μｍに
し、またピッチP0が42.3μｍの場合にはピッチP2を40μ
ｍにするなど少数点以下切り捨てによるか、或いは、予
め決められている割合をピッチP0に乗じる等して決定さ
れる。Further, an aluminum electrode 2b for inputting a drive signal to the LED 2a is provided on the LED array 2. In the present embodiment, the aluminum electrodes 2b are arranged at a pitch P 2 which is narrower than the arrangement pitch of the LEDs 2a, and the entire LEDs 2a are provided near the center of the LED array 2. This pitch P 2 is, for example, LED2a
If the pitch P 0 is 63.5 μm, the pitch P 2 is 60 μm, and if the pitch P 0 is 42.3 μm, the pitch P 2 is 40 μm.
It is determined by rounding down the decimal point or less, such as m, or by multiplying the pitch P 0 by a predetermined ratio.
ところで、第１図に示されるアルミ電極2bは幅狭の部
分Ｎと幅広の部分Ｗとを有し、幅狭の部分Ｎが一列に並
び、幅広の部分Ｗがちどり状に並ぶよう、偶数番目の電
極と奇数番目の電極とを反対方向に向けて備えている。
幅狭の部分Ｎを一列に並べるのは、この部分Ｎがワイヤ
ボンド接続部となること及びワイヤボンド用の装置はこ
の部分Ｎの境界によりワイヤボンド位置を認識するの
で、誤認識防止のためこの部分の間隙を極力広しておき
たいという要請によるものである。また、幅広の部分Ｗ
は製品の機能の良否を判定する場合に試験装置のプロー
ブを当て易くするために必要な部分である。By the way, the aluminum electrode 2b shown in FIG. 1 has a narrow portion N and a wide portion W, the narrow portions N are arranged in a line, and the wide portions W are arranged in a staggered pattern. And the odd-numbered electrodes are provided in opposite directions.
The narrow portions N are arranged in a line because this portion N serves as a wire bond connection portion and the wire bonding apparatus recognizes the wire bond position by the boundary of the portion N, and this is for preventing misrecognition. This is due to a request to widen the gap between the parts as much as possible. Also, the wide portion W
Is a part necessary for facilitating application of the probe of the test apparatus when determining the quality of the function of the product.
一方、５は、例えば、正方形のアルミチップよりなる
認識マークであり、LEDアレイ２を基板１上に配列する
際の位置基準手段として使用される。ただし、位置基準
手段はこれには限らず、最も外側の電極を大きく形成す
ることによって、電極としての機能の他に位置基準手段
としての機能を併せ持たせてもよい。On the other hand, 5 is a recognition mark made of, for example, a square aluminum chip, and is used as a position reference means when the LED array 2 is arranged on the substrate 1. However, the position reference means is not limited to this, and the outermost electrode may be formed to have a large size so as to have the function as the position reference means in addition to the function as the electrode.
また、３は基板１上に備えられたLED2a駆動用のドラ
イバICであり、このドライバIC3はLEDアレイ２に近接し
て且つ１つのLEDアレイ２に対して１つずつ対応して備
えられている。そして、ドライバIC3上にはLEDアレイ２
のアルミ電極2bと同じピッチで配列された出力電極3a
が、アルミ電極2bと向かい合うように備えられている。Reference numeral 3 is a driver IC for driving the LEDs 2a provided on the substrate 1. The driver IC 3 is provided in proximity to the LED array 2 and corresponding to each LED array 2 one by one. . And the LED array 2 on the driver IC3
Output electrodes 3a arranged at the same pitch as the aluminum electrodes 2b of
Are provided so as to face the aluminum electrode 2b.
４はLEDアレイ２のアルミ電極2bとドライバIC3の出力
電極3aとを電気的に接続するワイヤボンドである。Reference numeral 4 is a wire bond that electrically connects the aluminum electrode 2b of the LED array 2 and the output electrode 3a of the driver IC3.
以上のように、LEDアレイ２のアルミ電極2bの配列ピ
ッチP2をLED2aの配列ピッチP0より狭いピッチとしたの
で、配列されたアルミ電極2bの外側にスペースを確保で
きる。このため、LEDアレイ２の面積を拡大することな
く、アルミ電極2b横のスペースに認識マーク５などの位
置基準手段を設けることができるので、ダイシング位置
の誤認識を防止でき、不良品の発生を低く抑えることが
できる。As described above, the array pitch P 2 of the LED array 2 aluminum electrode 2b since the narrower pitch than the arrangement pitch P 0 of the LED 2 a, can secure a space on the outside of the array of aluminum electrodes 2b. Therefore, since the position reference means such as the recognition mark 5 can be provided in the space beside the aluminum electrode 2b without increasing the area of the LED array 2, erroneous recognition of the dicing position can be prevented and defective products can be generated. It can be kept low.
また、LEDアレイ２のアルミ電極2bを狭いピッチP2で
配列し、さらにドライバIC3の出力電極3aを同じピッチP
2で配列し、LEDアレイ２のアルミ電極2bに対向させてい
るので、アルミ電極2bと出力電極3aに接続されるワイヤ
ボンド４は、全て所定のピッチに且つ平行に備えること
ができる。よって、全てのボンディングについて自動化
が容易であり、手動による操作を介入させる必要がない
ので作業能率がよくなり、生産性の向上が図れる。Further, the aluminum electrodes 2b of the LED array 2 are arranged at a narrow pitch P 2 , and the output electrodes 3a of the driver IC 3 are arranged at the same pitch P 2.
Since they are arranged in two and face the aluminum electrodes 2b of the LED array 2, all the wire bonds 4 connected to the aluminum electrodes 2b and the output electrodes 3a can be provided at a predetermined pitch and in parallel. Therefore, automation of all bonding is easy, and it is not necessary to intervene by manual operation, so that work efficiency is improved and productivity can be improved.
また、ワイヤボンド４の長さも一定であり、特に長い
ワイヤボンド４は必要ないので断面や電気的ショートの
おそれは小さい。Further, the length of the wire bond 4 is constant, and the wire bond 4 having a particularly long length is not necessary, so that the risk of a cross section or an electrical short is small.
さらに、ワイヤボンド４は電極2bや3aと同じ方向に延
びているので、ワイヤボンド４の端部が隣接する他の電
極に接触してショートするおそれは小さい。Furthermore, since the wire bond 4 extends in the same direction as the electrodes 2b and 3a, there is little risk that the end of the wire bond 4 will come into contact with another adjacent electrode and cause a short circuit.
さらにまた、LEDアレイ２のアルミ電極2bを狭いピッ
チP2としたので、配列されたアルミ電極2bの外側にスペ
ースを確保できる。このため、LEDアレイ２の面積を拡
大することなく、アルミ電極2b横のスペースに認識マー
ク５を設置できるので、ダイシング位置の誤認識を防止
でき、不良品の発生を低く抑えることができる。Furthermore, since the aluminum electrodes 2b of the LED array 2 have a narrow pitch P 2 , a space can be secured outside the arranged aluminum electrodes 2b. Therefore, since the recognition mark 5 can be installed in the space beside the aluminum electrode 2b without increasing the area of the LED array 2, it is possible to prevent erroneous recognition of the dicing position and suppress the occurrence of defective products.
以上説明したように、本願発明によれば、発光ダイオ
ードアレイチップの入力電極の配列ピッチを発光ダイオ
ードの配列ピッチより狭いピッチで配列したことによっ
て、発光ダイオードアレイチップの電極の横にスペース
を確保でき、電極の横のスペースに位置基準手段を設置
する等して発光ダイオードアレイチップを基板上に備え
付ける時の位置ずれを防止できるので、製造歩留り向上
を図ることができる。As described above, according to the present invention, the arrangement pitch of the input electrodes of the light emitting diode array chip is arranged to be narrower than the arrangement pitch of the light emitting diodes, so that a space can be secured beside the electrodes of the light emitting diode array chip. Since it is possible to prevent the positional deviation when the light emitting diode array chip is mounted on the substrate by installing the position reference means in the space beside the electrode, it is possible to improve the manufacturing yield.
第１図は本発明に係るLEDプリントヘッドの平面図、 第２図は従来のLEDアレイプリントヘッドを示す平面図
である。 １……基板、２……LEDアレイ、2a……LED、2b……アル
ミ電極、３……ドライバIC、3a……出力電極、４……ワ
イヤボンド、５……認識マーク。FIG. 1 is a plan view of an LED print head according to the present invention, and FIG. 2 is a plan view showing a conventional LED array print head. 1 ... Substrate, 2 ... LED array, 2a ... LED, 2b ... Aluminum electrode, 3 ... Driver IC, 3a ... Output electrode, 4 ... Wire bond, 5 ... Recognition mark.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 菅野 裕雅 東京都港区虎ノ門１丁目７番12号 沖電 気工業株式会社内 (56)参考文献 特開 昭61−211063（ＪＰ，Ａ) 特開 昭62−219582（ＪＰ，Ａ) 特開 昭60−52068（ＪＰ，Ａ) 実開 昭60−146364（ＪＰ，Ｕ) 実開 平１−127752（ＪＰ，Ｕ) ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Hiromasa Sugano 1-7-12 Toranomon, Minato-ku, Tokyo Oki Denki Kogyo Co., Ltd. (56) Reference JP-A-61-211063 (JP, A) JP SHO 62-219582 (JP, A) JP 60-52068 (JP, A) ACTUAL SHO 60-146364 (JP, U) ACTUAL HEI 1-127752 (JP, U)
Claims (2)
と各発光ダイオードに個々に接続された駆動信号入力用
の複数の入力電極とを有し、上記基板上に列状に配設さ
れた複数の発光ダイオードアレイチップと、 上記基板上に上記発光ダイオードアレイチップに近接し
て配設され且つその出力で上記各入力電極を介し上記各
発光ダイオードの駆動を行う複数の駆動回路チップと を備える発光ダイオードプリントヘッドにおいて、 上記発光ダイオードアレイチップ上の上記複数の発光ダ
イオードのそれぞれに駆動信号を入力する複数の入力電
極は、上記発光ダイオードの配列ピッチより狭いピッチ
で配列されていることを特徴とする発光ダイオードプリ
ントヘッド。1. A substrate, a plurality of light emitting diodes arranged at a predetermined pitch, and a plurality of input electrodes for driving signal input, which are individually connected to the respective light emitting diodes, and are arranged in rows on the substrate. A plurality of light emitting diode array chips arranged, and a plurality of drive circuits arranged on the substrate in the vicinity of the light emitting diode array chips and driving the respective light emitting diodes by the output thereof through the respective input electrodes. And a plurality of input electrodes for inputting drive signals to the plurality of light emitting diodes on the light emitting diode array chip are arranged at a pitch narrower than the arrangement pitch of the light emitting diodes. A light emitting diode print head characterized in that
によって確保された上記基板上のスペースに位置基準手
段を備えたことを特徴とする請求項１記載の発光ダイオ
ードプリントヘッド。2. The light emitting diode printhead according to claim 1, further comprising a position reference means in a space on the substrate secured by narrowing an arrangement pitch of the input electrodes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33181488A JP2542431B2 (en) | 1988-12-28 | 1988-12-28 | Light emitting diode print head |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33181488A JP2542431B2 (en) | 1988-12-28 | 1988-12-28 | Light emitting diode print head |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02175270A JPH02175270A (en) | 1990-07-06 |
| JP2542431B2 true JP2542431B2 (en) | 1996-10-09 |
Family
ID=18247946
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP33181488A Expired - Lifetime JP2542431B2 (en) | 1988-12-28 | 1988-12-28 | Light emitting diode print head |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2542431B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2546681Y2 (en) * | 1991-03-30 | 1997-09-03 | 京セラ株式会社 | Image head |
| JP4843307B2 (en) * | 2005-12-22 | 2011-12-21 | 京セラ株式会社 | Light emitting device and image forming apparatus |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60146364U (en) * | 1984-03-09 | 1985-09-28 | 三菱電機株式会社 | light emitting diode array head |
| JPS61211063A (en) * | 1985-03-15 | 1986-09-19 | Kyocera Corp | Optical printing head |
| JPS62219582A (en) * | 1986-03-19 | 1987-09-26 | Kyocera Corp | Photo printer head |
-
1988
- 1988-12-28 JP JP33181488A patent/JP2542431B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH02175270A (en) | 1990-07-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0644642B2 (en) | Method for manufacturing light emitting diode array head | |
| KR100740444B1 (en) | Light-emitting thyristor matrix array and driver circuit | |
| JP2542431B2 (en) | Light emitting diode print head | |
| US6433367B1 (en) | Semiconductor device with sloping sides, and electronic apparatus including semiconductor devices with sloping sides, modified for crack-free wire bonding | |
| JP2000289250A (en) | Led array chip and led array print head | |
| US20030071267A1 (en) | Light-emitting thyristor matrix array | |
| JP2901223B2 (en) | Imaging device | |
| US6485994B1 (en) | Method of arraying self-scanning light-emitting element array chips | |
| JP3485788B2 (en) | Light emitting diode array and optical print head | |
| JPH0694216B2 (en) | Optical print head | |
| JPH06278313A (en) | Image device | |
| KR920016256A (en) | LED Printhead | |
| JPH05330133A (en) | Structure of semiconductor chip used for led array printing head or line type thermal printing head | |
| JP3322576B2 (en) | Optical print head | |
| JPH0787199B2 (en) | Head drive IC and head substrate | |
| KR920000329B1 (en) | Light emitting device array | |
| JPH05190896A (en) | Led array and manufacture thereof | |
| JP3384696B2 (en) | LED print head | |
| JPH10335698A (en) | Semiconductor light emitting device | |
| JPH04313283A (en) | Mounting method of semiconductor device and ic chip | |
| JPH0343263A (en) | Led array | |
| JP2911351B2 (en) | Structure of semiconductor chip for driving in thermal print head | |
| US5243364A (en) | Light-emitting diode print head | |
| JP2579367B2 (en) | Thick film type thermal head and method of manufacturing the same | |
| JPH07266617A (en) | Structure of led array semiconductor chip used in led array printing head |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080725 Year of fee payment: 12 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090725 Year of fee payment: 13 |
|
| EXPY | Cancellation because of completion of term | ||
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090725 Year of fee payment: 13 |