JP2535035Y2 - Surge current bypass device in electronic circuit board - Google Patents

Surge current bypass device in electronic circuit board

Info

Publication number
JP2535035Y2
JP2535035Y2 JP1989102018U JP10201889U JP2535035Y2 JP 2535035 Y2 JP2535035 Y2 JP 2535035Y2 JP 1989102018 U JP1989102018 U JP 1989102018U JP 10201889 U JP10201889 U JP 10201889U JP 2535035 Y2 JP2535035 Y2 JP 2535035Y2
Authority
JP
Japan
Prior art keywords
circuit board
coil
balanced input
balanced
input section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1989102018U
Other languages
Japanese (ja)
Other versions
JPH0341906U (en
Inventor
寛人 駒嶺
隆広 荒川
郁夫 中島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsumi Electric Co Ltd
Original Assignee
Mitsumi Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsumi Electric Co Ltd filed Critical Mitsumi Electric Co Ltd
Priority to JP1989102018U priority Critical patent/JP2535035Y2/en
Publication of JPH0341906U publication Critical patent/JPH0341906U/ja
Application granted granted Critical
Publication of JP2535035Y2 publication Critical patent/JP2535035Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Coils Or Transformers For Communication (AREA)
  • Control Of Voltage And Current In General (AREA)
  • Noise Elimination (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)

Description

【考案の詳細な説明】 [産業上の利用分野] この考案は電子回路基板のサージ電流バイパス装置に
関するものであり、特に電子チユーナ等の平衡不平衡変
成器を設けた電子回路基板に於て、平衡入力部に印加さ
れたサージ電圧によつて回路素子が劣化或は破損するこ
とを防止した電子回路基板に於けるサージ電流バイパス
装置に関するものである。
[Detailed description of the invention] [Industrial application field] This invention relates to a surge current bypass device for an electronic circuit board, and particularly to an electronic circuit board provided with a balun transformer such as an electronic tuner. The present invention relates to a surge current bypass device in an electronic circuit board which prevents a circuit element from being deteriorated or damaged by a surge voltage applied to a balanced input section.

[従来の技術] 従来、300Ωアンテナコネクタ等の平衡入力部を設け
た電子回路基板は平衡不平衡変成器を設け、平衡入力を
不平衡に変換して回路に接続しているが、前記平衡入力
部を通じて印加される静電気等のサージ電流を防止する
ための対策はとられていない。
[Prior Art] Conventionally, an electronic circuit board provided with a balanced input section such as a 300Ω antenna connector is provided with a balanced-unbalanced transformer and converts a balanced input into unbalanced and connected to a circuit. No measures have been taken to prevent surge current such as static electricity applied through the unit.

[考案が解決しようとする課題] 前述した従来の電子回路基板に於て、平衡入力部のコ
ンタクトに人体等が接触し、該人体に帯電した静電気が
印加された場合は、前記平衡入力部は接地されていない
ので平衡入力部近傍の回路パターン上に露出したコンデ
ンサ等の回路素子へ放電する。依って、該回路素子へサ
ージ電流が流れ、性能を劣化させたり破壊する等の悪影
響がある。
[Problem to be Solved by the Invention] In the above-described conventional electronic circuit board, when a human body or the like comes into contact with the contact of the balanced input unit and the charged static electricity is applied to the human body, the balanced input unit is Since it is not grounded, it discharges to circuit elements such as capacitors exposed on the circuit pattern near the balanced input section. Therefore, a surge current flows to the circuit element, which has an adverse effect such as deteriorating or destroying the performance.

そこで、前記平衡入力部と回路素子との放電を防止
し、サージ電流による悪影響を排除して電子回路基板の
信頼性を向上するために解決せられるべき技術的課題が
生じてくるのであり、本考案は該課題を解決することを
目的とする。
Therefore, a technical problem to be solved in order to prevent the discharge of the balanced input section and the circuit element, to eliminate the adverse effect of the surge current, and to improve the reliability of the electronic circuit board arises. The idea is to solve the problem.

[課題を解決するための手段] この考案は上記目的を達成するために提案されたもの
であり、回路基板の一側部に平衡不平衡変成器を設け、
該平衡不平衡変成器の平衡入力部はコイルから成り、該
平衡入力部のコイルから誘導結合にて不平衡回路へ信号
が入力されるように構成された電子回路基板に於て、前
記不平衡回路の回路素子と平衡入力部のコイルとの間に
グランドパターンを配設して放電部を形成し、前記平衡
入力部から空中へ飛翔するサージ電圧を該放電部にて吸
収させるようにした電子回路基板に於けるサージ電流バ
イパス装置を提供せんとするものである。
[Means for Solving the Problems] The present invention has been proposed to achieve the above object, and a balun is provided on one side of a circuit board.
The balanced input section of the balun transformer includes a coil, and the unbalanced circuit is configured such that a signal is input from the coil of the balanced input section to an unbalanced circuit by inductive coupling. An electronic device in which a ground pattern is arranged between a circuit element of a circuit and a coil of a balanced input section to form a discharge section, and a surge voltage flying from the balanced input section to the air is absorbed by the discharge section. It is an object to provide a surge current bypass device in a circuit board.

[作用] この考案は電子回路基板の一側部に設けた平衡不平衡
変成器の平衡入力部のコイルと該コイルに対向する不平
衡回路の回路パターンの回路素子との間にグラウンドパ
ターンを配設して放電部を設けている。従って、前記平
衡入力部にサージ電圧が印加された場合には、電流は平
衡入力部のコイルから近傍の放電部へ放電してシヤーシ
へバイパスされ、基板上の回路素子へサージ電流が流れ
ることはない。
[Operation] In the present invention, a ground pattern is arranged between a coil of a balanced input portion of a balun transformer provided on one side of an electronic circuit board and a circuit element of a circuit pattern of an unbalanced circuit facing the coil. And a discharge section. Therefore, when a surge voltage is applied to the balanced input section, the current is discharged from the coil of the balanced input section to a nearby discharge section, bypassed to the chassis, and the surge current flows to the circuit element on the board. Absent.

[実施例] 以下、この考案の一実施例を別紙添付図面の第1図及
び第2図に従って詳述する。尚、説明の都合上、従来公
知に属する技術事項も同時に説明する。
Embodiment An embodiment of the present invention will be described below in detail with reference to FIGS. 1 and 2 of the accompanying drawings. For convenience of explanation, technical matters belonging to the related art will be described at the same time.

第1図はVHF/UHF放送受信用の電子チユーナ(1)の
平面図であり、該電子チユーナ(1)はシヤーシ(2)
に電子回路基板(3)を内装している。前記シヤーシ
(2)の一側にはIF信号出力や電源入力等のターミナル
(4)(4)…を配設するとともに、前面(図中左)に
UHFアンテナ用の平衡入力部(5)、並びにVHFアンテナ
用の不平衡入力部(6)を突設している。
FIG. 1 is a plan view of an electronic tuner (1) for receiving a VHF / UHF broadcast, the electronic tuner (1) being a chassis (2).
And an electronic circuit board (3). On one side of the chassis (2), terminals (4) (4)... For IF signal output and power input are arranged, and on the front side (left in the figure).
A balanced input section (5) for a UHF antenna and an unbalanced input section (6) for a VHF antenna protrude.

前記平衡入力部(5)の後部にはコンタクト(7)
(7)の後端部を結合するコイル(8)が巻装され、該
コイル(8)と該コイル(8)に対向して電子回路基板
(3)上に配設されたインダクタ素子(9)等から300
Ω平衡入力を75Ω不平衡出力へ変換する平衡不平衡変成
器(10)を形成している。
A contact (7) is provided at the rear of the balanced input section (5).
(7) A coil (8) for connecting the rear end portion is wound, and the coil (8) and the inductor element (9) disposed on the electronic circuit board (3) so as to face the coil (8). ) Etc. from 300
A balanced-unbalanced transformer (10) for converting a Ω balanced input to a 75Ω unbalanced output is formed.

又、電子回路基板(3)は平衡入力部(5)の下方に
配設され、第2図の底面図に示すように、裏面に不平衡
回路の+パターン(11)及びグラウンドパターン(12)
を印刷し、はんだ付け用のランド(13)(13)…を除
き、全面にはんだレジスト(14)を被覆してある。又、
前記グラウンドパターン(12)を基板側縁部に配設し、
シヤーシ(2)の内側面へはんだ(S)にて接地すると
ともに、前記コイル(8)に対向する基板の前縁部に沿
ってグラウンドパターン(12)を延設し、且つ、該延設
部位のはんだレジストを除去して銅箔を露出し、放電部
(15)を形成している。尚、該放電部(15)にははんだ
等を鍍着して銅箔の酸化を防止するを可とする。
The electronic circuit board (3) is disposed below the balanced input section (5), and has a + pattern (11) and a ground pattern (12) of an unbalanced circuit on the back as shown in the bottom view of FIG.
Is printed, and the solder resist (14) is coated on the entire surface except for the lands (13) (13) for soldering. or,
The ground pattern (12) is disposed on the side edge of the substrate,
The inner surface of the chassis (2) is grounded by solder (S), and a ground pattern (12) is extended along the front edge of the substrate facing the coil (8). Then, the solder resist is removed to expose the copper foil to form a discharge part (15). The discharge part (15) may be plated with solder or the like to prevent oxidation of the copper foil.

而して、前記平衡入力部(5)のコンタクト(7)
(7)に例えば人体等が接触し、人体に帯電した静電気
が印加されると、平衡入力部(5)は接地されていない
ので前記静電気はコイル(8)から最も近い放電部(1
5)へ放電し、グラウンドパターン(12)を経てシヤー
シ(2)へバイパスされる。従って、コイル(8)から
不平衡回路のチツプコンデンサ(16)へ放電することは
なく、該チツプコンデンサ(16)等の回路素子が破壊或
は性能が劣化することが防止される。
Thus, the contact (7) of the balanced input section (5)
For example, when a human body or the like comes into contact with (7) and static electricity charged on the human body is applied, the static electricity is applied to the discharge unit (1) closest to the coil (8) because the balanced input unit (5) is not grounded.
Discharge to 5) and bypass to chassis (2) via ground pattern (12). Accordingly, no discharge is caused from the coil (8) to the chip capacitor (16) of the unbalanced circuit, and the circuit elements such as the chip capacitor (16) are prevented from being broken or the performance is deteriorated.

尚、この考案は、この考案の精神を逸脱しない限り種
々の改変を為す事ができ、そして、この考案が該改変せ
られたものに及ぶことは当然である。
The present invention can be variously modified without departing from the spirit of the present invention, and it is natural that the present invention extends to the modified one.

[考案の効果] 本考案は、平衡入力部のコイルから誘導結合によって
回路基板に設けられている不平衡回路へ信号が入力する
とき、該平衡入力部のコイルと不平衡回路との間にグラ
ンドパターンが配設されており、且つ、該グランドパタ
ーンに前記平衡入力部のコイルから空中へ飛翔するサー
ジ電圧を吸収させるための放電部が設けられているの
で、該平衡入力部のコイルから空中に飛翔するサージ電
圧は該放電部へ放電してシャーシへバイパスされること
になり、依って、回路基板上に搭載されている不平衡回
路の回路素子へ前記サージ電圧が印加されることはなく
なり、従って、コンデンサ等の回路素子が劣化したり、
或いは破壊されるようなことはなくなる。
[Effects of the Invention] The present invention is designed such that when a signal is input from a coil of a balanced input section to an unbalanced circuit provided on a circuit board by inductive coupling, a ground is provided between the coil of the balanced input section and the unbalanced circuit. A pattern is provided, and a discharge unit for absorbing a surge voltage flying from the coil of the balanced input unit to the air is provided on the ground pattern. The flying surge voltage is discharged to the discharge portion and bypassed to the chassis, so that the surge voltage is not applied to the circuit element of the unbalanced circuit mounted on the circuit board, Therefore, circuit elements such as capacitors may deteriorate,
Or it will not be destroyed.

即ち、平衡入力部のコイルから誘導結合によって平衡
不平衡変成器へ信号が入力されるとき、コイルから空中
へ飛翔するサージ電圧は回路基板上の回路素子へ流れる
ことはなくなり、該サージ電圧による種々の弊害を未然
に防止することができることになる。
That is, when a signal is input from the coil of the balanced input section to the balun transformer by inductive coupling, the surge voltage flying from the coil to the air does not flow to the circuit elements on the circuit board, and various voltages due to the surge voltage are generated. Can be prevented beforehand.

【図面の簡単な説明】[Brief description of the drawings]

図は本考案の一実施例を示し、第1図は電子チユーナの
一部切欠平面図、第2図は同一部切欠底面図である。 (3)……電子回路基板、(5)……平衡入力部 (8)……コイル (10)……平衡不平衡変成器 (11)……+パターン (12)……グラウンドパターン (15)……放電部 (16)……チツプコンデンサ
FIG. 1 shows an embodiment of the present invention, FIG. 1 is a partially cutaway plan view of an electronic tuner, and FIG. 2 is a cutaway bottom view of the same part. (3) ... electronic circuit board, (5) ... balanced input section (8) ... coil (10) ... balanced unbalanced transformer (11) ... + pattern (12) ... ground pattern (15) …… Discharge part (16) …… Chip capacitor

フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H04B 1/18 H04N 5/44 K H04N 5/44 7/16 A 7/16 H01L 23/56 C (56)参考文献 実開 昭64−37340(JP,U) 実開 昭63−7936(JP,U) 実開 昭55−131086(JP,U)Continuation of the front page (51) Int.Cl. 6 Identification code Agency reference number FI Technical display location H04B 1/18 H04N 5/44 K H04N 5/44 7/16 A 7/16 H01L 23/56 C (56) References Japanese Utility Model Sho-64-37340 (JP, U) Japanese Utility Model Sho-63-7936 (JP, U) Japanese Utility Model Sho-55-131086 (JP, U)

Claims (1)

(57)【実用新案登録請求の範囲】(57) [Scope of request for utility model registration] 【請求項1】回路基板の一側部に平衡不平衡変成器を設
け、該平衡不平衡変成器の平衡入力部はコイルから成
り、該平衡入力部のコイルから誘導結合にて不平衡回路
へ信号が入力されるように構成された電子回路基板に於
て、前記不平衡回路の回路素子と平衡入力部のコイルと
の間にグランドパターンを配設して放電部を形成し、前
記平衡入力部から空中へ飛翔するサージ電圧を該放電部
にて吸収させるようにしたことを特徴とする電子回路基
板に於けるサージ電流バイパス装置。
1. A balanced-unbalanced transformer is provided on one side of a circuit board, and a balanced input section of the balanced-unbalanced transformer comprises a coil, and the coil of the balanced input section is inductively coupled to an unbalanced circuit. In an electronic circuit board configured to receive a signal, a ground pattern is provided between a circuit element of the unbalanced circuit and a coil of a balanced input section to form a discharge section, and the balanced input A surge current bypass device in an electronic circuit board, wherein a surge voltage flying from a portion to the air is absorbed by the discharge portion.
JP1989102018U 1989-08-31 1989-08-31 Surge current bypass device in electronic circuit board Expired - Lifetime JP2535035Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989102018U JP2535035Y2 (en) 1989-08-31 1989-08-31 Surge current bypass device in electronic circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989102018U JP2535035Y2 (en) 1989-08-31 1989-08-31 Surge current bypass device in electronic circuit board

Publications (2)

Publication Number Publication Date
JPH0341906U JPH0341906U (en) 1991-04-22
JP2535035Y2 true JP2535035Y2 (en) 1997-05-07

Family

ID=31650938

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989102018U Expired - Lifetime JP2535035Y2 (en) 1989-08-31 1989-08-31 Surge current bypass device in electronic circuit board

Country Status (1)

Country Link
JP (1) JP2535035Y2 (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55131086U (en) * 1979-03-10 1980-09-17
JPS637936U (en) * 1986-07-01 1988-01-19
JPS6437340U (en) * 1987-08-27 1989-03-07

Also Published As

Publication number Publication date
JPH0341906U (en) 1991-04-22

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