JP2526474B2 - Automatic gain control circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic gain control circuit for automatically adjusting a gain to a constant value.

[0002]

2. Description of the Related Art An automatic gain control circuit for automatically controlling the gain (amplification factor) of a signal to be constant is widely used in various circuits.

FIG. 4 shows an example of such a conventional automatic gain control circuit. Input terminal 11 of this circuit
Is connected to the (+) input terminal of the operational amplifier 12 for amplifying the signal input thereto. The (−) input terminal of the operational amplifier 12 is grounded via the resistance attenuator 13. Further, one end of the other resistance attenuator 14 is connected to the end of the resistance attenuator 13 that is not on the ground side, and the other end is connected to the output terminal 15. The output terminal 15 is connected to the output side of the operational amplifier 12 and is also connected to the base B of the transistor 16.

The emitter E of the transistor 16 is grounded, and the collector C is connected to one end of a light emitting diode in the CdS type photocoupler 17. The other end of the light emitting diode is connected to a power source (+ V) and emits light according to the collector current.
A resistance component whose resistance value changes according to the amount of light of the light emitting diode is incorporated in the photocoupler 17, and the resistance component is connected in parallel to the resistance attenuator 14.

In such a conventional automatic gain control circuit,
When the input voltage applied to the input terminal 11 increases, the voltage on the output side of the operational amplifier 12 tends to increase. Due to this, the change in the base voltage of the transistor 16 also increases the collector current. As a result, the resistance value of the resistance component in the photocoupler 17 decreases, and the output voltage is kept constant.

[0006]

In this conventional automatic gain control circuit, the current-resistance value characteristic of the CdS type photocoupler 17 is not linear. Therefore, there is a problem that the operation range of the automatic gain control is limited.

Therefore, a proposal has been made to make the operating range of automatic gain control wider (Japanese Patent Laid-Open No. 62-2).
0408).

FIG. 5 shows the structure of the proposed automatic gain control circuit.
It represents the success. In this circuit, the input terminal 21
The signal input to the transistor amplifier 22₁Amplified by
Variable attenuator 23 using pin diode₂Attenuated at
Let Repeat this for a predetermined number of stages with the final amplifier 24
So that the signal after amplification is output from the output terminal 25
Has become. At this time, part of the output signal is a detector
After being detected at 26, it is input to the DC amplifier 27,
Voltage V_SCompared to. And this difference becomes the minimum
Output voltage of the DC amplifier 27, that is, the control voltage
Variable attenuator 23 ₁, 23₂Attenuation amount is controlled
You.

According to the proposed automatic gain control circuit, since the operating level range of each of the transistor amplifiers 22 ₁ , 22 ₂ , ... Is limited, these transistor amplifiers 22 ₁ are required to satisfy sufficient linearity. , 22 ₂ , ......
Need to have a multi-stage configuration.

Further, in Japanese Patent Laid-Open No. 2-116208, a fixed attenuator with a switch for inserting or passing a fixed attenuator is provided in front of the preamplifier, and the gain of the preamplifier is made variable. An automatic gain control circuit is proposed. This proposal has a problem that the width of attenuation is narrow because there is only one fixed attenuator.

Japanese Patent Laid-Open No. 62-23629 discloses a circuit using a variable attenuator that electronically attenuates an input level. In this circuit, a control signal for keeping the amount of attenuation constant is created.
However, in this circuit, the amount of attenuation is suppressed to a constant level when the input level drops below a predetermined level, so it is not possible to have a circuit configuration that performs ideal automatic gain control.

Therefore, an object of the present invention is to use an attenuator,
Another object of the present invention is to provide an automatic gain control circuit capable of setting the operating range of automatic gain control in a wide range without using an amplifier having a multi-stage configuration.

[0013]

The [Summary of invention of claim 1 wherein, (a) to input electrical signals, along with maintaining a constant level of the output signal within a certain limited input level, before
If the electrical signal is lower than the input level, the output signal
The level is lower than the output level corresponding to the input level.
Is lower than the first level and higher than the input level
In the case of an electric signal, the level of the output signal is the input level
Above the second level, which is higher than the output level corresponding to
That the automatic gain control means, (b) the automatic gain control means for controlling the automatic gain control after the output voltage has the first level
Detects less than or equal to or above second level
Output voltage detecting means, and (c) input side of the electric signal
And the automatic gain control means, and between these
Adjustable variable number of resistance attenuators connected in series
The attenuator and (d) the output voltage detector are automatically controlled by gain.
If the output voltage after the operation is below the first level,
When it is detected, the variable reduction is performed until this detection is not performed.
The number of resistance attenuators connected to
On the other hand, when it is detected that it is above the second level,
Is connected to the variable reduction means until this detection is no longer
Variable damping means for sequentially increasing the number of said resistive attenuators
And a control means in the automatic gain control circuit.

That is, according to the first aspect of the invention, electricity is used.
Input a signal and output within a limited input level range.
Keep the input signal level constant and
If the electrical signal is lower than the
First level lower than output level corresponding to force level
If the electrical signal is higher than the input level below
The output whose output signal level corresponds to the input level
Output characteristics that are higher than the second level and higher than the level
The automatic gain control means of
The range of input level that can keep the level of
Try to cover a wider range. For this reason,
The force voltage detection means is an automatic gain controlled by the automatic gain control means.
Is the output voltage after control below the first level?
Or the second level or higher is detected, and the first level is detected.
If the following is detected, this detection will not be performed.
Order the number of resistive attenuators connected to the variable reduction means until
Next, decrease the voltage applied to the automatic gain control means to a low level.
Let me down. In addition, in the case that it is above the second level
Connected to a variable reduction means until this detection is no longer
Automatic gain control by increasing the number of resistance attenuators
Increase the voltage applied to the means. In this way
Existing automatic gain control method works well over a wide range of input levels
Trying to work.

[0015]

[0016]

[0017]

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to embodiments.

FIG. 1 shows a circuit configuration of an automatic gain control circuit according to an embodiment of the present invention. In this circuit, a conventional automatic gain control (AGC) circuit 32 is arranged immediately before the output terminal 31, and the AGC circuit 32 is used.
Input side and the input terminal 33 of the automatic gain control circuit of the present embodiment.
An attenuation amount setting circuit 34 for setting the attenuation amount stepwise is arranged between the two. Further, the signal level output to the output terminal 31 is input to the output voltage detection circuit 36 to detect the output voltage. The output voltage thus detected is input to the relay selection circuit 37 arranged at the subsequent stage of the output voltage detection circuit 36, and the first to fourth latch relays 38 _{1 to} 38 ₄ are selected. There is.

The output voltage detection circuit 36 is provided with first and second comparators 41 ₁ and 41 ₂ for inputting the voltage appearing at the output terminal 31 to its (-) input terminal or (+) input terminal. There is. Output voltage detection circuit 36
Has a resistance circuit in which three resistors 42 to 44 are connected in series, one end of which is grounded and the other end of which is voltage + V.
Connected to a power supply line (not shown). As a result, a relatively high reference voltage V _H and a relatively low reference voltage V _L can be obtained at the connection points of the resistors of this resistance circuit.

One reference voltage V _H is input to the (+) input terminal of the first comparator 41 ₁ and compared with the voltage appearing at the output terminal 31. The result of this comparison is output to the set line 45 as a set signal. The other reference voltage V _L is input to the (−) input terminal of the second comparator 41 ₂ and is compared with the voltage appearing at the output terminal 31. The comparison result is output to the reset line 46 as a reset signal.

[0022] Now, another is set line 45 which is directly connected to the set terminal for setting a first latching relay 38 _1, a first contact 51 of the first latching relay 38 _{1 1}
It is directly connected to the set terminal of the second latch relay 38 ₂ via. Further, the second set terminal of the latch relay 38 _2, the second latching relay 38 ₂ first contact 5
It is directly connected to the third set terminal of the latch relay 38 ₃ via the 2 _1. In addition, this third latch relay 38 ₃
Of the third latch relay 38 ₃ is directly connected to the set terminal of the _fourth latch relay 38 ₄ via the first contact 53 ₁ of the third latch relay 38 ₃ .

[0023] Another is reset line 46 which is directly connected to the reset terminal of the second latch relay 38 _4, fourth third via the second contact ₅₄₂ of the latching relay 38 ₄ of latching relay 38 ₃ It is directly connected to the reset terminal of. Reset terminal of the third latch relay 38 ₃ is directly connected through the third second contact 53 _second latching relay 38 ₃ to the second reset terminal of the latching relay 38 _2. The second reset terminal of the latch relay 38 _2, the second latching relay 38 ₂ second contact 52
It is directly connected to the reset terminal of the _first latch relay 38 ₁ via ₂ . These first to fourth latch relays are connected to a power source (+ V) for exciting them.

Next, the circuit configuration of the attenuation amount setting circuit 34 will be described. The attenuation amount setting circuit 34 includes first to fourth resistance attenuators 55 _{1 to} 554 and _four connection lines 56 corresponding to these.
_{1-56 4} is disposed. The input terminal 33 is adapted to select the input end of the first resistance attenuator 55 ₁ or the first connecting line 56 ₁ via the third contact 51 ₃ of the first latch relay 38 ₁ . These output terminals have a first latch relay 38 for selecting one of them.
₁ of the fourth and the contacts 51 ₄ are disposed, the selected signal is the second resistor attenuator 55 ₂ or the second connecting line via a second third contact 51 ₃ latch relay 38 ₂ 56
It is designed to select one of the ₂ input terminals.

[0025] Similarly, the second resistor attenuator 55 ₂ and the second connecting line 56 _{and second} output terminal, the fourth contact of the second latching relay 38 ₂ for selecting one of these 5
2 ₄ is arranged, and the selected signal is transmitted to the third resistance attenuator 55 ₃ or the input terminal of the _third connecting line 56 ₃ via the third contact 53 ₃ of the third latch relay 38 ₃ . You are supposed to choose one. The output terminals of the third resistance attenuator 55 ₃ and the third connection line 56 _{3 have} a third latch relay 3 for selecting one of them.
8 ₃ 4th contact 53 ₄ is arranged, and the selected signal is connected to the 4th resistance attenuator 55 ₄ or the 4th connection via the 3rd contact 54 ₃ of the _4th latch relay 38 ₄ . Line 5
It is adapted to select one of the 6 ₄ input terminals.

_On the output side of the fourth resistance attenuator 55 ₄ and the fourth connecting line 56 ₄ is arranged the fourth contact 54 ₄ of the fourth latch relay 38 ₄ for connecting either of them. The signal selected thereby is supplied to the input side of the AGC circuit 32.

FIG. 2 is a state transition diagram showing respective operating states of the first to fourth latch relays in the automatic gain control circuit configured as described above. 3 shows the input / output characteristics of the conventional AGC circuit shown in FIG. The automatic gain control circuit shown in FIG. 1 will be specifically described with reference to these drawings.

In FIG. 3, the AGC operation range in the conventional AGC circuit 32 is indicated by an arrow. When the signal 61 on the input side of the AGC circuit 32 is too large and goes out of the operating range, the set signal appearing on the set line 45 of the output voltage detection circuit 36 becomes L (low) level. On the contrary, when the signal 61 on the input side of the AGC circuit 32 is too small to be out of the AGC operating range, the reset line 4
The reset signal appearing at 6 becomes L (low) level.

First, the case where the input signal 61 is too large will be described. In this case, the first to fourth latch relays 38
_{1-38 4,} the first latching relay 38 each time the L level of the set signal (SET) inputs, as shown in FIG. 2
_It turns on in order from ₁ to the fourth latch relay 38 ₄ . At this time, for example, when the first latch relay 38 ₁ is turned on, the first resistance attenuator 55 ₁ is turned on as shown in FIG. As described above, when the first latch relay 38 _{1 is} turned on in order toward the _fourth latch relay 38 ₄ , the first to fourth resistance attenuators 55 _{1 to} 55 are turned on.
₄ is sequentially set as the attenuation amount in the attenuation amount setting circuit 34.

That is, the first to fourth latch relays 38
_{1-38 4} is, as expressed in the state transition diagram shown in FIG. 2, to connect the next latching relay 38 each time it is turned on at the junction, a sequence such as to set ready (SET READY) state ing. Resistor attenuator 55 _1-5
5 ₄ even if the level of the input signal 62 that is input to the input terminal 33 is increased by is inserted in order, conventional A
Since the signal level of the input signal 61 of the GC circuit 32 is kept within the operating range of the automatic gain control, the signal level of the output signal 63 appearing at the output terminal 31 is kept constant.

Next, the case where the input side signal 61 to the AGC circuit 32 ₂ is too small will be described. In this case, the L-level reset signal appearing on the reset line 46 electrically removes the _first to fourth resistive attenuators 55 _{1 to} 55 ₄ . As a result, the level of the output signal 63 appearing at the output terminal 31 is kept constant.

As described above, according to the present invention, the conventional automatic gain control circuit is used as it is and the resistance is
By adding a predetermined circuit such as an attenuator, the control range of automatic gain can be sufficiently widened. Moreover, since the control range can be adjusted in a wide range by adjusting the number of resistance attenuators, there is an advantage that the circuit configuration can be easily changed according to the purpose.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a circuit configuration of an automatic gain control circuit according to an embodiment of the present invention.

FIG. 2 is a state transition diagram showing respective operating states of first to fourth latch relays.

FIG. 3 is a characteristic diagram showing input / output characteristics of the conventional AGC circuit shown in FIG.

FIG. 4 is a circuit diagram showing an example of a conventional automatic gain control circuit.

FIG. 5 is a circuit diagram showing a configuration of a conventionally proposed automatic gain control circuit.

[Explanation of symbols]

31 output terminal 32 (conventional) AGC circuit 33 input terminal 34 attenuation amount setting circuit 36 output voltage detection circuit 37 relay selection circuit 38 _{1 to} 38 ₄ first to fourth latch relays 41 ₁ and 41 ₂ comparator 45 set line 46 Reset line 55 _{1 to} 55 ₄ 1st to 4th resistance attenuators

Claims (3)

(57) [Claims] We claim: 1. Enter the electrical signal, co and maintain a constant level of the output signal within a certain limited input level
In case of an electric signal lower than the input level, output
The signal level is higher than the output level corresponding to the input level.
Is lower than the first level, which is much lower than the input level.
In case of high electric signal, the level of output signal is
After the second level, which is higher than the output level corresponding to the level
The above automatic gain control means, and the output voltage after the automatic gain control controlled by the automatic gain control means is below the first level or the second level.
An output voltage detecting means for detecting whether the voltage is equal to or more than a bell, and an output voltage detecting means arranged between the input side of the electric signal and the automatic gain control means
Number of resistive attenuators placed in series between them
And variable attenuation means which enables adjusting the output voltage after the output voltage detecting means automatic gain control Nitsu
And when it is detected that the level is below the first level,
Is connected to the variable reduction means until the detection of
While decreasing the number of the resistance attenuators sequentially, the second
If it is detected as being above the level, this detection will be performed.
Said resistive attenuator connected to a variable reduction means until run out
And a variable attenuating means controlling means for sequentially increasing the number of the automatic gain controlling circuits. 2. An automatic gain control means for inputting an electric signal to keep a level of an output signal constant within a limited input level range, and an output after the automatic gain control controlled by the automatic gain control means. A set signal / reset signal generating means for comparing the voltage with two predetermined reference voltages and outputting a set signal when the voltage is too large, and a reset signal when the voltage is too small, and a plurality of resistance attenuators, Each time a signal is output, these are connected in series in sequence, and each time the reset signal is output, these are sequentially excluded from the series circuit, and a signal to be subject to automatic gain control is input to the input terminal of this series circuit. An automatic gain control circuit comprising: a variable attenuator for inputting and outputting the electric signal to be supplied to the automatic gain control means from an output end. 3. The set signal / reset signal generating means comprises:
3. The automatic gain control circuit according to claim 2, further comprising a plurality of latch relays that latch each time a set signal is output and release the latch each time a reset signal is output.