JP2526148B2 - Signal converter - Google Patents

Description

The present invention relates to a signal converter for converting a signal.

More specifically, the present invention has, in parallel, two selectors that receive the converted signal and the reference signal for calibration and outputs either of them, and a converter that converts the output from the selector. When the converter is calibrating the zero point of the other converter while converting the signal to be converted and the calibration of one converter is completed and the calibration of the other converter is started next, The converter also converts the signal to be converted and gradually changes the combining ratio of the combiner so that the conversion output signal is continuously switched.

Especially when the phase characteristics of the two converters do not match,
The phase of the output signal becomes discontinuous when the output signal is switched using the selector, but according to the present invention, the phase change of the combiner output signal can be made continuous, so that instantaneous phase jitter becomes a problem. It is effective for applications such as.

In the following description, application to an FSK demodulator will be described as an example.

[Conventional technology]

As is well known, the frequency modulation (FSK) method is a method of transmitting changes in the amplitude of the signal to be transmitted in correspondence with changes in the frequency of the carrier wave, and is used as a means for transmitting digital data to remote locations. Has been converted. There are a quadrature detection method, a PLL detection method, a pulse count detection method, etc. as a detection method for receiving a frequency-modulated signal and detecting the modulated wave. However, in the demodulator using these detection methods, the zero point of the demodulation output changes due to changes in the ambient temperature, etc., and the digital signal from the demodulation output is inaccurately identified. A frequency-modulated signal demodulator as shown in FIG. 6 has been proposed as a means for calibrating the fluctuation of the zero point (Japanese Patent Laid-Open No. 62-232204).

This demodulator includes an oscillator 80 that generates a reference signal, a first selector 1 that alternately selects and outputs a frequency-modulated signal and a reference signal at a constant cycle, and a frequency that is shifted by about a half cycle from the first selector 1. A second selector 2 that alternately selects and outputs a modulation signal and a reference signal, and a first FM demodulator that demodulates the frequency signal output from the first selector 1 into a voltage signal.
31, a second FM demodulator 41 that demodulates the frequency signal output from the second selector 2 into a voltage signal, and a first FM demodulator
A first sample-hold circuit 75 that samples and holds a portion of the voltage signal output from 31 corresponding to the fundamental frequency signal and outputs the voltage as a reference value;
A second sample-and-hold circuit 76 for sample-holding a portion of the voltage signal output from the FM demodulator 41 corresponding to the reference frequency signal and outputting the voltage as a reference value.
And a result of subtracting the output signal of the first sample and hold circuit 75 from the output signal of the first FM demodulator 31.
Subtractor 77, a second subtractor 78 that outputs the result of subtracting the output signal of the second sample and hold circuit 76 from the output signal of the second FM demodulator 41, the first subtractor 77 and the Data selector 79 which alternately selects and outputs a portion corresponding to the frequency modulation signal included in the signal output by the second subtractor 78
And a control circuit 81 for controlling the first and second selectors 1 and 2, the first and second sample and hold circuits 75 and 76, and the data selector 79.

While the second FM demodulator 41 receives the reference frequency signal and the second sample-and-hold circuit 76 is sampling the zero-point fluctuation of the second FM demodulator 41, the first FM demodulator 31 is It receives the frequency modulation signal selected by the selector 1 and outputs a voltage signal corresponding to the frequency modulation signal. First FM demodulator
The output of 31 is subtracted by the zero subtraction amount of the first FM demodulator 31 by the first subtractor 77, and then output as an output signal of the demodulator via the data selector 79.

After a lapse of a fixed time, the second sample hold circuit 76 holds the zero point fluctuation of the second FM demodulator 41, and the second selector 2 selects the frequency modulation signal. Second FM demodulator 41
Receives the frequency modulation signal selected by the second selector 2 and starts outputting the voltage signal corresponding to the frequency modulation signal.

When the output of the second FM demodulator 41 becomes stable, the data selector 79 selects the output of the second subtractor 78,
The voltage signal from which the zero point variation of the second FM demodulator 41 is subtracted by 78 is output as the output signal of the demodulator.

Next, the first selector 1 selects the reference frequency signal, and the first sample hold circuit 75 shifts to sampling of the zero point fluctuation of the first FM demodulator 31.

As described above, in the demodulator shown in FIG. 6, the frequency modulation signal and the reference frequency signal are temporally shifted and two FMs are alternately arranged.
Input to the demodulator, calibrate the zero point fluctuation of the demodulator on the side where the reference frequency signal is input, select the output of the demodulator on the side where the frequency modulation signal is input, and output it. It realizes the suppression of zero fluctuation of.

[Problems to be Solved by the Invention]

However, the demodulator described above uses the first subtractor 77
Output of the second subtracter 78 and the output of the second subtractor 78 are switched by the data selector 79.
If the amplitude and phase of the output signal of the subtracter 77 and the output signal of the second subtractor 78 do not match, the phase of the demodulated output signal becomes discontinuous. The fact that the phase of the demodulation output signal changes in synchronism with the switching of the data selector 79 is similar to the case where instantaneous phase jitter is mixed in the demodulation output signal. There is a drawback that a sampling point shifts when identifying the.

[Means for solving the problem]

The present invention has the function of calibrating the fluctuation of the zero point generated in the conversion process of the converted signal in order to solve the above-mentioned drawbacks, and in order to make the phase of the converted output signal continuous, The present invention provides a signal converter that gradually changes the ratio when combining converted signals that are outputs from two converters. An FM demodulator, that is, a frequency / voltage converter will be taken as an example of the converter.

The present invention includes two selectors that input a frequency-modulated signal as a signal to be converted and a reference signal for calibrating an FM demodulator as a converter and output either of them, and two selectors in the latter stage of the selector. It has an FM demodulator and a combiner that receives the output of the demodulated signals from the two FM demodulators and combines the two outputs. The FM demodulator calibrates the zero points alternately, and gradually changes the ratio when combining the two demodulated signals so that the phase of the demodulated output signal is continuous. Control the vessel. As described above, according to the present invention, the output from one FM demodulator and the FM for which the calibration is completed
The ratio when the output of the demodulator is combined is sequentially changed. Next, the combining method will be described.

The synthesizer consists of two multiplication D / A converters and their two multiplication Ds.
The output of the FM demodulator and the digital signal from the control unit are received and multiplied by Output the result as an analog value. By continuously changing the value of the digital signal from 0 to a certain value, the output from one multiplication type D / A converter gradually increases or decreases, and the output from the other multiplication type D / A converter increases. Output gradually decreases or increases.

〔Example〕

 Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram showing the configuration of an embodiment of the present invention, and FIG.
FIG. 5 is a block diagram of a frequency modulation signal demodulation device for inputting and demodulating an FM signal, FIG. 3 is an explanatory diagram of an internal configuration of the synthesizer 5, and FIG. 4 is a diagram showing a mode of switching of demodulation output signals, FIG. 3 is a timing chart of the operation of the frequency modulation signal demodulation device.

In FIG. 2, on the input side, a frequency-modulated signal I f0 as a signal to be converted and a first selector 1 for selecting one of two types of FM signals of a reference signal I f1 and a first selector 1
A second selector 2 having exactly the same configuration as the above is provided.
The first and second selectors 1 and 2 select and output the input frequency-modulated signal I f0 when the digital values of select signals a and b applied from the control device 6 described later are at a low level, When the level is set, the reference signal I f1 is selected and output, and the frequency f1 of the reference signal I f1 is set equal to the center frequency of the frequency-modulated signal I f0 to be demodulated, that is, the frequency in the non-modulation.
For example, when the center frequency of the frequency modulation signal is 500 kHz, the frequency f1 of the reference signal I f1 is 500 kHz.

The output side of the first selector 1 has a first
The FM demodulator 31 is connected. The first FM demodulator 31 is, for example, a demodulator based on a pulse counting method, and is a control device 6 described later.
The zero point of the demodulator output can be adjusted (meaning that the offset voltage is zero. The same applies hereinafter) by the first offset adjustment signal c applied from the. A second FM demodulator 41 having a similar structure is also connected to the output side of the second selector 2, and the demodulator output of the second FM demodulator 41 is controlled by a second offset adjustment signal d applied from the control device 6 described later. Zero adjustment is performed.

Further, the output sides of the first FM demodulator 31 and the second FM demodulator 41 are connected to the control device 6 described later in order to calibrate the zero point of the output from this demodulator.

The output sides of the first FM demodulator 31 and the second FM demodulator 41 are connected to the combiner 5, respectively. The synthesizer 5 includes, for example, as shown in FIG. 3, a first multiplication type D / A converter 51, a second multiplication type D / A converter 52, and two multiplication type D / A conversions. It is composed of an adder 53 for adding and outputting the output of the container.

The first and second multiplication type D / A converters 51 and 52 output the result obtained by multiplying the analog signal input value and the 12-bit digital signal input value as an analog value. 1 multiplication type D / A converter 51 is Vout1 = Vin1 × Din / 40
And the second multiplication type D / A converter 52 outputs Vout2 =
The calculation is Vin2 × (4095−Din) / 4095.
The analog input Vin1 of the first multiplication D / A converter 51 has a first
The output of the FM demodulator 31 is connected, and the output of the second FM demodulator 41 is connected to the analog input Vin2 of the second multiplication D / A converter 52. In addition, the first and second multiplication type D / A converters 5
The 12-bit synthesis ratio control signal g from the control device 6 is connected to the digital inputs Din of 1 and 52. The digital value of the composite ratio control signal g is changed from 4095 to 0, or 0 to 40.
By continuously changing to 95, the output value of the combiner 5 changes from the output value Vout1 of the first FM demodulator 31 to the second FM demodulator 4
To the output value Vout2 of 1 or the output value Vo of the second FM demodulator 41
It is possible to continuously and smoothly change from ut2 to the output value Vout1 of the first FM demodulator 31 (see FIG. 4).

The control device 6 generates the first select signal a and the second select signal b composite ratio control signal g as described above at a predetermined timing, and, as described above, the first FM signal.
Output signal e of demodulator 31 and output signal f of second FM demodulator 41
In response, the first offset adjustment signal c and the second offset adjustment signal d are used to adjust the zero points of the first and second FM demodulators for calibration.

Next, a description will be given with reference to a timing chart (FIG. 5) of the operation of the frequency-modulated signal demodulation device having the above-described configuration.

This device has cycles c1, c2,
The operation consisting of four cycles of c3 and c4 is repeated. In cycle c1, the zero point correction of the first FM demodulator 31 is performed, and in cycle c2, the output signal of the combiner 5 is set to the second value.
The output signal f of the FM demodulator 41 is smoothly switched to the output signal e of the first FM demodulator 31, and in the cycle c3, the second FM
The zero point of the demodulator 41 is corrected, and in the cycle c4, the output signal of the synthesizer 5 is changed from the output signal e of the first FM demodulator 31 to the second signal.
The output signal f of the FM demodulator 41 is switched smoothly.

The operation of the present apparatus will be described below in order from time T ₀ .

At time T ₀ , the first and second select signals a and b are at low level, and the frequency modulation signal I f0 is input to the first and second FM demodulators 31 and 41. At this time, the synthesis ratio α of the output signal e of the first FM demodulator 31 determined by the synthesis ratio control signal g is 0%, and the frequency modulation signal I f0 is output from the synthesizer 5.
Output signal f of the second FM demodulator 41 as a result of demodulating
Is output.

The cycle c1 starts from time T ₁ and the first selector 1
The first select signal a applied to the signal becomes high level.
As a result, the first selector 1 outputs the reference signal I f1 and the first FM demodulator 31 starts outputting the demodulated signal corresponding to the reference signal I f1. Output signal e of the first FM demodulator 31
After the time T _{2 when} the output signal e of the first FM demodulator 31 becomes 0V, the control device 6 controls the first offset adjustment signal c to become 0V.
Is output. From time T ₃ , the value of the first offset adjustment signal c is held by the controller 6 and the first FM demodulator 31
Calibration of is completed. On the other hand, in the cycle c1, the second select signal b is at a low level, and the synthesis ratio α of the output signal e of the first FM demodulator 31 is 0%. Therefore, the frequency modulation signal I f0 is output from the synthesizer 5. Is demodulated by the second FM demodulator 41 and output.

From time T ₄ to time T ₇ is the cycle c2, the first select signal a at time T ₄ becomes low level, frequency-modulated signal I f0 is output from the first selector 1. As a result, the first FM demodulator 31 starts outputting a demodulation signal corresponding to the frequency modulation signal I f0. On the other hand, in the cycle c2, since the second select signal b is at the low level as in the cycle c1, the second FM demodulator 41 outputs the demodulation signal corresponding to the frequency modulation signal I f0. From the time T ₅ when the output signal e of the first FM demodulator 31 stabilizes to the time T ₆ , the control device 6 increases the synthesis ratio control signal g, and the first FM
The synthesis ratio α of the output signal e of the demodulator 31 is gradually changed from 0% to 100%. By this operation, the output signal of the synthesizer 5 is smoothly switched from the output signal f of the second FM demodulator 41 to the output signal e of the first FM demodulator 31 whose calibration is completed in the cycle c1.

From the time T ₇ to time T ₁₀ is a cycle c3, time T ₇
In, the second select signal b applied to the second selector 2 becomes high level. As a result, the second selector 2
Outputs the reference signal I f1 by this, and the second FM demodulator 41
Starts the output of the demodulated signal corresponding to the reference signal I f1.
The output signal f of the second FM demodulator 41 controls the stable control device 6 from time T ₈ has a second offset adjustment signal d so that the output signal f becomes 0V of the second FM demodulator 41. The value of the second offset adjustment signal d from the time T ₉ is held by the control unit 6, calibration of the second FM demodulator 41 is completed. On the other hand, in the cycle c3, the first select signal a is at the low level following the cycle c2, and the first FM demodulator 31
Since the synthesis ratio α of the output signal e of is 100%, the frequency modulation signal If 0 is demodulated by the first FM demodulator 31 and output from the synthesizer 5.

From time T ₁₀ to time T ₁₂ is the cycle c4, and at time T ₁₀ , the second select signal b becomes low level,
The frequency modulation signal I f0 is output from the selector 2 of.
As a result, the second FM demodulator 41 starts outputting a demodulation signal corresponding to the frequency modulation signal I f0. On the other hand, in the cycle c4, the first select signal a is at the low level as in the cycle c3, so that the first FM demodulator 31 outputs the demodulation signal corresponding to the frequency modulation signal I f0. From the time T ₁₁ when the output signal f of the second FM demodulator 41 becomes stable to the time T ₁₂ , the control device 6 decreases the synthesis ratio control signal g, and
The synthesis ratio α of the output signal e of the FM demodulator 31 is gradually changed from 100% to 0%. By this operation, the output signal of the synthesizer 5 is smoothly switched from the output signal e of the first FM demodulator 31 to the output signal f of the second FM demodulator 41 whose calibration is completed in the cycle c3.

By repeating the above operation repeatedly, the present apparatus can obtain a demodulated signal as an output signal, in which the zero point does not fluctuate and the phase does not change instantaneously as in the conventional case. Although the FSK demodulator, that is, the frequency / voltage converter is described as an example in the present embodiment, for example, an optical-electrical signal converter including a light receiving element and an amplifier,
A signal converter including a thermocouple element and an amplifier in which heat is interposed, a converter such as an AM detector DC level converter, and the like can also be sufficiently used as a device for removing the fluctuation of the zero point generated in the conversion process.

Further, when the present invention is applied to a digital data transmission device such as an FSK demodulator, since the phase of the output signal is continuously switched, a PLL circuit is provided in the digital identification circuit provided in the subsequent stage of the device of the present invention. When used, the PLL does not lose synchronization and accurate digital identification is possible.

〔The invention's effect〕

As described above, in the signal conversion device according to the present invention, it is possible to calibrate the fluctuation of the zero point of the converter caused by the temperature change and the like, and the outputs from the two converters are smoothly switched. Does not change instantaneously.

In addition, since there is practically no mixing of jitter, there is no deviation of sampling points.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram showing the configuration of an embodiment of the present invention, and FIG. 2 is an FM.
FIG. 3 is a block diagram of a frequency modulation signal demodulation device for inputting and demodulating a signal, FIG. 3 is an explanatory diagram of an internal configuration of the synthesizer 5, FIG. 4 is a diagram showing a switching mode of demodulation output signals, and FIG. 7 is a timing chart of the operation of the frequency modulation signal demodulation device. FIG. 6 is a block diagram of a conventional device. 1 ... First selector, 2 ... Second select, 3 ... First converter, 4 ... Second converter, 5 ... Combiner, 6 ...
... Control device, 31 ... First FM demodulator, 41 ... Second FM demodulator, 51 ... First multiplication type D / A converter, 52 ... Second multiplication type D / A conversion Unit, 53 ... Adder, 75 ... First sample-hold circuit, 76 ... Second sample-hold circuit, 77
...... First subtractor, 78 …… Second subtractor, 79 …… Data selector, 80 …… Oscillator, 81 …… Control circuit.

Claims (1)

(57) [Claims] 1. A first selector (1) for inputting a converted signal and a reference signal for calibrating a converter and outputting either of them, and for inputting the converted signal and the reference signal A second selector (2) that outputs any one of them and the output of the first selector is converted to output a first converted signal, and an offset voltage of the output converted signal is adjustable. A second converter in which the outputs of the first converter (3) and the second selector are converted to output a second converted signal, and the offset voltage of the output converted signal is adjustable. A converter (4), a combiner (5) for outputting a converted signal obtained by combining the first and second converted signals at a predetermined ratio, and the first or second converted signal to receive an offset voltage. The offset adjustment signal for adjusting the first or second A signal converter including a controller (6) for calibrating the zero point of the first or second converter by outputting to the converter and controlling the first and second selectors and the combiner. In the device, the controller does not calibrate the zero point when the reference signal is output from the first selector and the zero point of the first converter is calibrated. The second converter in which a conversion signal is output from the converter and a predetermined ratio for combining the conversion signals from the first converter whose zero point has been calibrated is sequentially increased, and the zero point calibration has not been completed An operation of sequentially decreasing a predetermined ratio for combining the converted signals from the second converter, and a zero point when the zero point of the second converter is calibrated by outputting the reference signal from the second selector. I have not calibrated The conversion signal is output from the first converter, and the calibration of the zero point is completed. The predetermined ratio for combining the conversion signals from the second converter is sequentially increased, and the calibration of the zero point is not completed. 1. A signal conversion device, which is a control device that alternately performs an operation of sequentially decreasing a predetermined ratio for combining conversion signals from one converter.