JP2524443B2 - On-chip voltage adjustment circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates generally to a new boost power supply for an internal on-chip regulator circuit that includes a differential amplifier coupled to a series regulator acting as a source follower. More specifically, a voltage pump circuit is provided according to the present invention to build a boost power supply for a differential amplifier.

[0002]

2. Description of the Related Art As CMOS technology shrinks the gate length, it is necessary to lower the power supply voltage to avoid problems associated with dielectric breakdown, punch-through, and / or hot carriers. However,
Since the system power supply tends to stay at the reference level (in the foreseeable future), eg 5 V or 3.3 / 3.6 V, the external power supply voltage cannot be easily reduced. One way to meet these requirements is to use an on-chip voltage regulator with a dropout voltage equal to the difference between the system power supply and the scaled internal power supply. A typical CMOS on-chip regulator circuit consists of a differential amplifier and a series regulator operating in source follower mode. However, these circuits are unsuitable for use with small dropouts, eg, 3.3 / 3.6 to 2.5 V conversion, and also suffer from poor power supply rejection.

[0003]

SUMMARY OF THE INVENTION The main object of the present invention is to include a differential amplifier coupled to a series regulating element acting as a source follower, wherein the boost power supply of said differential amplifier is internally constructed by providing a voltage pump circuit. Is to provide a new boost power supply for the on-chip regulator circuit.

It is a further object of the present invention to pulse an internal on-chip regulator circuit boost power supply structure including a differential amplifier coupled to a source follower circuit and a voltage pump for constructing the boost power supply of the differential amplifier. It is to provide a voltage pump circuit including a supply ring oscillator.

[0005]

The present invention provides a new on-chip voltage regulator for an n-well CMOS technology circuit that solves the problems associated with the prior art circuits described above. This new circuit utilizes boost technology to raise the voltage at the gate of the series regulator, which acts as a source follower, and also improves power supply rejection. Further, these circuits preferably use clamp diodes to limit the negative voltage swing at the gate of the series regulator and to improve the settling time of the voltage regulator.
The new approach can be applied to BiCMOS voltage regulators as well as n-well CMOS circuits. In the disclosed circuit, the differential amplifier is a complementary p-channel FE.
A boost power supply for the voltage pump circuit is coupled to the p-channel FET device including a T-device and an n-channel FET device.

The on-chip regulator circuit of the present invention using the boost technique is well suited for small dropout voltage regulator applications, has less external power supply sensitivity, and provides feedback loop settling time. Using an improved clamp diode and utilizing a statically or dynamically controlled pump circuit.

In some preferred embodiments, the voltage pump and ring oscillator comprises a static voltage pump and ring oscillator circuit. Alternatively, the voltage pump and ring oscillator may include a dynamically controlled voltage pump and ring oscillator circuit, the dynamically controlled voltage pump and ring oscillator circuit being coupled to the gate of the source follower via an inverter. It is voltage controlled in the feedback from the additional differential amplifier coupled.

More particularly, in one embodiment, the voltage pump comprises a pn diode made in the n diffusion well by p diffusion. In another embodiment, the voltage pump circuit is coupled as an electrical load for the differential amplifier.

[0009]

DETAILED DESCRIPTION As gate lengths are scaled down by CMOS technology, it is necessary to reduce the supply voltage to avoid problems associated with breakdown, punchthrough, and / or hot carriers. However, since the system power supply tends to stay at the reference level (in the foreseeable future), eg 5 V or 3.3 / 3.6 V, the external power supply voltage cannot be easily lowered. One way to meet these requirements is to use an on-chip voltage regulator with a dropout voltage equal to the difference between the system power supply and the scaled internal power supply.

In the circuit description below, a device such as MP1 refers to a p-channel FET, which all have conventional sources, drains and gates. An indication such as V _Tpo refers to the threshold voltage of the p-channel FET when there is no body effect, while an indication such as V _Tn refers to the threshold voltage of the n-channel FET when the source is not ground or 0 volts. . VCC is the system power supply. VREF is the desired V
It is the reference voltage supplied by the value of DD (INT) and VDD
Used to generate (INT). VSS is the substrate voltage and _VW is the node W voltage. V _D is the voltage drop across the diode junction. VCC (INT) is an internal boost voltage boosted according to the present invention as a power supply for a differential amplifier.

FIG. 1 illustrates a typical prior art CMOS on-chip voltage regulator circuit including a differential amplifier and a series regulator circuit element operating in source follower mode. As shown in FIG. 1, a typical CMOS on-chip voltage regulator circuit has a differential amplifier (MN2-MN4 and MP1-MP2) operating in source follower mode and a series regulator.
(MN1). In differential amplifier circuits, p-channel and n-channel devices are arranged in the usual complementary fashion. Since the maximum level at node Y is VCC, this regulator has a minimum dropout voltage of _VTn (= VCC-VCC (INT)) which is the threshold voltage of MN1. For a 2.5 V n-well technology without intrinsic threshold injection (eg, for depletion mode devices), V _Tn is approximately 1 V. If the output voltage drops temporarily, additional voltage overhead space is required for the feedback loop to operate properly. This circuit is 3.3 / 3.6 V
It doesn't fit well for use in small dropouts such as conversions to 2.5V. Another problem with this circuit is inadequate power rejection at node Y.
Therefore, the VCC fluctuation appearing at node Y is
Appears in (INT) and decreases a little. Although these problems can be solved by using the PMOSFET of the series element MN1, the circuit response for restoring VDD (INT) to VREF after a disturbance becomes slow. When VDD (INT) is higher than VREF, this circuit also causes a large negative voltage swing at node Y (eg, V _{Y, min} = V _W ). V _Y is VDD (IN
Since MN1 is off as long as it is below T) + V _Tn , an unnecessarily large swing slows down the settling time of the circuit.

The present invention provides a new on-chip voltage regulator in n-well CMOS technology that solves the problems associated with the circuit of FIG. The new circuit uses boost technology to make MN1
Improve the power supply rejection by raising the gate voltage of. In some of the disclosed circuits, a clamp diode is used to provide node Y
In some cases it is desirable to limit the negative voltage swing of The new approach can also be applied to BiCMOS voltage regulators. In this case, a bipolar
Transistors can be used to improve performance.
The subtleties of the circuit may vary depending on the particular application. In a new circuit with a clamp diode,
The maximum dropout voltage is assumed to be less than and close to V _Tn + | V _Tp |.

FIG. 2B shows a portion of the small dropout voltage regulator circuit of the present invention which utilizes a voltage pump circuit to build a boost power supply for a differential amplifier and also includes a clamp diode which limits the negative voltage swing at node Y. A schematic block diagram is shown roughly. The clamp diodes can be stacked in series if desired to increase the dropout voltage.

FIG. 2A details a first embodiment of a voltage pump circuit that includes a ring oscillator and also includes a clamp diode to build a boost power supply for a differential amplifier.
Compared to the circuit of FIG. 1, the circuit shown in FIG. 2A builds the boost power supply VCC (INT) of the differential amplifier, VCC.
Voltage pump circuit (MP4-MP6, CPUMP1-CPUMP2, CS)
And the negative voltage swing of node Y.
It features a p-MOSFET. Although a ring oscillator is used to provide the pulses for the voltage pump circuit, alternative embodiments may instead utilize other pulse sources such as clocks or crystal oscillators. The ring oscillator is shown as a five-stage array of inverters (shown in detail as complementary upper p-device and lower n-device in FIG. 6),
Alternate embodiments may use three, four, or other number of stages. A voltage pump is a typical circuit where MP6 acts as a diode to charge CPUMP2 to a certain voltage, MP5 acts as a diode to charge CPUMP1 to a voltage higher than the voltage at CPUMP2 and MP4 is a diode. Acting as CSTO
RE is a voltage higher than the above voltage in CPUMP1,
That is, it is charged up to VCC (INT). In FIG. 2A, the voltage pump is shown as a two-stage voltage pump,
In other embodiments, different numbers of stages of voltage pumps may be used.

Since an NMOS diode may have a large voltage drop due to a serious body effect, it is desirable that the circuit uses a p-MOSFET for the diode in the pump circuit in order to reduce the diode voltage drop. The wells of these p-MOSFETs should be tied to the highest voltage node (ie, VCC (INT)) for normal operation. Thus, before powering the pump circuit when power is upwards, the pn junctions at the sources of MP6 and MP3 are forward biased and VCC (INT) begins at VCC-VD. This shortens the time to raise the voltage to VCC (INT). The gain of the parasitic substrate pnp should be low enough and the circuit needs to be carefully laid out to prevent latch-up.

The differential amplifier is a boost power supply VCC (IN
T) (> VCC), the gate of MN1 (node Y) is driven with a higher voltage than in the circuit of FIG. Therefore, the new circuit is well suited for small dropout voltage regulation. Further, the high frequency noise on VCC is decoupled from the boosted node VCC (INT), thus improving the power supply rejection at node Y. The low level of the node Y is V due to the clamp diode MP3.
Being limited to CC- | V _Tp |, the settling time of the feedback loop (combination of differential amplifier and MN1) is short.

FIG. 3 shows that the voltage pump circuit of FIG.
2 shows a second embodiment of a small dropout voltage regulator circuit of the present invention utilizing a pn diode that can be made by P diffusion in the well. If low impedance diodes are needed, replace MP4-MP6 with Figure 3
As shown in, a pn diode between the p diffusion and the n well can be used as a voltage pump circuit.

One advantage of the circuits of FIGS. 2A and 3 is that the bias current flowing through the differential amplifier is provided by the boost node or boost power supply VCC (INT). In order to supply this constant current (on the order of mA), the effective impedance of the pump circuit needs to be sufficiently small, and the device size of the pump circuit must be increased accordingly.

FIG. 4 utilizes a voltage pump circuit including a ring oscillator similar to the embodiment of FIG. 2A to build a boost power supply for a differential amplifier, but with a boost power supply VCC (I
NT) shows a third embodiment of the small dropout voltage regulator circuit of the present invention in which only the source of MP2 is connected and the source of MP1 is connected to VCC. As shown in FIG. 4, the drawback of the circuits of FIGS. 2A and 3 is that the boost power supply is
Alleviated by connecting to only two sources. In the stationary state, the current flowing from the pump circuit is as shown in FIGS.
Is half of the current flowing in the circuit, so that the area of the pump circuit can be reduced by a factor of 2. Also, VD
When D (INT) is lower than VREF, the restoring operation is improved because the current flowing from the pump circuit to the MP4 / MP2 branch is almost zero.

The design advantages and disadvantages of all of the embodiments disclosed herein are highly dependent on the particular requirements of a particular embodiment. However, the circuit of FIG. 4 is more difficult to implement than the circuit of FIG. 2A, and in most embodiments the circuit of FIG. 2A is probably more desirable than the circuits of FIGS. 3 and 4.

FIG. 5 utilizes a voltage pump circuit including a ring oscillator similar to the embodiment of FIGS. 2A and 4 to build a differential amplifier boost power supply, but the voltage pump circuit provides a load for the differential amplifier. 4 illustrates a fourth embodiment of a small dropout voltage regulator circuit of the present invention. The impedance of the voltage pump circuit is non-zero, and the active load MP1-MP2 of the differential amplifier can be removed as shown in FIG. 5, in which case the voltage pump circuit itself is the load of the differential amplifier. . In this new circuit, the pn diode between the source and well of MP6 is the gate of MN1 (node VC
Since C (INT) is clamped, the clamp diode (FIGS. 2A-4) is not needed. Although the gain of the differential amplifier is halved, the new circuit has fewer devices. The gain of the differential amplifier is halved because MP4-MP
This is because the removal of 6 leaves only one branch of the load of the differential amplifier. Since it is necessary to simultaneously match the load characteristic of the pump circuit and the characteristic of the differential amplifier and optimize the pump circuit, the actual design of this circuit becomes difficult.

FIG. 6 illustrates the small dropout voltage regulation of the present invention which utilizes a feedback controlled dynamic voltage pump circuit which includes a voltage controlled ring oscillator and an additional differential amplifier rather than a static voltage pump circuit. 5 shows a fifth embodiment of the container circuit. The disclosed circuit utilizes a static voltage pump circuit. FIG. 6 shows another improved new regulator circuit using a feedback controlled dynamic pump circuit. This new circuit has a voltage controlled ring oscillator, additional elements MN5-MN7 are provided for voltage control and additional differential amplifiers (MN8-MN7) are provided.
10, MP7-MP8) controls the oscillation frequency of the ring oscillator by feedback. Designed to provide control in a feedback loop, this circuit alleviates some of the design difficulties of the circuit of FIG. The fourth and fifth stages of the ring oscillator are generally provided to thereby increase the power for the voltage pump.

In the operation of the circuit of FIG. 6, if VDD (IN
If T) is lower than VREF, the potential of the node Z becomes high and the resistance of MN5 to MN7 becomes small. Therefore, the oscillation frequency increases and the impedance of the pump circuit decreases. As a result, the boost power supply VCC (INT) is more effectively raised in voltage, which facilitates restoring VDD (INT) to a desired level. When VDD (INT) is higher than the reference voltage VREF, the voltage of the node Z decreases and M
The resistance of N5-MN7 increases. This lowers the frequency and increases the impedance of the pump circuit. Therefore, the rise slows down (or stops), and VDD (INT) drops rapidly.

In FIG. 7, the differential pair MN3 to MN4 is removed,
And the device MN2 whose gate is controlled by the node U
Shows a sixth embodiment of the invention, similar to the embodiment of FIG. 6, in which is used to discharge the boost power supply VCC (INT). In the circuit of FIG. 7, a pair of differential amplifiers (MN3-MN
4) is removed and the number of devices is reduced by using MN2 to discharge the boost power supply VCC (INT). The gate of MN2 is controlled by node U. In this circuit, element MN2 inverts the output of element MP7 to control the gate of MN1. In the operation of this circuit, if the output suddenly drops, the potential of the node U also drops, VCC (INT) rises, and the output level is restored. On the contrary, if the potential of the node U becomes high, VC
C (INT) becomes low and VDD (INT) also becomes low.

As mentioned above, the design advantages and disadvantages of all of the embodiments disclosed herein are highly dependent on the particular requirements of a particular embodiment. However, the circuits of FIGS. 5 and 7 are more difficult to design than the circuit of FIG. 6 when actually implemented. In most embodiments, the circuit of FIG. 6 will probably be selected rather than the circuits of FIGS.

Although some embodiments of the inventive boosted small dropout on-chip voltage regulator and modifications thereof are described in detail herein, the present disclosure is in many alternatives. It will be obvious to those skilled in the art to suggest a design.

[0027]

In accordance with the present invention, an internal on-chip regulator is provided which includes a differential amplifier coupled to a series regulator operating as a source follower, the boost power supply of said differential amplifier being provided with a voltage pump circuit. A new boost power supply for the power supply circuit is provided.

[Brief description of drawings]

FIG. 1 is a typical C of the prior art including a differential amplifier operating in source follower mode and series conditioning circuitry.
FIG. 6 illustrates a MOS on-chip voltage regulator circuit.

FIG. 2A shows a first embodiment of a small dropout voltage regulator circuit of the present invention which utilizes a voltage pump circuit including a ring oscillator to build a boost power supply for a differential amplifier and also includes a clamp diode. Is.

FIG. 2B is a partial block diagram generally illustrating a small dropout voltage regulator circuit of the present invention that utilizes a voltage pump circuit to build a boost power supply for a differential amplifier and also includes a clamp diode.

FIG. 3 illustrates a second embodiment of the small dropout voltage regulator circuit of the present invention which utilizes a pn diode made by P diffusion in an n-well instead of the voltage pump circuit of FIG. 2A. .

FIG. 4 shows how to construct a boost power supply for a differential amplifier,
A small dropout voltage regulator circuit of the present invention utilizing a voltage pump circuit including a ring oscillator similar to the embodiment of FIG. 2A, but connecting the boost power supply only to the source of MP2 and the source of MP1 to VCC. It is a figure which shows the 3rd Example of.

FIG. 5: To build a boost power supply for a differential amplifier,
A fourth embodiment of the small dropout voltage regulator circuit of the present invention utilizes a voltage pump circuit including a ring oscillator similar to the embodiment of FIGS. 2A and 4, but the voltage pump circuit provides a load for the differential amplifier. It is a figure which shows an Example.

FIG. 6 is a small dropout voltage regulator circuit of the present invention utilizing a feedback controlled dynamic voltage pump circuit including a voltage controlled ring oscillator and an additional differential amplifier rather than a static voltage pump circuit. It is a figure which shows the 5th Example of.

FIG. 7 is a circuit diagram similar to the embodiment of FIG. 6 in which the differential pair MN3-MN4 is eliminated and the device MN2 gated by node U is used to discharge the boost power supply VCC (INT), similar to the embodiment of FIG. 6; It is a figure which shows the 6th Example of.

[Explanation of symbols]

 MN n-channel FET MP p-channel FET VCC System power supply VCC (INT) Internal boost voltage

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor San Ho Don United States 10541, New York State, Mahopack, 407 Gregore Drive (72) Inventor Hyun John Shin United States 10541, New York State, Mahopack, Williamburg・ Driving No. 504 (56) Reference JP-A-3-204012 (JP, A)

Claims (6)

(57) [Claims] 1. A. Supply voltage Vcc and b. Analog differential amplifier means having positive and negative input terminals; c. A reference voltage VREF less than the supply voltage VCC and connected to the positive input terminal; d. Source follower means coupled to the supply voltage VCC and the output of the differential amplifier means, the output of which is regulated supply voltage VD
D (INT) is generated, and this supply voltage VDD
Source follower means coupled to feed back (INT) to the negative input terminal; e. The differential amplifier has a boosted voltage V higher than the supply voltage VCC.
Voltage pump circuit means coupled to said supply voltage VCC for providing CC (INT); f. An on-chip voltage regulator circuit comprising: clamp diode means coupled to the gate of said source follower means for limiting negative voltage swings. 2. The voltage pump circuit means supplies a pulse
2. A ring oscillator means for controlling the
On-chip voltage regulator circuit. 3. The voltage pump means and the ring oscillator means.
Is a dynamically controlled voltage pump circuit and ring oscillator
3. The on-chip voltage according to claim 2, which is a circuit.
Adjustment circuit. 4. The dynamically controlled voltage pump and phosphorus.
The oscillator circuit uses the reference voltage VREF as one input.
The other input receives the supply voltage VDD (INT)
The flux from another differential amplifier coupled to receive
The voltage is controlled by feedback.
3. On-chip voltage regulator circuit. 5. The voltage pump means is provided for n diffusion wells.
Characterized by including a pn diode made by p diffusion
The on-chip voltage adjustment circuit according to claim 1. 6. The voltage pump circuit means comprises the differential amplifier.
Characterized in that it is coupled as an electrical load of the instrument means.
The on-chip voltage adjustment circuit according to claim 1.