JP2522095B2 - Lead-cut method for semiconductor device - Google Patents

Lead-cut method for semiconductor device

Info

Publication number
JP2522095B2
JP2522095B2 JP2178012A JP17801290A JP2522095B2 JP 2522095 B2 JP2522095 B2 JP 2522095B2 JP 2178012 A JP2178012 A JP 2178012A JP 17801290 A JP17801290 A JP 17801290A JP 2522095 B2 JP2522095 B2 JP 2522095B2
Authority
JP
Japan
Prior art keywords
lead
semiconductor device
cutting
cut
external
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2178012A
Other languages
Japanese (ja)
Other versions
JPH0463466A (en
Inventor
佐百規 稗田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2178012A priority Critical patent/JP2522095B2/en
Publication of JPH0463466A publication Critical patent/JPH0463466A/en
Application granted granted Critical
Publication of JP2522095B2 publication Critical patent/JP2522095B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、半導体装置のリードカット方法に関する
ものである。
TECHNICAL FIELD The present invention relates to a lead cutting method for a semiconductor device.

〔従来の技術〕[Conventional technology]

第2図は従来の半導体装置のリードカット時の状況を
示す部分概略図である。この図において、1は半導体装
置の外部リード、2はこの外部リード1の表面に付着し
ている外装メッキ、3,6は前記外部リード1の先端をカ
ットする時の受けダイとカットダイであり、5はカット
された外部リード1の先端のリード切断面である。
FIG. 2 is a partial schematic view showing a situation of lead cutting of a conventional semiconductor device. In this figure, 1 is an external lead of a semiconductor device, 2 is exterior plating adhered to the surface of the external lead 1, 3 and 6 are a receiving die and a cutting die for cutting the tip of the external lead 1, Reference numeral 5 is a lead cutting surface at the tip of the cut outer lead 1.

次に、動作について説明する。 Next, the operation will be described.

受けダイ3上にセットされた半導体装置の外部リード
1に対し、カットダイ6が下降し、外部リード1の不要
部分を切断し、外部リード1を成形する。
The cutting die 6 descends with respect to the external lead 1 of the semiconductor device set on the receiving die 3, and cuts unnecessary portions of the external lead 1 to form the external lead 1.

〔発明が解決しようとする課題〕[Problems to be Solved by the Invention]

従来の半導体装置のリードカット方法は、以上のよう
にして行われており、受けダイ3とカットダイ6におい
ても図示のように一方向からカットするため、若干外部
リード1の外装メッキ2のダレによりリード切断面5に
メッキが付着して残るが、大半は素材がむき出しとな
る。
The conventional lead cutting method for a semiconductor device is performed as described above, and since the receiving die 3 and the cutting die 6 are also cut from one direction as shown in the figure, the outer plating 1 of the outer lead 1 may slightly sag. The plating remains on the lead cutting surface 5, but most of the material is exposed.

これにより、特に表面実装形の半導体装置において、
基板実装時、リード切断面5に基板接合用のはんだが付
着せず、電気抵抗アップ,接合強度ダウン,リードカッ
ト破断面の腐食,外観不良等多くの問題点があった。
As a result, especially in the surface mount type semiconductor device,
At the time of mounting on the board, solder for board bonding did not adhere to the lead cutting surface 5, resulting in many problems such as increased electric resistance, decreased bonding strength, corrosion of lead cut fracture surface, and poor appearance.

この発明は、上記のような問題点を解消するためにな
されたもので、リード切断面に外装メッキを残すように
した半導体装置のリードカット方法を得ることを目的と
する。
The present invention has been made in order to solve the above problems, and an object of the present invention is to obtain a lead cutting method for a semiconductor device in which the outer plating is left on the lead cutting surface.

〔課題を解決するための手段〕[Means for solving the problem]

この発明に係る半導体装置のリードカット方法は、外
部リードの不要部分をカットする際に、外部リードの外
装メッキ部分を外部リードの両方向からダレさせるよう
にカットダイを上下両方向から移動してカットし、その
リード切断面に外装メッキを引き伸ばすようにして残す
ものである。
The semiconductor device lead cutting method according to the present invention, when cutting an unnecessary portion of the external lead, the cutting die is moved and cut from both upper and lower directions so as to sag the exterior plating portion of the external lead from both directions, The outer plating is extended and left on the lead cutting surface.

〔作用〕[Action]

この発明における半導体装置のリードカット方法は、
外装メッキが施された半導体装置の外部リードを同形の
カットダイにより上,下方向から移動してカットするこ
とから、外部リードの外装メッキは外部リードの両方向
からダレる状態となってカットされ、その破断面にも外
装メッキを残すことができる。
The lead cutting method for a semiconductor device according to the present invention is
Since the external leads of the semiconductor device that has been subjected to the external plating are moved and cut from the upper and lower directions by the same shape cutting die, the external plating of the external leads is cut in a state in which it is sagging from both directions of the external lead. Exterior plating can be left on the fracture surface.

〔実施例〕〔Example〕

以下、この発明の一実施例を第1図について説明す
る。
An embodiment of the present invention will be described below with reference to FIG.

第1図において、1は半導体装置の外部リード、2は
この外部リード1の表面に付着している外装メッキ、3
は前記外部リード1のカット時の受けダイ、4は同じく
カットダイで、上,下方向に備えられ、かつテーパのつ
いた鋭利な同形状に構成されている。
In FIG. 1, 1 is an external lead of a semiconductor device, 2 is exterior plating attached to the surface of the external lead 1, 3
Is a receiving die for cutting the outer lead 1, and 4 is a cutting die, which are provided in the upper and lower directions and have the same tapered sharp shape.

次に、動作について説明する。 Next, the operation will be described.

受けダイ3上にセットされた半導体装置の外部リード
1に対して、テーパのついた鋭利なカットダイ4をカッ
ト面側、すなち、上,下両方向から移動、すなわち上,
下動させる。その際に、カットダイ4の切断側(刃側)
を外部リード1のリード切断面5にこすり付けるように
して上,下動させて半導体装置の外部リード1の不要部
分を切断し、外部リードを成形する。
With respect to the external leads 1 of the semiconductor device set on the receiving die 3, the sharp cutting die 4 having a taper is moved from the cutting surface side, that is, from both the upper and lower directions, that is,
Move down. At that time, the cutting side (blade side) of the cutting die 4
Is rubbed against the lead cutting surface 5 of the external lead 1 and moved up and down to cut an unnecessary portion of the external lead 1 of the semiconductor device to form the external lead.

なお、上記実施例では、刃先が鋭利なカットダイ4を
半導体装置の外部リード1の上下側からはさみ込んで切
断するものを示したが、外部リード1の切断面にメッキ
部分が付着して残るものならば、その他の方法でもよ
く、例えば若干角度をつけ外部リード1のリード切断面
5を凸型にするような方向にカットしてもよい。
In the above embodiment, the cutting die 4 having a sharp cutting edge is sandwiched from the upper and lower sides of the external lead 1 of the semiconductor device to be cut, but the cut surface of the external lead 1 has a plated portion and remains. Then, other methods may be used, for example, the lead cutting surface 5 of the external lead 1 may be cut in a direction with a slight angle so as to form a convex shape.

〔発明の効果〕〔The invention's effect〕

以上説明したように、この発明は、外部リードの不要
部分をカットする際に、外部リードの外装メッキ部分を
外部リードの両方向にダレさせるようにカットダイを上
下両方向から移動してカットし、そのリード切断面に外
装メッキを引き伸ばすようにして残すので、特に表面実
装形半導体装置における基板実装時にリード切断面に基
板接合用のはんだを付着させることができ、基板コンタ
クト部の電気抵抗ダウン,接合強度アップ,リード切断
面の腐食防止がはかれるとともに、良好な外観の半導体
装置が得られる効果がある。
As described above, according to the present invention, when the unnecessary portion of the external lead is cut, the cutting die is moved by moving the cutting die from both upper and lower directions so that the outer plating portion of the external lead is sagged in both directions of the external lead, and Since the exterior plating is stretched and left on the cut surface, solder for board bonding can be attached to the cut surface of the lead especially when mounting the board on a surface mount type semiconductor device, and the electric resistance of the board contact part and the bonding strength are increased. The lead cut surface is prevented from being corroded, and a semiconductor device having a good appearance can be obtained.

【図面の簡単な説明】[Brief description of drawings]

第1図はこの発明の一実施例を示す半導体装置のリード
カット方法を説明する概略図、第2図は従来の半導体装
置のリードカット方法を説明する概略図を示す。 図において、1は外部リード、2は外装メッキ、3は受
けダイ、4はカットダイ、5はリード切断面を示す。 なお、各図中の同一符号は同一または相当部分を示す。
FIG. 1 is a schematic diagram for explaining a lead cutting method for a semiconductor device showing an embodiment of the present invention, and FIG. 2 is a schematic diagram for explaining a conventional lead cutting method for a semiconductor device. In the figure, 1 is an external lead, 2 is exterior plating, 3 is a receiving die, 4 is a cutting die, and 5 is a lead cutting surface. The same reference numerals in each drawing indicate the same or corresponding parts.

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】外装メッキ処理を完了した外部リードを備
えた半導体装置のリードカット方法において、前記外部
リードの不要部分をカットする際に、前記外部リードの
外装メッキ部分を前記外部リードの両方向からダレさせ
るようにカットダイを上下両方向から移動してカット
し、そのリード切断面に前記外装メッキを引き伸ばすよ
うにして残すことを特徴とする半導体装置のリードカッ
ト方法。
1. A lead cutting method for a semiconductor device having an outer lead that has been subjected to an outer plating treatment, wherein when the unnecessary portion of the outer lead is cut, the outer plating portion of the outer lead is removed from both directions of the outer lead. A lead cutting method for a semiconductor device, characterized in that a cutting die is moved from above and below to cut so as to cause sagging, and the exterior plating is extended and left on the lead cutting surface.
JP2178012A 1990-07-03 1990-07-03 Lead-cut method for semiconductor device Expired - Fee Related JP2522095B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2178012A JP2522095B2 (en) 1990-07-03 1990-07-03 Lead-cut method for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2178012A JP2522095B2 (en) 1990-07-03 1990-07-03 Lead-cut method for semiconductor device

Publications (2)

Publication Number Publication Date
JPH0463466A JPH0463466A (en) 1992-02-28
JP2522095B2 true JP2522095B2 (en) 1996-08-07

Family

ID=16041020

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2178012A Expired - Fee Related JP2522095B2 (en) 1990-07-03 1990-07-03 Lead-cut method for semiconductor device

Country Status (1)

Country Link
JP (1) JP2522095B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5063160B2 (en) * 2007-03-29 2012-10-31 株式会社神戸製鋼所 Copper alloy terminal with Sn plating and manufacturing method thereof
JP5871434B2 (en) * 2013-02-24 2016-03-01 古河電気工業株式会社 Manufacturing method of tube terminal
JP6340204B2 (en) * 2014-02-14 2018-06-06 エイブリック株式会社 Resin-sealed semiconductor device and manufacturing method thereof

Also Published As

Publication number Publication date
JPH0463466A (en) 1992-02-28

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