JP2519519Y2 - Data storage device - Google Patents

Description

TECHNICAL FIELD OF THE INVENTION The present invention relates to a data storage device.

BACKGROUND OF THE INVENTION As an electronic musical instrument having a sequencer function, there is known an electronic musical instrument capable of storing a plurality of musical sound track data in its sequencer memory. In this type of device, the entire space of the sequencer memory is fixedly divided, and each divided area is assigned as a storage area for each track data.

Therefore, the track data storage area has a fixed length, and the amount of track data that exceeds the divided area cannot be stored. Further, even if the track data uses only a part of the divided area, the vacant space cannot be used for other track data, and there is a problem that the memory usage efficiency is low.

More generally, it is not limited to the sequencer of the electronic musical instrument as described above, but a plurality of data files (in the above example,
The problem is to improve the usage efficiency in storing a plurality of musical sound track data) in the memory.

[Object of the Invention] Therefore, an object of the present invention is to solve the above-mentioned problems and to provide a data storage device which can fully utilize the entire area of the data file memory.

[Summary of the Invention] In order to achieve the above-mentioned object, the present invention uses the entire space of the memory for a plurality of data files endlessly (in a ring shape), and stores the next address of the last address of the already stored data file. The point is that the address is set as the top address of the newly input data file and the data of the new data file is sequentially written from that address.

[Embodiment] An embodiment in which the present invention is applied to an electronic musical instrument with a sequencer will be described below.

FIG. 1 shows the overall configuration of the electronic musical instrument with a sequencer according to the present embodiment, and the overall control is performed centering on the microprocessor 1. This microprocessor 1 is connected to a ROM 2, a RAM 3, an operator group / display device 4, and a sound source 5 via a data bus and an address bus. The ROM 2 stores the program of the microprocessor 1, and the RAM 3 is stored in the RAM 3. Are registers SRT1, END1, SRT2, END2, ADR, LIMIT
Besides, a sequencer memory 31 is placed. The sound source 5 generates a tone signal according to the information from the microprocessor 1,
The signal is emitted to the outside through the sound system 6. Further, the timer 7 gives time information for recording and reproducing the musical sound track data in the sequencer memory 31, and in the recording mode, the operator group / display device 4 is used.
Each time the microprocessor 1 detects musical tone information such as a new note on / off, note number, chord name, tone color name, etc. from the operator group inside, the time information from the timer 7 is added to that information. The track data is recorded by being written in the sequencer memory 31. On the contrary, in the reproduction mode, the time information on the sequencer memory 31 and the time information from the timer 7 are compared in the microprocessor 1, and musical tone information is sent to the sound source 5 for reproduction each time they match.

In the present embodiment, the sequencer memory 31 can record and reproduce two musical sound track data. The sequencer memory 31 has a ring structure (endless structure) as shown in FIG. That is, assuming that the physical address of the sequencer memory 31 is, for example, address 0 to address 9999, the address next to the address 9999 becomes address 0,
It can be accessed from the microprocessor 1.

Further, in the present embodiment, the microprocessor 1 gives the sequencer memory 31 an endless property, and two musical sound track data can occupy the entire space of the sequencer memory 31, and the musical sound track data to be newly stored. The storage area changes according to the storage area already stored. To realize this function, the microprocessor 1 uses the register SR above.
Use 1, END1, SRT2, END2, ADR, LIMIT. That is, SRT1 is a pointer indicating the start address of the first rack data, END1 is a pointer indicating the end address of the first track data, and similarly SRT2 is a pointer indicating the start address of the second track data. END2 is a pointer indicating the end address of the second track data, and ADR is a pointer for the current write (or read) address. Further, LIMIT is a pointer indicating a writable limit address, and has an address value before the start address of the track data that has already been recorded.

The operation of this embodiment will be described below with reference to FIGS.

Now, it is assumed that the first track data and the second track data are recorded in the sequencer memory 31 as shown in FIG. Here, when newly recording the first track data, the microprocessor 1 operates according to the flowchart shown in FIG.

That is, in step 301, the second recorded already
Start address of the first track data that will record the address next to the last address END2 of the track data
Set as SRT1. This address is (SRT
1). Next, at step 302, the recordable limit address of the first track data at which the address immediately before the start address SRT2 of the second track data is to be recorded is recorded.
Set as LIMIT. This address is indicated by (LIMIT) in FIG. As will be described later, this acts so that the newly input first track data can be recorded at the maximum length without destroying the other track data (second track data) already recorded. That is, the newly input first track data can be recorded from (SRT1) to (LIMIT) in FIG. At the next step 303, start address SRT1 of the first track
Is set to the write pointer ADR, and thereafter the recording process from step 304 onward is performed.

That is, every time the timer 7 counts up, the microprocessor 1 checks whether or not there is an input of a musical tone change from the operators in the operator group / display device 4 (step 30
4) If present, the information (tone data) indicated by the input is stored in the address indicated by the write pointer ADR together with the timer value from the timer 7 (305), and the write pointer ADR is advanced (30
6), unless the write pointer ADR has reached the write limit address LIMIT, the process returns to step 304, and the tone change change determination is performed again. If there is no change in musical tone in step 304, the process proceeds to step 308, it is judged whether or not a command to end the performance is input from the operator, and if not, step 30 is repeated.
Return to 4 and repeat the above loop.

In this way, the first track data is sequentially recorded from the start address (SRT1) shown in FIG.
When the performance input is completed and an end command is input from the operator, this is detected in step 308, and the write address ADR at that time is stored in the pointer END1 as the end address of the first track data (step 309). ), The recording process is completed.

If the write address ADR reaches the write limit address (LIMIT) illustrated in FIG. 2, the memory over process is performed to prevent the destruction of the second track data.

The above is the case of newly recording the first track data, but in the case of newly recording the second track data, the values of the start address SRT1 and the end address END1 of the already recorded first track data With the second
The start address SRT1 of the track data and the write limit address LIMIT are determined. That is, steps 301, 30
SRT2 ← END1 + 1, LIMIT ← SRT1-1, A instead of 2,303
DR ← SRT2 is executed. And in step 309 END2 ← A
It becomes DR.

In this embodiment, two track data are recorded in the sequencer memory 31, but it is obvious that the invention can be applied to three or more track data.

It can also be applied to general data files other than musical sound track data.

[Advantage of Device] As described in detail above, in this device, the memory for a plurality of data files has a ring structure for access,
The data of the new file is sequentially stored with the address next to the end address of the already recorded data file as the start address of the newly input data file. Therefore, there is an advantage that the entire space of the memory can be fully utilized and the memory efficiency is very good even though the configuration is very simple.

[Brief description of drawings]

FIG. 1 is an overall configuration diagram of an embodiment in which the data storage device of the present invention is applied to an electronic musical instrument with a sequencer, FIG. 2 is a schematic diagram showing the structure of a sequencer memory, and FIG. 3 is a flowchart of the operation of the embodiment. Is. 1 ... Microprocessor, 2 ... ROM (program memory), 31 ... Ring sequencer memory, SRT1, END
1, SRT2, END2, ADR, LIMIT ... Sequencer memory pointer register.

Claims (1)

(57) [Scope of utility model registration request] 1. A method for storing a plurality of data files in the memory by using the address next to the last address of the data file on the memory as the start address of the data file to be newly stored and using the entire space of the memory endlessly. And data storage device.