JP2519474B2 - Method of manufacturing grooved capacitor - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a method for manufacturing a groove type capacitor which is an element of a MOS type integrated circuit.

(Prior Art) FIGS. 2A to 2G are cross-sectional views of a MOS type integrated circuit in each step shown for explaining a conventional step of manufacturing a groove type capacitor. A window 3 is opened in the silicon oxide film 2 grown on the silicon substrate 1 by a photoetching method [see FIG. 2 (a)], and the silicon substrate 1 is etched using the silicon oxide film 2 as a mask. To form the groove 4 [see FIG. 2 (b)].

Next, impurity ions 5 having a conductivity type opposite to that of the silicon substrate 1 are ion-implanted into the sidewalls and the bottom of the groove 4 [see FIG. 2 (c)], and the implanted impurity ions 5 are activated. As a result, the silicon oxide film 2 is removed after the impurity regions 6 are formed on the sidewalls and the bottom of the trench 4 [see FIG. 2 (d)].

After that, the oxidation of the silicon substrate 1 having the groove 4 is performed 1,050.
After drying in an atmosphere of dry oxygen of ℃ or more to form a silicon oxide film 7 having a film thickness of 1,000 Å or more, the upper edge of the opening of the impurity region 6 is rounded [see FIG. 2 (e)].
The silicon oxide film 7 is removed [see FIG. 2 (f)].

Then, a dielectric film 8 for a capacitor is formed on the silicon substrate 1 having the groove 4, and then a conductive layer 9 serving as one electrode of the capacitor is further formed on the dielectric film 8 [FIG. As a result, a groove-shaped capacitor is formed on the silicon substrate 1.

(Problems to be Solved by the Invention) By the way, by oxidizing the upper edge of the opening of the impurity region 6,
For rounding [see FIG. 2 (e)], a silicon oxide film 7 having a film thickness of 1,000 Å or more must be formed in a dry oxygen atmosphere of 1,050 ° C. or more. This is a problem that unless the high temperature oxidation of 1,050 ° C. or higher is used, the upper edge of the opening of the impurity region 6 becomes sharp rather than rounded, and the withstand voltage of the groove type capacitor deteriorates. Also, if the thickness of the silicon oxide film 7 is not less than 1,000 Å, the radius of curvature of the rounded upper edge portion is small, and a sufficient rounding effect cannot be obtained.

However, even if it is oxidized at a high temperature of 1,050 ° C. or higher, it takes about 90 minutes to grow the silicon oxide film 7 to a thickness of 1,000 Å or more in a dry oxygen atmosphere. There has been a problem that redistribution of impurities in the impurity diffusion region including the region 6 is caused.

Therefore, when steam oxidation having a high oxidation rate is used instead of oxidation in a dry oxygen atmosphere, there is a problem that sharpening of the upper edge of the opening of the impurity region 6 becomes more remarkable.

Furthermore, the silicon inside the groove 4 of the silicon substrate 1 is
There is also a problem that it becomes difficult to control the concentration of the impurity region 6 when the oxidation is performed at 0 Å or more.

The present invention has been made in view of such problems,
While minimizing the redistribution of impurities, the upper edge of the opening of the impurity region provided in the sidewall and bottom of the trench of the silicon substrate is rounded, and at the same time, the film thickness of the dielectric for the capacitor at the upper edge. It is an object of the present invention to provide a method for manufacturing a groove-shaped capacitor in which a capacitor is formed thick.

(Means for Solving Problems) According to the present invention, an impurity having a conductivity type opposite to that of a silicon substrate is diffused from a window of a silicon oxide film to a portion of the silicon substrate exposed in the window. A groove is formed in a silicon substrate by etching through a window, and impurity ions having a conductivity type opposite to that of the silicon substrate are ion-implanted into the sidewall and bottom of the groove, and then the silicon substrate is exposed to a wavelength in an oxidizing atmosphere. The oxide film is grown only on the upper edge of the opening of the groove by irradiating with light of 1.5 to 3.0 μm to heat only the upper edge of the opening of the groove. Then, a dielectric for forming a capacitor on a silicon substrate, and a conductive layer serving as one electrode of the capacitor is deposited on the dielectric.

(Operation) According to this method of manufacturing a groove-type capacitor, the opening upper end edge of the groove can be easily rounded, so that the film thickness of the dielectric at the upper end edge can be increased.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

1 (a) to 1 (g) are sectional views of a MOS type integrated circuit at each step shown for explaining the manufacturing process of the groove type capacitor of the present invention. First, on a P type silicon substrate 10. A silicon oxide film 11 having a film thickness of 1 μm is formed on the silicon oxide film 11, and a photoresist film (not shown) is formed on the silicon oxide film 11 as a window pattern mask. Are removed by buffered hydrofluoric acid, that is, a photoetching method is used to open a window 12 in the silicon oxide film 11 [see FIG. 1 (a)].

Then, after removing the photoresist film, the silicon oxide film 11 is used as a mask, and the silicon substrate is exposed through the window 12.
Arsenic is selectively diffused into 10 to obtain a surface impurity concentration of 1 × 10
¹⁹ cm ^-3 , N-type impurity diffusion region 13 with a diffusion depth of 0.2 μm 13
Are formed [see FIG. 1 (b)]. At this time, arsenic diffuses not only in the depth direction but also laterally from the end of the window 12, that is, about 0.15 μm below the silicon oxide film 11.

Next, by using the silicon oxide film 11 as a mask, the silicon substrate 10 is dry-etched through the window 12 formed in the silicon oxide film 11, so that the opening area is 1 μm × 2.
[mu] m, on the depth to form the grooves 14 of 4μm [Figure 1 (c)], the incident angle 7-30 degrees, a dose of 2 × 10 ¹⁵ cm ^-2, at an acceleration voltage of 200 kV, the grooves 14 Arsenic ions 15 are ion-implanted into the side walls and the bottom [see FIG. 1 (d)], and N-type impurity ion implantation regions 16 are formed in the side walls and the bottom of the groove 14 [see FIG. 1 (e)]. ].

Then, after removing the silicon oxide film 11 with buffered hydrofluoric acid,
When the silicon substrate 10 is irradiated with light 17 having a wavelength of 1.5 to 3.0 μm in a dry oxygen atmosphere [see FIG. 1 (e)], the impurity diffusion region 13 remaining at the upper edge of the opening of the groove 14 is covered with arsenic. The temperature is 1,150 ℃ (1,100
To 1,200 ° C.), and a silicon oxide film 18 is formed on the upper edge of the opening of the groove 14 [see FIG. 1 (f)]. At this time, the irradiation intensity and the irradiation time of the light 17 are controlled so that the film thickness of the silicon oxide film 18 is about 400 Å.
However, in the impurity ion implantation region 16, since the arsenic atoms are not activated, heat is not absorbed by free carriers and the temperature does not rise. Therefore, the silicon substrate 10
A silicon oxide film is not formed in the flat portion and inside the groove 14, and redistribution of impurities is suppressed to a minimum.

After that, the silicon substrate 10 is continuously irradiated with light having a wavelength of 0.4 to 1.5 μm (not shown), and the silicon substrate 10 is heated to 1,150 ° C. in dry oxygen to function as a dielectric film 19 for a capacitor. A silicon oxide film with a film thickness of 50 to 100Å is formed. In this step, the impurity ions are activated at the same time.

Finally, a polycrystalline silicon electrode is formed as the conductive layer 20 which becomes one electrode of the capacitor [see FIG. 1 (g)].

The other electrode of the capacitor is an N-type impurity region 21.

In addition, the dielectric film 19 for the capacitor in the above-mentioned embodiment.
Was formed by thermal oxidation, but it may be formed by a chemical vapor deposition (CVD) method. In this case, activation treatment of implanted ions may be added separately.

(Effects of the Invention) As described above, according to the present invention, while minimizing the redistribution of impurities, the upper edge of the opening of the groove formed in the silicon substrate is rounded, and at the same time, the groove The capacitor dielectric film at the upper edge of the opening can be formed thick, and as a result, a high breakdown voltage groove-shaped capacitor can be formed.

[Brief description of drawings]

1 (a) to 1 (g) are cross-sectional views of a MOS type integrated circuit in each step shown for explaining the manufacturing process of the grooved capacitor of the present invention, and FIGS. 2 (a) to 2 (g) are MO for each process shown to explain the manufacturing process of a conventional grooved capacitor
It is a sectional view of an S-shaped integrated circuit. 10 ... Silicon substrate, 11, 18 ... Silicon oxide film, 12 ...
... window, 13 ... impurity diffusion region, 14 ... groove, 15 ... arsenic ion, 16 ... impurity injection region, 17 ... light, 19 ... dielectric film, 20 ... conductive layer, 21 ... impurity region.

Claims (2)

(57) [Claims] 1. A predetermined portion of a first silicon oxide film formed on a silicon substrate of one conductivity type is removed by a photoetching method to form a window, and the window is formed on the silicon substrate through the window. Is a step of diffusing impurities of opposite conductivity type to form an impurity region, and a step of etching the silicon substrate from the opening of the window using the first silicon oxide film as a mask to form a groove. A step of forming an ion-implanted region by ion-implanting impurity ions having a conductivity type opposite to that of the silicon substrate into a sidewall portion and a bottom portion of the groove using the first silicon oxide film as a mask; After removing the silicon oxide film, the silicon substrate is irradiated with a light beam having a wavelength of 1.5 to 3.0 μm in an oxidizing atmosphere to selectively heat the vicinity of the upper edge of the opening of the groove, thereby opening the groove. A step of forming a second silicon oxide film on an edge portion, a step of forming a dielectric film for a capacitor on the silicon substrate including the groove, and a step of forming a dielectric film for a capacitor on the dielectric film. And a step of depositing a conductive layer to be an electrode. 2. The impurity region has a surface impurity concentration of 1 × 10 ¹⁸ to 1 × 10 ²⁰ cm ^-3 and a dose amount of the impurity ions of 5 × 10 ^{14 to} 5 × 10 ¹⁵ cm ^-2 . The method of manufacturing a grooved capacitor according to claim 1, wherein the method is provided.