JP2519320Y2 - Tuner AGC circuit - Google Patents

Description

[Detailed Description of the Invention] (a) Industrial Application Field This invention relates to an AGC circuit of a tuner.

(B) Problems to be solved by the prior art and device As an AGC circuit of a tuner, there is known an AGC control circuit in a receiver in Japanese Utility Model Laid-Open No. 63-158033.

However, in the above-mentioned conventional one, when a broadcast station having a strong electric field strength is received, if the attenuation amount of the attenuator is insufficient, a high-frequency signal with a large level is input to the high-frequency amplifier, so that distortion occurs in the high-frequency amplifier. Even if the high-frequency amplifier does not generate distortion, the high-frequency amplifier in the subsequent stage may generate distortion, in which case there is a problem that intermodulation interference or intermodulation interference occurs.

This invention was made in view of the above points,
It is an object of the invention to provide an AGC circuit of a tuner which prevents intermodulation interference and intermodulation interference even when a radio wave having a strong electric field strength is received.

(C) Means for solving the problem The tuner AGC circuit of the present invention comprises a high frequency tuning circuit for amplifying a high frequency signal, an AGC circuit for detecting the strength of the high frequency signal and generating an AGC voltage, and an anode. A first pin diode to which the AGC voltage is applied and a second pin diode connected in series in the same direction as the first pin diode.
A pin diode, a third pin diode connected in series in the same direction as the second pin diode, a fourth pin diode connected in series in the same direction as the third pin diode, and A capacitor provided between the connection line between the first pin diode and the second pin diode and the input side of the high frequency tuning circuit; the connection line between the third pin diode and the fourth pin diode; A capacitor provided between the output side of the high frequency tuning circuit and
It is composed of a resistor and a capacitor provided between the ground and the connection line connecting the second pin diode and the third pin diode.

(D) Embodiment An embodiment of the AGC circuit of the tuner according to the present invention will be described with reference to FIGS. 1 and 2.

(Embodiment 1) FIG. 1 is a diagram showing a first embodiment.

The antenna 1 and the high frequency tuning circuit 3 are connected by the coupling capacitor 2. The high frequency tuning circuit 3 is a coupling capacitor 4 and is connected to the high frequency amplifier circuit 5, and its output is connected to the second stage high frequency tuning circuit 6 as in a normal FM receiver.

The output of the mixer circuit 7 is output to the IF signal output terminal 9 via the AGC control circuit 8.

The other output of the AGC control circuit 8 is connected to the anode of a PIN (pin) diode 11 via a resistor 10. PIN (pin) diodes 12, 13, 14 are connected in series to this PIN diode 11, and the PIN diode 14 cathodes are connected to ground.

The connection point J ₁ between the PIN diodes 11 and 12 of the PIN diodes 11 to 14 is connected to the input side of the high frequency tuning circuit 3, that is, the output side of the coupling capacitor 2 by the capacitor 15. In addition, the connection point of the PIN diodes 13 and 14 J ₂
Are connected to the output side of the high frequency tuning circuit 3 by a capacitor 16.

The anode side of the PIN diode 11 is grounded by the capacitor 17, and the connection point J ₃ between the PIN diodes 12 and 13 is grounded by the parallel circuit of the capacitor 18 and the resistor 19.

Further, the high frequency tuning circuits 3 and 6 are connected to the tuning voltage terminal 20.

In the tuner AGC circuit thus configured, broadcast radio waves input from the antenna 1 are guided to the mixer circuit 7 via the high frequency tuning circuit 3, the high frequency amplifier circuit 5, and the high frequency tuning circuit 6. After being converted to a 10.7 MHz IF signal by the mixer circuit 7 and passing through the AGC control circuit 8, the IF signal output terminal 9
Is output to

Since the AGC control circuit 8 also includes a filter circuit (not shown) that passes the 10.7 MHz component of the output signal of the mixer circuit 7, it is installed in the path of the high frequency signal of the broadcast radio wave, At the same time, it has the function of generating an AGC signal. The AGC control circuit 8 is a filter circuit, that is, a circuit that takes in a part of the IF signal appearing in the secondary winding of the IFT, detects it, and creates a DC voltage 21 to be a control signal.

The DC voltage 21 output from the AGC control circuit 8 is 2 of the IFT described above.
The DC voltage value changes depending on the amplitude level of the signal appearing in the next winding. However, due to the gain distribution of the entire receiving circuit, AGC control is performed from when the antenna input electric field strength exceeds approximately 60 dBμV. It is common for circuit 8 to generate a DC voltage 21 and this invention is such an operating point.

Now, when the AGC control circuit 8 generates a DC voltage 21 when the antenna input electric field strength exceeds 60 dBμV, current flows through the PIN diodes 11 to 14 via the resistor 10 and the resistor 1
The current is shunted to 9. Therefore, the total current before shunting flows through the PIN diodes 11 and 12, and
The ON resistance of 12 and 12 gradually decreases according to the amount of current. Since the ON resistance is lowered, the impedance of the connection point J ₁ is lowered,
Due to the voltage dividing effect with the coupling capacitor 2, the high frequency signal input from the antenna is input to the high frequency tuning circuit 3.
It is attenuated at 3a so that an excessive signal is not added to the high frequency tuning circuit 3 and thereafter. In addition to the first attenuator circuit described above, in the present invention, the second attenuator is further provided with PIN diodes 13 and 14 so that the connection point J ₂ and the output side 3b of the high frequency tuning circuit 3 are AC-connected. The circuit has a circuit, and when the amount of attenuation on the input side 3a is saturated and further greater attenuation is desired, the impedance of the output side 3b is lowered and the high frequency signal on the output side 3b is attenuated.

That is, the operation of the second attenuator circuit is such that when the current shunting the resistor 19 becomes large, the voltage across the resistor 19 becomes high, and the anode side voltage of the PIN diode 13 becomes high, P
The current flowing through the IN diodes 13 and 14 becomes large, the ON resistance of the pin diodes 13 and 14 is lowered, and the impedance of the connection point J ₂ is lowered to achieve the damping operation.
In particular, when the tuning impedance of the high frequency tuning circuit 3 is provided in series in the signal path, the tuning impedance is large, so the voltage dividing effect on the output side 3b is extremely large, and a large amount of attenuation can be obtained, resulting in an excessive high frequency signal. It will not be added after the high frequency amplifier circuit 5, and it becomes possible to prevent intermodulation interference and intermodulation interference.

Further, when the capacitor 16 and the ON resistances of the PIN diodes 13 and 14 are equivalently connected in parallel to the tuning impedance of the high frequency tuning circuit 3, the Q of the tuning impedance is reduced, so that the high frequency at the output side 3b is high. The signal is attenuated.

Moreover, the delay effect that the second attenuating circuit by the PIN diodes 13, 14 operates later than the operation of the first attenuating circuit by the PIN diodes 11, 12 is also taken into consideration, and the attenuating operation is performed over a high range of electric field strength. Therefore, even if the dynamic range of the transmission system of the high frequency signal is widened and the electric field strength is extremely strong, the distortion of the high frequency signal does not occur and the intermodulation interference and the intermodulation interference can be prevented.

(Embodiment 2) FIG. 2 is a diagram showing a second embodiment.

The same parts as those in the first embodiment are designated by the same reference numerals.

In FIG. 2, two coupling capacitors 4a and 4b connected in series are used instead of the coupling capacitor 4 and eight PIN diodes 31 to 3 connected in series are used.
8 is provided.

Then, the AGC voltage 21 is applied to the anode of the PIN diode 31 via the resistor 49, the cathode of the PIN diode 38 is connected to the ground, and the connection point J ₁₁ of the PIN diodes 31 and 32 and the circuit point 1a are connected by the capacitor 39. Similarly, the connection point J ₁₃ of the PIN diodes 33 and 34 and the input side of the high frequency tuning circuit 3
3a is connected with a capacitor 40, and PIN diode 35,
The connection point J _{15 of} 36 and the output side 3b of the high frequency tuning circuit 3 are connected by the capacitor 41, and the connection point J ₁₇ of the PIN diodes 37 and 38 and the circuit point 4c (connection line between the coupling capacitors 4a and 4b) are connected. Are connected by a capacitor 42.

Further, a capacitor 43 and a resistor 44 are provided between the connection point J ₁₂ of the PIN diodes 32 and 33 and the ground, and similarly, a capacitor 45 and a resistor 46 are connected between the connection point J ₁₄ of the PIN diodes 34 and 35 and the ground. Similarly, a capacitor 47 and a resistor 48 are provided between the connection point J ₁₆ of the PIN diodes 36 and 37 and the ground.

Then, in this circuit, after the first attenuating circuit by the capacitor 39 operates, the second attenuating circuit by the capacitor 40 then operates, and then the third attenuating circuit by the capacitor 41 and the fourth attenuating circuit by the capacitor 42. The attenuator circuit is configured to operate sequentially.

(D) Effect of the device Since the tuner AGC circuit according to the present invention is configured as described above, the high frequency signal is sufficiently attenuated, so that distortion occurs in the high frequency amplifier circuit of the present invention and the subsequent high frequency amplifier circuit. Will disappear.

Moreover, it has excellent features such as a simple structure and easy implementation because it can be constructed at low cost.

[Brief description of drawings]

1 and 2 show an embodiment of an AGC circuit of a tuner according to the present invention, FIG. 1 is a circuit diagram, and FIG. 2 is a circuit diagram of another embodiment of the present invention. Explanation of main symbols 1: Antenna 2, 4: Coupling capacitor 3, 6: High frequency tuning circuit 5: High frequency amplifier circuit 7: Mixer circuit 8: AGC control circuit 11 to 14: PIN diode

Claims (1)

(57) [Scope of utility model registration request] 1. A high frequency tuning circuit for amplifying a high frequency signal,
An AGC circuit that detects the strength of the high frequency signal and generates an AGC voltage, a first pin diode to which the AGC voltage is applied to the anode, and a first pin diode are connected in series in the same direction as the first pin diode. A second pin diode,
A third pin diode connected in series in the same direction as the second pin diode, a fourth pin diode connected in series in the same direction as the third pin diode, and the first pin diode And a capacitor provided between the connection line of the second pin diode and the input side of the high-frequency tuning circuit, the connection line of the third pin diode and the fourth pin diode, and the output of the high-frequency tuning circuit. AGC of the tuner, which is composed of a capacitor provided between the second pin diode and the third pin diode, and a resistor and a capacitor provided between the ground and a connection line between the second pin diode and the third pin diode. circuit.