JP2504480B2 - Motion adaptive non-interlace conversion circuit - Google Patents

Description

The present invention relates to an improvement of a motion adaptive non-interlace conversion circuit for converting an interlaced standard television signal into a non-interlace.

(Prior Art) In recent years, much research has been conducted on the improvement of image quality of the current television system, and it is possible to increase the brightness of a cathode ray tube and to make the electron beam into a fine beam, so that a higher definition image can be obtained. It is becoming playable. in this case,
The high brightness of the cathode ray tube enables high-saturation image display even in a bright room, but on the other hand, it has a drawback of making interline flicker and interframe flicker easily noticeable. In addition, the interline flicker causes a reduction in effective vertical resolution, resulting in a lack of balance with horizontal resolution.

On the other hand, with the development of VLSI (Large Scale Integrated Circuit) technology in recent years, a large amount of large capacity IC (Integrated Circuit) memory is supplied at a low price, and an IC memory capable of storing image data for one field. Are becoming easier to use in consumer devices.

Therefore, recently, by introducing digital technology into a television receiver to make the television signal non-interlaced, vertical resolution due to interline flicker caused by interlaced scanning accompanying the increase in brightness of the cathode-ray tube. I am trying to improve the decline of.
In addition to the non-interlacing as described above, various image quality improving measures have been applied to television receivers by using digital technology.

Fig. 4 shows the NTSC system using an image memory.
525 525 interlaced television signals
It shows the principle of conversion into a non-interlaced television signal of a book.

That is, for a still image, if the current field is "0", the field "-1" one field before
Data is stored in the image memory, and as shown by an arrow a in FIG.
By outputting the data of the field "-1" before the field at the same time, 5 525 interlaced images can be obtained.
It is converted to 25 non-interlaced images to eliminate interlace obstacles such as line flicker and large screen flicker.

For the moving image, only the data of the current field "0" is used, and the line having no data is interpolated by using the data of the lines above and below it as shown by the arrow b in FIG. I am trying to convert to.

Here, FIG. 5 shows a conventional non-interlaced conversion circuit based on the above principle. That is, reference numeral 11 in the drawing is an input terminal to which the luminance signal Y in the interlaced television signal is supplied. The luminance signal Y supplied to this input terminal 11 is
After being delayed by 1 field by 12, the field memory 13 further delays by 1 field (total of 2 fields = 1 frame).

Then, the brightness signal Y supplied to the input terminal 11 and the brightness signal Y output from the field memories 12 and 13 are supplied to the motion detection circuit 14 to generate a motion detection signal by calculating a difference between the frames. Used for generation. Further, the luminance signal Y output from the field memory 12 and the luminance signal Y output from the field memory 13 are supplied to the inter-field interpolation signal generation circuit 15 and used for generation of the inter-field interpolation signal. Further, the luminance signal Y output from the field memory 12 is supplied to the inter-line interpolation signal generation circuit 16 and is used for generation of the inter-line interpolation signal.

Here, the inter-field interpolation signal and the inter-line interpolation signal are supplied to the mixing circuit 17 and mixed at a ratio according to the motion detection signal. The output of the mixing circuit 17 is output to the field memory by the non-interlace conversion circuit 18.
Based on the luminance signal Y output from 12, it is converted into a non-interlaced signal and taken out from the output terminal 19.

By the way, in the conventional non-interlace conversion circuit as described above, in order to perform non-interlace conversion adapted to the motion of an image, the motion detection circuit 14 generates a motion detection signal by taking a difference between frames. There is. Therefore, in FIG. 6, when the horizontal axis is the horizontal position of the image and the vertical axis is the level, the difference between the frames is simply calculated (the difference between the "0" field and the "-2" field). In the motion detection signal, the motion is detected in the α and γ parts, but the β part (corresponding to the “−1” field) is not detected although there is motion. Then, the β portion of the motion detection signal has no motion, that is, is processed as a still image, which causes a problem that blurring of two lines occurs on the screen.

Therefore, conventionally, a control circuit 22 including a field memory 20 and a maximum value selection circuit 21 is interposed between the motion detection circuit 14 and the mixing circuit 17, and the current motion detection signal and the motion detection signal one field before are stored. I'm trying to output the higher level. By doing this, the motion detection signal can be temporally stretched as shown in FIG.
It is possible to protect the missing part of β.

However, in the conventional motion adaptive non-interlace conversion circuit as described above, it is necessary to provide the dedicated field memory 20 in order to protect the loss of the motion detection signal, which leads to a large configuration and an economical disadvantage. The problem arises.

(Problems to be Solved by the Invention) As described above, in the conventional motion adaptive non-interlaced conversion circuit, it is necessary to provide a dedicated field memory for the motion detection signal, which leads to a large-scale configuration and economical It has the problem of causing disadvantages.

Therefore, the present invention has been made in consideration of the above circumstances, and provides a very good motion adaptive non-interlace conversion circuit that can perform non-interlace conversion based on accurate motion detection and is economically advantageous. The purpose is to do.

[Structure of the Invention] (Means for Solving the Problems) A motion adaptive non-interlace conversion circuit according to the present invention is a first memory which stores a luminance signal in an interlaced television signal for one field and delays it. Means, a second storage means for storing the luminance signal output from the first storage means for one field and delaying it, a luminance signal input to the first storage means and the first and second storage means. Motion detection means for generating a motion detection signal based on the luminance signal output from the means, and interline interpolation based on the luminance signal input to the first storage means and the luminance signal output from the first storage means An interpolating signal generating means for generating a signal and an inter-field interpolating signal, and a ratio of the inter-line interpolating signal and the inter-field interpolating signal output from the interpolating signal generating means based on the motion detection signal. The present invention is intended for a device provided with a mixing means for mixing in 1. and a conversion means for converting a luminance signal input to the first storage means into a non-interlaced signal based on an output signal of the mixing means.

Then, between the first storage means and the second storage means,
The luminance signal output from the first storage means is sub-sampled in dot units, a motion detection signal is inserted into the gap generated by the sub-sampling, and the multiplexed signal is output to the second storage means. The second storage means simultaneously delays the luminance signal and the motion detection signal output from the second storage means.

(Operation) According to the above configuration, the luminance signal output from the first storage unit is sub-sampled in dot units, and the motion detection signal is inserted into the gap generated by this sub-sampling to obtain the second Since the field delay is performed simultaneously by the storage means, there is no need to provide a dedicated field memory for protecting the loss of the motion detection signal as in the conventional case, and non-interlaced conversion based on accurate motion detection can be performed. In addition to being able to do so, it can be economically advantageous.

(Embodiment) Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings. In FIG. 1, reference numeral 23 is an input terminal to which the luminance signal Y in the interlaced television signal is supplied. Luminance signal Y supplied to this input terminal 23
Is delayed by 1 field by the field memory 24, and then further delayed by 1 field (total 2 fields = 1 frame) by the 8-bit input field memory 26 via the multiplexing circuit 25 described later. The field memories 24 and 26 are the same general-purpose one-chip memories.

Here, the field memory 26 outputs a 4-bit motion detection signal md, an 8-bit luminance signal Y, and a 4-bit motion detection signal M. Of these, the 8-bit luminance signal Y is supplied to the motion detection circuit 27 together with the luminance signal Y supplied to the input terminal 23, and a 4-bit motion detection signal is generated by calculating the difference between the luminance signals Y for one frame. Be used for. The motion detection signal is supplied to the lower 4 bits of the 8-bit input line memory 28.

In addition, the 4-bit motion detection signal md is the multiplexing circuit 2
5, upper 4 bits of line memory 28 and maximum value selection circuit 29
Are supplied to each. And the line memory
The function 28 delays the input motion detection signal md by one line and outputs it to the maximum value selection circuit 29. The function 28 delays the input motion detection signal md by one line and outputs it to the multiplexing circuit 25. The function of outputting to the value selection circuit 30 is performed.

Here, the multiplexing circuit 25 sub-samples the luminance signal Y output from the field memory 24 in dot units, and the motion detection signal md output from the field memory 26 and the line It serves to multiplex and insert the motion detection signal MD output from the memory 28.

That is, the field memory 24 and the line memory 28
And from the field memory 26, as shown in FIGS.
As shown in (c), assuming that the luminance signal Y, the motion detection signal MD, and the motion detection signal md are respectively output, the multiplexing circuit 25 outputs the luminance signal Y of 8 bits as shown in FIG. The motion detection signal MD is multiplexed into the upper 4 bits of the bits and the motion detection signal md is inserted into the lower 4 bits, and the signal is output to the field memory 26.

Then, the maximum value selection circuit 30 compares the motion detection signal MD output from the line memory 28 with the motion detection signal output from the motion detection circuit 27, and selects the larger one to output. That is, as shown in FIG. 3, the current motion detection signal α and the motion detection signal β delayed by one line are compared in magnitude, and the larger one is selected and output.

In addition, the maximum value selection circuit 29 is provided in the field memory 26.
2 field delayed motion detection signal md
And the motion detection signal output from the line memory 28 obtained by delaying the motion detection signal md by one line are compared in magnitude, and the larger one is selected and output. That is, as shown in FIG. 3, the motion detection signal δ delayed by 2 fields and the motion detection signal ε delayed by 2 fields and 1 line are compared in magnitude, and the larger one is selected and output. is there.

Here, the motion detection signal md selectively output from the maximum value selection circuit 29 is supplied to the maximum value selection circuit 31, and one field output from the field memory 26 and the motion detection signal M delayed by one line are compared with the magnitude. It is compared and the larger one is selected and output. That is, as shown in FIG. 3, the motion detection signal δ or ε output from the maximum value selection circuit 29 and the motion detection signal γ line-delayed for one field output from the field memory 26 are compared in magnitude. , The larger one is selected and output.

The motion detection signal selectively output from the maximum value selection circuit 31 is supplied to the maximum value selection circuit 32 and compared in magnitude with the motion detection signal output from the maximum value selection circuit 30, and the larger one is selected and output. To be done. That is, as shown in FIG. 3, the motion detection signal δ or ε or γ output from the maximum value selection circuit 29 and the motion detection signal α or β output from the maximum value selection circuit 30 are compared in magnitude, The larger one is selected and output. In short, the maximum signal is selected from the motion detection signals α, β, γ, δ, ε.

After that, the motion detection signal output from the maximum value selection circuit 32 is interpolated by the latch circuit 33 and the maximum value selection circuit 34 in the sub-sampled portion by the multiplexing circuit 25, and a normal motion detection signal is obtained here. Is generated.

On the other hand, the luminance signal Y supplied to the input terminal 23 and the luminance signal Y output from the field memory 24 are the inter-line interpolation signal generation circuit 35 and the inter-field interpolation signal generation circuit 36.
And inter-line interpolation signals and inter-field interpolation signals.

Then, the inter-line interpolation signal and the inter-field interpolation signal are supplied to the mixing circuit 37, and the maximum value selecting circuit is supplied.
By being mixed at a ratio according to the motion detection signal output from 34, an interpolation signal for interpolating the line marked with "●" in FIG. 3 is generated. After that, the output of the mixing circuit 37 is converted into a non-interlaced signal by the non-interlaced conversion circuit 38 based on the original luminance signal Y supplied to the input terminal 23, and is taken out from the output terminal 39.

Therefore, according to the configuration of the above-described embodiment, the luminance signal Y output from the field memory 24 is supplied to the multiplexing circuit.
With 25, sub-sampling is performed in dot units, and the motion detection signal is inserted into the gap created by this sub-sampling and guided to the field memory 26 to delay the field at the same time. It is not necessary to provide a dedicated field memory for protecting the above, non-interlace conversion based on accurate motion detection can be performed, and it is economically advantageous.

The present invention is not limited to the above-described embodiment, and can be variously modified and implemented without departing from the scope of the invention.

[Effects of the Invention] As described in detail above, according to the present invention, a very good motion adaptive non-interlaced conversion circuit that can perform non-interlaced conversion based on accurate motion detection and is economically advantageous is provided. Can be provided.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a motion adaptive non-interlace conversion circuit according to the present invention, FIG. 2 is a diagram for explaining multiplexing of the embodiment, and FIG. 3 is an operation of the embodiment. FIG. 4 is a diagram showing the principle of converting an interlaced television signal to non-interlace, FIG. 5 is a block diagram showing a conventional motion adaptive non-interlace conversion circuit, and FIG. 6 is It is a figure for demonstrating the problem of the conventional motion adaptation non-interlaced conversion circuit. 11 …… input terminal, 12,13 …… field memory, 14 ……
Motion detection circuit, 15 ... Inter-field interpolation signal generation circuit,
16 ... inter-line interpolation signal generation circuit, 17 ... mixing circuit, 18
...... Non-interlace conversion circuit, 19 ...... Output terminal, 20
...... Field memory, 21 ...... Maximum value selection circuit, 22 ......
Control circuit, 23 …… input terminal, 24 …… field memory,
25 ... Multiplex circuit, 26 ... Field memory, 27 ... Motion detection circuit, 28 ... Line memory, 29 to 32 ... Maximum value selection circuit, 33 ... Latch circuit, 34 ... Maximum value selection circuit, 35 …
Inter-line interpolation signal generation circuit, 36 Inter-field interpolation signal generation circuit, 37 Mixing circuit, 38 Non-interlace conversion circuit, 39 Output terminal.

Claims (1)

(57) [Claims] 1. A first storage means for storing and delaying one field of a brightness signal in an interlaced television signal, and one field for storing the brightness signal output from the first storage means. A second storage means that is delayed,
The luminance signal input to the first storage means and the first and the first
Motion detection means for generating a motion detection signal based on the luminance signal output from the second storage means, a luminance signal input to the first storage means, and a luminance signal output from the first storage means Interpolating signal generating means for generating an inter-line interpolating signal and an inter-field interpolating signal based on the above, and an inter-line interpolating signal and an inter-field interpolating signal output from the interpolating signal generating means are mixed at a ratio based on the motion detection signal. A motion adaptive non-interlaced conversion circuit comprising: a mixing unit for converting the luminance signal input to the first storage unit into a non-interlaced signal based on an output signal of the mixing unit. Between the storage means and the second storage means, the luminance signal output from the first storage means is sub-sampled in dot units, A multiplexing unit that inserts the motion detection signal into a gap generated by sampling and outputs the motion detection signal to the second storage unit is provided, and the brightness signal and the motion detection signal output from the first storage unit are A motion-adaptive non-interlace conversion circuit, characterized in that it is configured such that field delay is performed simultaneously by the second storage means.