JP2503490B2 - ECD color drive circuit - Google Patents

Description

The present invention relates to protection of a coloring / erasing color driving circuit of an electrochromic element.

[Conventional technology]

The phenomenon in which a reversible electrolytic oxidation or reduction reaction occurs when a voltage is applied to cause reversible coloring is called electrochromism. An EC device (hereinafter, referred to as an EC device) which holds a thin film of an electrochromic (EC) substance showing such a phenomenon between a pair of electrode layers and manipulates a voltage applied between the electrode layers (hereinafter, Abbreviated as ECD)
An attempt to use a CD as a light quantity control element (for example, an antiglare mirror) or a numerical display element using 7 segments is
It has been done for over 20 years.

For example, an ECD in which a transparent electrode layer, a two-layer film of a tungsten trioxide thin film and an insulating film (eg, silicon dioxide) (in no particular order), and a counter electrode layer are sequentially laminated on a glass substrate.
(See Japanese Examined Patent Publication No. 52-46098) is known as an all-solid-state ECD. When a coloring voltage Vc is applied to this ECD, the tungsten trioxide (WO ₃ ) thin film is colored blue. Then this ECD
When the decoloring voltage Vb of the opposite polarity is applied to the WO ₃ , the blue color of the WO ₃ thin film disappears and the WO ₃ thin film becomes colorless.

Although the mechanism of coloring and decoloring is not clarified in detail, it is understood that a small amount of water contained in the WO ₃ thin film and the insulating film (ion conductive layer) controls coloring and decoloring of WO _3. ing. The coloring reaction equation is estimated as follows.

^{_{Cathode: H 2 O → H + +}} OH - WO 3 + nH + + ne - → H n WO 3 ( colorless) (blue) _{^{anode: OH - → 1 / 2H 2}} O + 1 / 4O 2 ↑ + 1 / 2e - Incidentally, At least one of the pair of electrode layers sandwiching the EC layer directly or indirectly must be transparent in order to make the coloration of the EC layer visible to the outside.

Both must be transparent, especially for transmissive ECDs. Currently, Sn is the transparent electrode material.
_{O 2, In 2 O 3,} ITO ( a mixture of SnO ₂ and In ₂ O _3), but like ZnO are known, these materials are not a Senebanara thin to relatively transparency is poor, for this reason And for other reasons
The ECD is usually formed on a substrate such as a glass plate or a plastic plate. An example of the structure of such an ECD is shown in FIG.

In FIG. 4, 2 is a lower transparent electrode (for example, IT
O), 3 is a reversible electrolytic oxidation layer or an oxidation coloring EC layer (eg iridium oxide or hydroxide), 4 is an ion conductive layer (eg tantalum pentoxide), 5 is a reduction coloring EC layer (eg WO)
₃ ) and 6 respectively indicate an upper electrode / reflection layer (for example, Al), and basically, the ECD is configured only by the laminated structure of 2 to 6, but as described above, these ECDs are formed on the substrate (for example, glass). It is formed on the plate 1.

Reference numeral 7 is an ECD sealing material such as epoxy resin, and 8 is a protective sealing glass plate.

The laminated structure of the ECD to which the drive circuit of the present invention can be applied is not particularly limited, but as the structure of the solid ECD, for example, a four-layer structure such as an electrode layer / EC layer / ion conductive layer / electrode layer is used. , Electrode layer / reducing coloring EC layer / ion conductive layer / reversible electrolytic oxidation layer or oxidation coloring EC layer / electrode layer.

As the material of the transparent electrode, for example, SnO ₂ , In ₂ O ₃ , ITO or the like is used. Such an electrode layer is generally formed by a vacuum thin film forming technique such as vacuum deposition, ion plating or sputtering. (Reducing colorability) As the EC layer, WO ₃ , MoO ₃ or the like is generally used.

As the ion conductive layer, for example, silicon oxide, tantalum oxide, titanium oxide, aluminum oxide, niobium oxide, zirconium oxide, hafnium oxide, lanthanum oxide, magnesium fluoride or the like is used. These material thin film is an insulator for electrons by the production method, a proton (H ⁺⁾ and hydroxy ions ^- a good conductor for (OH). Cations are required for the color-erasing reaction of the EC layer, and H ⁺ ions and Li ⁺ ions must be contained in the EC layer and others. The H ⁺ ion does not have to be an ion from the beginning, and it suffices if the H ⁺ ion is generated when a voltage is applied,
Therefore, water may be contained instead of H ⁺ ions. This water is very small and sufficient, and often water that naturally enters from the atmosphere will also fade.

Either of the EC layer and the ion conductive layer may be on the upper side or the lower side. Further, a reversible electrolytic oxidation layer (or an oxidation coloring type EC layer) or a catalyst layer may be arranged with an ion conductive layer interposed between the EC layers. Examples of such a layer include iridium oxide or hydroxide, nickel, chromium, vanadium, ruthenium, rhodium and the like. These substances are substances that form the ion conductive layer or the transparent electrode layer, such as silicon oxide, tantalum oxide, titanium oxide, aluminum oxide, niobium oxide, zirconium oxide, hafnium oxide, lanthanum oxide, magnesium fluoride or tin oxide, indium oxide. ,
It may be dispersed in ITO or the like.

The opaque electrode layer may also serve as the reflection layer, and for example, a metal such as gold, silver, aluminum, chromium, tin, zinc, nickel, ruthenium, rhodium, stainless steel is used.

Here, for example, a glass substrate 1 having a length of 8 cm, a width of 15 cm, and a thickness of 1 mm is prepared, an ITO electrode layer is formed on the glass substrate 1, and then, a take-out portion 6a for the upper electrode 6 and a lower electrode layer are formed by photoetching or laser cutting. A groove was formed between the two. As a result, the extraction portion 6a, the lower electrode layer 2, and the extraction portion of the lower electrode that is continuous with the extraction portion 6a were formed.

Note that these patterns may be directly formed by mask-depositing ITO.

Next, an oxidation coloring layer 3 made of a mixture of iridium oxide and tin oxide, a tantalum oxide layer as the ion conductive layer 4, and a tungsten oxide layer as the reduction coloring EC layer 5 were sequentially formed.

Next, Al was vapor-deposited as the upper electrode layer 6. At this time, Al has one end in contact with the take-out portion 6a already formed on the substrate 1.

Finally, a large amount of epoxy resin encapsulant 7 is applied to the encapsulating glass plate 8, the ECD is adhered to the ECD, and the resin is left to stand to cure the epoxy resin, and the ECD shown in FIG.
Was produced. FIG. 4 is partially deformed and does not have an exact dimensional ratio.

In this ECD, light incident from the substrate 1 side is reflected by the upper electrode layer 6 because the upper electrode layer 6 is also Al and also serves as a reflection layer. Therefore, when the erasing voltage Vb = -1.0 V is applied. ,
The color disappears in about 1 second and the reflectance R is measured to be R
= 60%, R did not change even if the decoloring voltage Vb was continuously applied.

On the other hand, if the EC layer is colored, the reflected light will be
Since each of the 1EC layer 5 and the second EC layer 3 is transmitted twice, it is absorbed and the amount of reflected light is reduced, and as a result, the reflectance R is reduced.

Therefore, the coloring voltage Vc = from the drive power supply (Su) to this ECD
When + 1.35V was applied, R decreased to 16% in about 3 seconds, and even if the coloring voltage Vc was continuously applied, R did not change.

As a circuit for driving the ECD as described above, the circuit shown in FIG. ₁ excluding 8 (S ₁ ) and 9 (S ₂ ) has been used conventionally.

[Problems to be solved by the invention]

In the circuit shown in FIG. ₁ , the conventional circuit except 8 (S ₁ ) and 9 (S ₂ ) has the following problems when integrated into an IC in order to reduce the size and cost of the entire circuit. Occurs. Four switching of the switching transistor Tr ₁ to Tr ₄ for driving the _{ECD Tr 1: ON, Tr 2} ; OFF, Tr 3: OFF, Tr 4: by controlling the ON coloring ECD14. At this time, since the ECD 14 is equivalently a capacitor, electric charge is charged with the polarity shown in the figure. In order to remove the color from this colored (charged) state, Tr ₁ : OFF, Tr ₂ ; ON, Tr ₃ : ON, Tr ₄ : OFF are set and the charge is discharged.

At this time, the transistor type is the first from the IC circuit design perspective.
As shown in the figure, if Tr ₁ , Tr ₂ : pnp Tr ₃ , Tr ₄ : npn are used, a simple circuit using transistor on / off operation can be used.In that case, the current of the pnp transistors Tr ₁ and Tr ₂ Since the amplification factor is lower than that of the npn transistors Tr ₃ and Tr ₄ , the output impedance of Tr ₁ , Tr ₂ , Tr ₃ , Tr ₄ is Zo ₁ , Zo ₂ , Zo ₃ , Zo ₄ , respectively. Designed for Zo ₁ ＞ Z ₄
Or it is often Zo ₂ > Zo ₃ . That is, since the impedance of Tr ₂ and Tr ₃ is Zo ₂ > Zo ₃ , the negative potential of the ECD terminal T ₂ becomes lower when the colored state of the ECD is switched to the decolored state.

When the terminal T _{2 of the} ECD becomes a negative potential (about −0.3 V or less), the ECD is originally capacitive and has a capacitance proportional to the display area. Therefore, when the display area is increased, the capacitance increases accordingly. A large current flows from the IC circuit to the terminal T ₂ of the ECD, an unexpected current flows in the IC circuit, and the circuit malfunctions, or a large voltage in the reverse direction is applied to the PN junction to destroy the junction. , After all, IC may be destroyed.

For example, when the area of ECD is large, the capacitance is several μF to several F.
The IC circuit must be destroyed during the erasing operation.

In the above description, the case of decoloring is described, but the case of coloring from decoloring also includes the same problem although the degree is light.

That is, when the color is erased, the ECD is charged in the opposite direction to when it was colored. However, the charge amount is smaller than that at the time of coloring because the capacity of the ECD in the opposite direction is small. Therefore, there is a similar problem when erasing from decoloring, but the degree is light.

Therefore, an object of the present invention is to provide a circuit capable of driving the ECD in the color-decoloring mode without the IC malfunctioning or being destroyed.

[Means for solving problems]

Therefore, in the present invention, in the color change / erasure drive circuit of the ECD, at the time of changing the color change / color change state of the ECD, a protection circuit for preventing the occurrence of overvoltage or overcurrent which causes malfunction or destruction of the drive circuit is connected to the ECD terminal. The ECD color-erasing / erasing drive circuit was connected and provided.

[Action]

The protection circuit according to the present invention is, for example, at least an EC
It consists of a diode with a low forward voltage connected between the ECD terminal on the side that has a low voltage when D is colored and the negative electrode of the power supply.
In this case, when switching the direction of the ECD pin current to a negative potential, a diode with a low forward voltage (for example, a Schottky diode has a forward voltage of 0.3 V and a normal diode with a forward voltage of 0.6 V It is suppressed by the switching operation of 1/2). Further, the protection circuit according to the present invention is composed of, for example, at least a diode having a low forward voltage connected between the ECD terminal on the side which becomes a high voltage when the ECD is colored and the positive electrode of the power supply. In this case, when switching the current direction of the ECD pin, the way to rise to a positive potential is a diode with a low forward voltage (for example, a Schottky diode).
It is suppressed by the switching operation of.

Further, the protection circuit according to the present invention comprises, for example, at least a pair of circuits connected between a positive electrode and a negative electrode of a power source, each circuit being a series connection circuit of two switching elements, The ECD terminal is connected between the series connection points, and it is set lower than the output impedance of the two switching elements connected to the front electrode. In this case, the output impedance of the transistor connected to the positive side of the power supply is set to the negative side by making the current flowing through the base of the transistor connected to the positive side of the power supply larger than that of the transistor connected to the negative side. By making it smaller than that of the transistor connected to the ECD terminal, it is possible to prevent the ECD terminal from falling to a negative potential at the time of coloration / erasing, that is, at the time of switching the current direction. Further, the protection circuit according to the present invention comprises, for example, at least a pair of circuits connected between a positive electrode and a negative electrode of a power source, each circuit being a series connection circuit of two switching elements, The ECD terminal is connected between the series connection points, and the output impedance of the two switching elements connected to the positive electrode is set higher than the output impedance of the two switching elements connected to the negative electrode. . In this case, by setting the output impedance of the transistor connected to the positive side of the power supply to be larger than that of the transistor connected to the negative side, the positive potential of the ECD terminal at the time of switching the direction of the color fading / erasing current is changed. Suppress the way you go up.

Further, the protection circuit according to the present invention comprises, for example, at least a pair of circuits connected between a positive electrode and a negative electrode of a power source, each circuit including a resistor and a diode connected in series, and the series connection. It consists of a transistor whose base is connected between points and whose emitter is connected to the ECD terminal. In this case, when the ECD terminal becomes 0 V or less or becomes higher than the positive electrode potential of the power supply, the limit circuit is activated to decrease the ECD terminal to a negative potential at the time of color fading, that is, when switching the direction of current, or to a positive potential. Suppresses how to rise to the potential.

〔Example〕

FIG. 1 shows a first embodiment. In FIG. 1, a circuit surrounded by a chain line is an ECD drive circuit (DR), which is an IC circuit formed on a silicon substrate by an IC process. Reference numeral 10 is a power supply, 12 is a coloring / discoloring control circuit, and SW is a switch. When the switch SW is turned on, a high voltage (H) is output to the output terminal T ₅ of the coloring / discoloration control circuit 12, and when it is turned off, the voltage is lowered. Output voltage (L). 14 is an ECD, Tr ₁ and Tr ₂ are pnp transistors, Tr _{3 to} Tr ₇ are npn transistors, R _{1 to} R ₁₀ are resistors, and T ₁ and T ₂ ECD terminals are terminals for passing a coloring / erasing drive current. . T ₃ and T ₄ are power input terminals of the ECD drive circuit. ECD14
The ECD terminals T ₁ and T ₂ of the
The cathodes of S ₁ and S ₂ are connected, and the anodes of the Schottky diodes S ₁ and S ₂ are connected to the negative electrode (0V) of the power supply 10. Here, the Schottky diode has a forward voltage of a normal junction voltage of silicon (0.6V).
Lower, 0.3V, it is a suitable diode for fast switching operation. In the present embodiment, Schottky diodes S ₁ and S ₂ are connected between the ECD terminal and the negative electrode (0 V) of the power source 10 to switch the color of the ECD on / off (when using the ECD 14 as a capacitor to charge and discharge the capacitor). ), The ECD terminals T ₁ and T ₂ potentials are about −0.
Configure so that it does not drop below 3V.

The operation of the ECD drive circuit having the above configuration will be described below.

Turn on / off the switch SW for coloring.
The output terminal T ₅ becomes high voltage, the transistor Tr 5 turns on, and the transistor Tr 1 turns on. On the other hand, transistor Tr7
Turns on, transistor Tr6 turns off and transistor Tr
Is turned off and the transistor Tr7 is turned on, so that the transistor Tr3 is turned off. Further, when the transistor Tr5 is turned on, the transistor Tr4 is turned on. That is, transistors Tr ₁ and Tr ₄ are turned on, Tr ₂ and Tr ₃ are turned off,
ECD14 is colored current flows from the ECD terminal T ₁ to T _2. At this time, the ECD 14 is charged with electric charges having the illustrated polarities. When charging is completed, almost no current flows in the ECD 14 and the color is retained, so the power consumption for retaining the color is extremely low.

The switch SW is turned off to erase the ECD 14 colored as described above. Then, the output terminal of the color fading control circuit 12
T ₅ is the transistor Tr5 is turned off and the low voltage, the transistor Tr1 is turned off. On the other hand, the transistor Tr7 is turned off, the transistor Tr6 is turned on, the transistor Tr2 is turned on, and the transistor Tr7 is turned off.
Turns on. Further, when the transistor Tr5 is turned off, the transistor Tr4 is turned off. That is, the transistors Tr ₁ , T
r ₄ is turned OFF, Tr _2, Tr ₃ is turned on, ECD14 is current decoloring flows from ECD terminal T ₂ to T _1. At that time, ECD terminal T ₂
Has a negative potential, but the Schottky diode S ₂ operates at high speed so that the potential of the ECD terminal T ₂ does not drop below −0.3V.

Here, since the ECD has a low capacity in the color erasing direction, when the color is completely erased, the ECD 14 is charged with a charge opposite to the polarity shown in the figure. However, the amount of charge that is charged is small.

When the switch SW is turned on again for coloring from this state, the above-mentioned operation is performed. At this time, the ECD terminal T ₁ becomes a negative potential, but the Schottky diode S ₁ switches at high speed, and the ECD terminal T ₁ It operates so that the potential of may not drop below -0.3V.

In this way, the ECD terminals T ₁ and T ₂ do not have a potential of -0.3 V or less when changing colors, so the ECD terminal voltage is 0.3
Since it does not exceed V and does not exceed the forward voltage of 0.6V of the pn junction of the IC circuit formed by the silicon substrate, a large current flows from the IC drive circuit, causing the circuit to malfunction or destroying the IC circuit. There is nothing to do.

Incidentally, the Schottky diode in this embodiment has been illustrated an example of connecting to both ECD terminals T _1, T _2, circuit protection of the Schottky diode S ₁ (when coloring operation to be connected to ECDT terminal T ₁ is the circuit design Can be omitted.

As described above, the first embodiment is solved by providing external elements (Schottky diodes S ₁ and S ₂ ) in the IC drive circuit.

 Next, a second embodiment will be described.

The second embodiment shows an example in which processing is performed inside the IC circuit.
The second embodiment has the merit of being smaller than the first embodiment in that there is no external element, but the design of the IC circuit becomes complicated. The reason is that the current amplification factor of the pnp transistor is considerably lower than that of the npn transistor as described above.

In FIG. 2, the same reference numerals as those in FIG. 1 represent the same effects, and the description thereof will be omitted.

The transistor Tr ₁ ′ and the transistor Tr ₂ ′ are npn transistors in this embodiment. Therefore, since the transistors Tr ₁ ′, Tr ₂ ′, Tr ₃ ′ and Tr ₄ that directly drive the ECD are all npn transistors, there is almost no difference in current amplification factor between them.

In FIG. 2, Tr ₁₀ to Tr ₁₈ are transistors, of which transistors Tr ₁₃ and Tr ₁₈ are multi-collectors,
It has four collectors. Four multi-three in collector transistor Tr ₁ of the transistor Tr ₁₃ 'to the base of one being connected to the base of the transistor Tr _4, three in four multi-collector of the transistor Tr ₁₈ is transistor Tr _2' , And one is connected to the base of the transistor Tr ₃ , respectively. That is, transistor Tr ₁ ′ and transistor Tr ₄ , transistor Tr ₂ ′ and transistor Tr 4
The base current to ₃ is set to 3: 1 according to the collector current ratio of the transistor Tr ₁₃ and the transistor Tr ₁₈ . I _{1 to} I ₃ are constant current sources, and R ₁₁ and R ₁₂ are resistors. If the output impedance of transistors Tr ₁ ′, Tr ₂ ′, Tr ₃ and Tr ₄ is Zo ₁ ′, Zo ₂ ′, Zo ₃ and Zo ₄ , respectively, then Zo ₁ ′ <Z
o ₄ , Zo ₂ ′ <Zo _{3, that} is, the impedance of the switching element connected to the positive side of the power supply is lower.

The constant current source I ₁ , the transistor Tr _11, and the transistor Tr
₁₂ and constant current source I ₂ and transistor Tr ₁₆ and transistor Tr
Reference numeral ₁₇ constitutes a so-called current mirror circuit. In the circuit shown in FIG. 2, the circuit is configured so that when the output of the coloring / decoloring control circuit 12 is H, the color is decolored, and when the output is L, the color is colored.

The operation of the ECD drive circuit having the above configuration will be described below.

Turn on / off the switch SW for coloring.
The output terminal T ₅ becomes low voltage, the transistor Tr ₁₀ is turned off, the transistor Tr ₁₁ is turned on and the transistor Tr ₁₂ is turned on, so that the transistor Tr ₁₃ is turned on and the transistor Tr ₁ ′ is turned on. When the transistor Tr ₁₃ turns on, the transistor Tr ₄ turns on. Here, the ratio of the base currents of the transistor Tr ₁ ′ and the transistor Tr ₄ is 3: 1. On the other hand, when the output terminal T ₅ of the coloring / erasing color control circuit 12 becomes a low voltage, the transistor Tr ₁₄ is turned off, the transistor Tr ₁₅ is turned on, the transistor Tr ₁₆ is turned off, the transistor Tr ₁₇ is turned off, and the transistor Tr ₁₈ is turned on. When it is turned off, the transistor Tr ₂ ′ is turned off, and when the transistor Tr ₁₈ is turned off, the transistor Tr ₃ is turned off. That is, transistors Tr ₁ ′ and Tr ₄ are turned on, Tr ₂ ′ and Tr ₃ are turned off, and ECD 14 is connected to ECD terminal T ₁
Current flows from T to T ₂ to cause coloration. At this time, the ECD 14 is charged with electric charges having the illustrated polarities. When the charging is completed, almost no current flows in the ECD 14, and the coloring is retained, so that the current consumption for maintaining the coloring is extremely small.

The switch SW is turned off to erase the ECD 14 colored as described above. Then, the output terminal of the color fading control circuit 12
T ₅ is operated as on-off of the transistor becomes high voltage is reversed. That is, transistors Tr ₁ ′ and Tr ₄ are off, Tr ₂ ′ and Tr ₃ are on, and ECD 14 is ECD terminal T ₂ to T
_The current flows to ₁ and the color disappears. At that time ECD terminal T ₂ are becomes a negative potential, the distribution connection of the multi-collector transistor Tr _18, the output impedance is the ECD terminal T ₂ of the potential so are lower than the output impedance of the Tr ₃ of Tr ₂ ' The operation is performed so that the decrease of V is extremely short.

Since the ECD14 has a low capacity in the erasing direction,
When the color is completely erased, the ECD 14 is charged with a charge opposite to the polarity shown in the figure. However, the amount of charge that is charged is small.

When the switch SW is turned on again for coloring from this state, the above operation is performed.At this time, the ECD terminal T ₁ becomes a negative potential, but the output impedance of Tr ₁ ′ is Since it is set lower than the output impedance of Tr ₄ , the potential of the ECD terminal T ₁ is lowered for an extremely short time.

In this way, the ECD terminals T ₁ and T ₂ are designed so that their potentials do not fall below a large negative potential of at least -0.6V when changing color, so the ECD terminal voltage does not exceed -0.6V.
Since the forward voltage of the pn junction of the IC circuit formed by the silicon substrate does not exceed 0.6V, a large current does not flow from the IC drive circuit to cause the circuit to malfunction or destroy the IC circuit.

In this embodiment, the transistor Tr ₁₈ and the transistor Tr
Although an example is shown in which both Tr ₁₃ are multi-collector, depending on the circuit design, the measures to prevent the potential drop of the ECD terminal T ₁ , that is, the distributed connection of the multi-collector of the transistor Tr ₁₃ (for circuit protection during coloring operation) is omitted. It is also possible to do.

As described above, the second embodiment is solved within the IC circuit without adding an external element to the IC drive circuit.

FIG. 3 is a third embodiment and shows an example in which processing is performed inside the IC circuit as in the second embodiment. The third embodiment is basically the same circuit as the first embodiment, and the first circuit is the same as the second embodiment.
Compared with the above embodiment, there is no external element, and there is an advantage such as small size.

In FIG. 3, the same reference numerals as those in FIGS. 1 and 2 represent the same effects, and the description thereof will be omitted.

In the third invention, a series circuit of a resistance R _A and a diode D _{A and} a series circuit of a resistance R ₈ diode D _B are respectively connected to the positive and negative electrodes of a power supply, and a transistor Tr _A and a transistor Tr _A are connected to the series connection points. Connect the bases of the transistors Tr _B ,
The emitters of the transistors Tr _A and Tr _B are connected to ECD terminals T ₁ and T
Respectively ₂ to connect to as configured for connecting the collector of the transistor Tr _A and Tr _B to a positive electrode of the power source, the transistor Tr _A and Tr _B constitutes the emitter follower.

The operation of the third embodiment constructed as described above is performed when ECD terminal T ₁ and
When the potential of T ₂ drops and reaches 0V, the transistor Tr _A or Tr _B operates and the emitter potential, that is, the potential of the ECD terminal does not fall below 0V.

In the description of the above embodiment, the IC of the ECD drive circuit DR has been described as a P substrate, so that the potentials of the ECD terminals T ₁ and T ₂ are not at least 0.6V or less than the negative electrode potential (0V) of the power source. Although configured as described above, the present invention is not limited to this, and is naturally applied to an ECD drive circuit DR using an IC on an N substrate. In case of N substrate, the ECD terminal potential is the positive electrode potential (V
_CC) from 0.6V or more words (since V _CC +0.6) may be configured such that it not more than V is evident from in the described P substrate. Therefore, the circuit configuration and operation control of the above-mentioned three inventions in the case of the N substrate are omitted.

〔The invention's effect〕

According to the present invention, since the terminal potential of the ECD during the erasing operation does not become the potential at which the IC malfunctions, the IC circuit does not malfunction and the IC
There is no such thing as destroying.

[Brief description of drawings]

1 to 3 are circuit diagrams showing the present invention, and FIG. 4 is an explanatory diagram showing an example of the structure of an ECD. (Description of symbols of main parts) 1 ... Glass substrate 2 ... Lower transparent electrode layer 3 ... Oxidative coloring EC layer 4 ... Ion conductive layer 5 ... Reduction coloring EC layer 6 ... Upper electrode layer 10 … Power supply 12 …… Color control circuit 14 …… ECD S ₁ , S ₂ …… Schottky diode Tr _{1 to} Tr ₁₈ …… Transistor DR …… ECD drive circuit

Claims (6)

(57) [Claims] 1. An ECD color change / erasure drive circuit, wherein a protection circuit is connected to the ECD terminal to prevent the occurrence of overvoltage or overcurrent that causes malfunction or destruction of the drive circuit when the ECD color change / color fade state is switched. E that is characterized by
CD color fader drive circuit. 2. The protection circuit comprises at least a diode having a low forward voltage connected between an ECD terminal on the side which becomes a low voltage when the ECD is colored and a negative electrode of a power supply. An ECD coloring / erasing color driving circuit according to the first section. 3. The protection circuit comprises at least a diode having a low forward voltage connected between an ECD terminal on the side which becomes a high voltage when the ECD is colored and a positive electrode of a power supply. An ECD coloring / erasing color driving circuit according to the first section. 4. The protection circuit comprises at least a pair of circuits connected between a positive electrode and a negative electrode of a power source, each circuit being a series connection circuit of two switching elements, and the series connection point. An ECD terminal is connected in between, and the output impedance of the two switching elements connected to the positive electrode is set lower than the output impedance of the two switching elements connected to the negative electrode. An ECD coloring / erasing color driving circuit according to claim 1. 5. The protection circuit comprises at least a pair of circuits connected between a positive electrode and a negative electrode of a power source, each circuit being a series connection circuit of two switching elements, and the series connection point. An ECD terminal is connected in between, and the output impedance of the two switching elements connected to the positive electrode is set higher than the output impedance of the two switching elements connected to the negative electrode. An ECD coloring / erasing color driving circuit according to claim 1. 6. The protection circuit comprises at least a pair of circuits connected between a positive electrode and a negative electrode of a power source, each circuit comprising a resistor and a diode connected in series and between the series connection points. The ECD color-erasing / erasing drive circuit according to claim 1, comprising a transistor having a base connected and an emitter connected to an ECD terminal.