JP2500756B2 - Semiconductor device module - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device module.

[0002]

2. Description of the Related Art In a conventional semiconductor device module, for example, as shown in FIG. 4, a plurality of leadless chip carriers are used in order to increase the packing density, and these are stacked and mounted to form a three-dimensional memory unit. (For example, Japanese Patent Laid-Open No. 62-154637). In FIG. 4, the leadless chip carriers 1a to 1n are mounted with a semiconductor memory and then sealed with a sealing cap 8, and the side electrodes 2a to 2n, 3.1a to of the leadless chip carriers 1a to 1n.
3.1n, 3.2a to 3.2n are stacked so as to correspond to each signal, and the side electrodes 2a to 2n, 3.n.
A three-dimensional memory unit is configured by filling 1a to 3.1n and 3.2a to 3.2n with solder. The leadless chip carrier 1n, which is the lowermost portion of the memory unit, is mounted on the mounting pads 4 and 5 of the printed wiring board 7 by soldering. Further, individual signals for each semiconductor memory such as a chip select signal are separately wired to the individual signal pads 6 provided on the printed wiring board 7 by wiring or the like. For example, the chip select signal side electrode 2a of the leadless chip carrier 1a and the chip select signal side electrode 2b of the leadless chip carrier 1b need to be handled separately, and the chip select signal side electrodes 2a and 2b and the individual signal are required. Wiring was performed between the pad 6 and the pad. In this way, signals that can be handled in common, such as address signals, data signals, control signals other than chip select, are connected by soldering the side electrodes, and chip select signals that need to be handled individually are wired separately. It was

[0003]

This conventional semiconductor memory module has a problem in that signals that must be handled individually, such as chip select signals, must be separately wired to a printed wiring board. It was Further, since the leadless chip carriers are stacked and the connection between the leadless chip carriers is performed by soldering, there is a problem that the memory cannot be expanded or contracted freely and easily.

[0004]

According to the semiconductor device module of the present invention, the endless through-hole electrodes of the stacked leadless chip carriers are not connected by soldering, but a flat space into which the leadless chip carriers are just inserted is provided. It has a three-dimensional mounting case. The mounting case has a signal line that can come into contact with the end surface through-hole electrode. For the end surface through-hole electrodes that need to be handled as individual signals such as chip select, the signal line on the mounting case side is configured separately from other common signal lines.

An insulating sheet is inserted between each of the laminated leadless chip carriers so that the entire layers are
The spring is pressed toward the bottom surface of the mounting case, and further, the wiring pattern on the inner surface of the mounting case is pressed inward to be crimped and connected to the end surface through-hole electrode of the leadless chip carrier.

[0006]

The present invention will be described below with reference to the drawings. FIG. 1 is a perspective perspective view of a semiconductor device module according to an embodiment of the present invention. A leadless chip carrier 1 having a semiconductor memory mounted thereon has end face through-hole electrodes 3, and a plurality of leadless chip carriers 1 can be housed in the mounting case 13 in the same direction. The mounting case 13 has a signal line 9 that can be brought into contact with the end surface through-hole electrode 3 of the leadless chip carrier 1 by pressure bonding. As a mounting method, a plurality of leadless chip carriers 1 are put in the mounting case in the same direction.
At this time, the insulating sheet 10 is inserted between the stacked leadless chip carriers 1. After stacking in this way, the pressing substrate 1 for pressing the leadless chip carrier 1
1 is pressed and fixed by the spring 12. Then signal line 9
To contact the end surface through-hole electrode 3 with the lever 1
Turn 4. When the lever 14 is turned, the signal line 9 is moved inward, and the signal line 9 is pressure-bonded to the end surface through-hole electrode 3 to make contact therewith. FIG. 2 is a plan view of the mounting case 13. FIG. 3 is an enlarged view of a portion where the end surface through-hole electrode 3 and the signal line 9 are in contact with each other. Regarding the signal lines that need to be handled as individual signals such as the chip select signal, the signal lines individually run inside the mounting case 13 and come out to the bottom surface side of the mounting case.
The mounting method for mounting the mounting case on the board is such that leads are provided on the bottom surface of the mounting case and socket mounting or soldering mounting is possible.

[0007]

As described above, according to the present invention, the leadless chip carriers are three-dimensionally stacked on the mounting case,
Since the semiconductor memory module is in contact with the signal line provided in the mounting case by pressure bonding, there is an effect that the memory can be expanded and contracted freely and easily. Also, regarding signal lines that need to be treated as separate signals such as chip select signals, they are independently guided inside the mounting case to the bottom side of the mounting case and connected to external leads. Since it is only necessary to insert it into the socket or solder it, it is very simple without the need for wiring to the mounting substrate. For example, when expanding the memory of a PC, etc., if the mounting case is attached to the PC body, there is an effect that the memory can be expanded by simply inserting the leadless chip carrier equipped with the semiconductor memory into the mounting case. .

[Brief description of drawings]

FIG. 1 is a perspective perspective view of an embodiment of a semiconductor device module of the present invention.

FIG. 2 is a plan view of the mounting case of the embodiment shown in FIG.

FIG. 3 is an enlarged view of a contact portion between a signal line and an end surface electrode of the embodiment shown in FIG.

FIG. 4 is a perspective view of a conventional semiconductor device module.

[Explanation of symbols]

 1 Leadless Chip Carrier 3 End Through Hole Electrode 9 Signal Line 10 Insulating Sheet 11 Holding Board 12 Spring 13 Mounting Case 14 Lever 15 External Lead

Claims (4)

(57) [Claims] 1. A semiconductor device module comprising a leadless chip carrier having end face through-hole electrodes on its side surfaces, wherein a plurality of the leadless chip carriers are stacked in a mounting case having a wiring pattern in its frame. A semiconductor device module characterized by: 2. The semiconductor device module according to claim 1, wherein an insulating sheet is inserted between adjacent leadless chip carriers of the plurality of stacked leadless chip carriers. 3. The semiconductor device module according to claim 1, wherein the plurality of stacked leadless chip carriers are pressed toward the bottom surface of the mounting case by a spring. 4. The semiconductor device module according to claim 1, wherein the wiring pattern is pressed toward the inner side of the mounting case and pressure-bonded to the end surface through-hole electrode on the side surface of the leadless chip carrier.