JP2024545406A - ２ステージアドレス変換 - Google Patents

２ステージアドレス変換 Download PDF

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Publication number
JP2024545406A
JP2024545406A JP2024529452A JP2024529452A JP2024545406A JP 2024545406 A JP2024545406 A JP 2024545406A JP 2024529452 A JP2024529452 A JP 2024529452A JP 2024529452 A JP2024529452 A JP 2024529452A JP 2024545406 A JP2024545406 A JP 2024545406A
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JP
Japan
Prior art keywords
stage
translation table
entry
address
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2024529452A
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English (en)
Japanese (ja)
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JP2024545406A5 (https=
Inventor
ロイ グリセンスウェイト、リチャード
Original Assignee
アーム・リミテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by アーム・リミテッド filed Critical アーム・リミテッド
Publication of JP2024545406A publication Critical patent/JP2024545406A/ja
Publication of JP2024545406A5 publication Critical patent/JP2024545406A5/ja
Pending legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1009—Address translation using page tables, e.g. page table structures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1036—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/109—Address translation for multiple virtual address spaces, e.g. segmentation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/1425—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
    • G06F12/1441—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a range
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/145—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being virtual, e.g. for virtual blocks or segments before a translation mechanism
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1466—Key-lock mechanism
    • G06F12/1475—Key-lock mechanism in a virtual system, e.g. with translation means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1483—Protection against unauthorised use of memory or access to memory by checking the subject access rights using an access-table, e.g. matrix or list
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1491—Protection against unauthorised use of memory or access to memory by checking the subject access rights in a hierarchical protection system, e.g. privilege levels, memory rings
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/52—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
    • G06F21/53—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow by executing in a restricted environment, e.g. sandbox or secure virtual machine
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/74—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information operating in dual or compartmented mode, i.e. at least one secure mode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533—Hypervisors; Virtual machine monitors
    • G06F9/45558—Hypervisor-specific management and integration aspects
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533—Hypervisors; Virtual machine monitors
    • G06F9/45558—Hypervisor-specific management and integration aspects
    • G06F2009/45583—Memory management, e.g. access or allocation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1052—Security improvement
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/15—Use in a specific computing environment
    • G06F2212/151—Emulated environment, e.g. virtual machine
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/651—Multi-level translation tables
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/657—Virtual address space management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Storage Device Security (AREA)
JP2024529452A 2021-11-30 2022-04-28 ２ステージアドレス変換 Pending JP2024545406A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB2117274.7A GB2613350B (en) 2021-11-30 2021-11-30 Two-stage address translation
GB2117274.7 2021-11-30
PCT/GB2022/051073 WO2023099860A1 (en) 2021-11-30 2022-04-28 Two-stage address translation

Publications (2)

Publication Number Publication Date
JP2024545406A true JP2024545406A (ja) 2024-12-06
JP2024545406A5 JP2024545406A5 (https=) 2025-04-30

Family

ID=79270214

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2024529452A Pending JP2024545406A (ja) 2021-11-30 2022-04-28 ２ステージアドレス変換

Country Status (8)

Country Link
US (1) US12461861B2 (https=)
EP (1) EP4441617B1 (https=)
JP (1) JP2024545406A (https=)
KR (1) KR20240109286A (https=)
CN (1) CN118339542A (https=)
GB (1) GB2613350B (https=)
IL (1) IL312735A (https=)
WO (1) WO2023099860A1 (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2625550A (en) * 2022-12-20 2024-06-26 Advanced Risc Mach Ltd Apparatus, method and computer program, for performing translation table entry load/store operation
GB2637714A (en) * 2024-01-31 2025-08-06 Advanced Risc Mach Ltd Attribute information
GB2637715B (en) * 2024-01-31 2026-04-01 Advanced Risc Mach Ltd Attribute information
CN118227521B (zh) * 2024-05-23 2024-07-30 摩尔线程智能科技(北京)有限责任公司 一种页表生成方法、验证方法及装置
KR20260024865A (ko) 2024-08-14 2026-02-23 주식회사 엘지에너지솔루션 전지셀 온도 측정 장치 및 이를 이용한 전지셀 온도 측정 방법
CN119127546B (zh) * 2024-08-26 2025-06-20 北京微核芯科技有限公司 处理器页表修改引起缺页异常的验证方法及装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110010483A1 (en) * 2007-06-28 2011-01-13 Nokia Corporation Memory protection unit in a virtual processing environment
JP2016009882A (ja) * 2014-06-20 2016-01-18 株式会社東芝 メモリ管理装置、プログラム、及び方法
JP2016521425A (ja) * 2013-05-13 2016-07-21 エイアールエム リミテッド ページ・テーブル・データ管理
JP2018531462A (ja) * 2015-10-14 2018-10-25 エイアールエム リミテッド 例外処理

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7814287B2 (en) * 2005-07-15 2010-10-12 Xensource, Inc. Using writeable page tables for memory address translation in a hypervisor environment
US10019583B2 (en) * 2016-04-01 2018-07-10 Samsung Electronics Co., Ltd. Method and apparatus for performing protected walk-based shadow paging using multiple stages of page tables
US11526584B2 (en) * 2019-10-14 2022-12-13 International Business Machines Corporation Apparatus, systems, and methods for assigning access permission to social media

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110010483A1 (en) * 2007-06-28 2011-01-13 Nokia Corporation Memory protection unit in a virtual processing environment
JP2016521425A (ja) * 2013-05-13 2016-07-21 エイアールエム リミテッド ページ・テーブル・データ管理
JP2016009882A (ja) * 2014-06-20 2016-01-18 株式会社東芝 メモリ管理装置、プログラム、及び方法
JP2018531462A (ja) * 2015-10-14 2018-10-25 エイアールエム リミテッド 例外処理

Also Published As

Publication number Publication date
EP4441617B1 (en) 2025-08-06
WO2023099860A1 (en) 2023-06-08
EP4441617A1 (en) 2024-10-09
US20250021487A1 (en) 2025-01-16
GB2613350A (en) 2023-06-07
KR20240109286A (ko) 2024-07-10
CN118339542A (zh) 2024-07-12
IL312735A (en) 2024-07-01
GB2613350B (en) 2024-02-07
US12461861B2 (en) 2025-11-04
EP4441617C0 (en) 2025-08-06
GB202117274D0 (en) 2022-01-12

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