GB2613350B - Two-stage address translation - Google Patents

Two-stage address translation Download PDF

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Publication number
GB2613350B
GB2613350B GB2117274.7A GB202117274A GB2613350B GB 2613350 B GB2613350 B GB 2613350B GB 202117274 A GB202117274 A GB 202117274A GB 2613350 B GB2613350 B GB 2613350B
Authority
GB
United Kingdom
Prior art keywords
address translation
stage address
stage
translation
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
GB2117274.7A
Other languages
English (en)
Other versions
GB2613350A (en
GB202117274D0 (en
Inventor
Roy Grisenthwaite Richard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ARM Ltd
Original Assignee
ARM Ltd
Advanced Risc Machines Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ARM Ltd, Advanced Risc Machines Ltd filed Critical ARM Ltd
Priority to GB2117274.7A priority Critical patent/GB2613350B/en
Publication of GB202117274D0 publication Critical patent/GB202117274D0/en
Priority to US18/711,242 priority patent/US12461861B2/en
Priority to EP22721449.1A priority patent/EP4441617B1/en
Priority to JP2024529452A priority patent/JP2024545406A/ja
Priority to KR1020247021069A priority patent/KR20240109286A/ko
Priority to PCT/GB2022/051073 priority patent/WO2023099860A1/en
Priority to CN202280078994.1A priority patent/CN118339542A/zh
Priority to IL312735A priority patent/IL312735A/en
Publication of GB2613350A publication Critical patent/GB2613350A/en
Application granted granted Critical
Publication of GB2613350B publication Critical patent/GB2613350B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1009Address translation using page tables, e.g. page table structures
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/109Address translation for multiple virtual address spaces, e.g. segmentation
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1027Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1036Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1416Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/1425Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
    • G06F12/1441Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a range
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1416Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/145Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being virtual, e.g. for virtual blocks or segments before a translation mechanism
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1458Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1458Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1466Key-lock mechanism
    • G06F12/1475Key-lock mechanism in a virtual system, e.g. with translation means
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1458Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1483Protection against unauthorised use of memory or access to memory by checking the subject access rights using an access-table, e.g. matrix or list
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1458Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1491Protection against unauthorised use of memory or access to memory by checking the subject access rights in a hierarchical protection system, e.g. privilege levels, memory rings
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/52Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
    • G06F21/53Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow by executing in a restricted environment, e.g. sandbox or secure virtual machine
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/74Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information operating in dual or compartmented mode, i.e. at least one secure mode
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • G06F2009/45583Memory management, e.g. access or allocation
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1016Performance improvement
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1052Security improvement
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/15Use in a specific computing environment
    • G06F2212/151Emulated environment, e.g. virtual machine
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65Details of virtual memory and virtual address translation
    • G06F2212/651Multi-level translation tables
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65Details of virtual memory and virtual address translation
    • G06F2212/657Virtual address space management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Storage Device Security (AREA)
GB2117274.7A 2021-11-30 2021-11-30 Two-stage address translation Active GB2613350B (en)

Priority Applications (8)

Application Number Priority Date Filing Date Title
GB2117274.7A GB2613350B (en) 2021-11-30 2021-11-30 Two-stage address translation
KR1020247021069A KR20240109286A (ko) 2021-11-30 2022-04-28 2 스테이지 어드레스 변환
EP22721449.1A EP4441617B1 (en) 2021-11-30 2022-04-28 Two-stage address translation
JP2024529452A JP2024545406A (ja) 2021-11-30 2022-04-28 2ステージアドレス変換
US18/711,242 US12461861B2 (en) 2021-11-30 2022-04-28 Two-stage address translation
PCT/GB2022/051073 WO2023099860A1 (en) 2021-11-30 2022-04-28 Two-stage address translation
CN202280078994.1A CN118339542A (zh) 2021-11-30 2022-04-28 两阶段地址转换
IL312735A IL312735A (en) 2021-11-30 2022-04-28 Two-stage address translation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2117274.7A GB2613350B (en) 2021-11-30 2021-11-30 Two-stage address translation

Publications (3)

Publication Number Publication Date
GB202117274D0 GB202117274D0 (en) 2022-01-12
GB2613350A GB2613350A (en) 2023-06-07
GB2613350B true GB2613350B (en) 2024-02-07

Family

ID=79270214

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2117274.7A Active GB2613350B (en) 2021-11-30 2021-11-30 Two-stage address translation

Country Status (8)

Country Link
US (1) US12461861B2 (https=)
EP (1) EP4441617B1 (https=)
JP (1) JP2024545406A (https=)
KR (1) KR20240109286A (https=)
CN (1) CN118339542A (https=)
GB (1) GB2613350B (https=)
IL (1) IL312735A (https=)
WO (1) WO2023099860A1 (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2625550A (en) * 2022-12-20 2024-06-26 Advanced Risc Mach Ltd Apparatus, method and computer program, for performing translation table entry load/store operation
GB2637714A (en) * 2024-01-31 2025-08-06 Advanced Risc Mach Ltd Attribute information
GB2637715B (en) * 2024-01-31 2026-04-01 Advanced Risc Mach Ltd Attribute information
CN118227521B (zh) * 2024-05-23 2024-07-30 摩尔线程智能科技(北京)有限责任公司 一种页表生成方法、验证方法及装置
KR20260024865A (ko) 2024-08-14 2026-02-23 주식회사 엘지에너지솔루션 전지셀 온도 측정 장치 및 이를 이용한 전지셀 온도 측정 방법
CN119127546B (zh) * 2024-08-26 2025-06-20 北京微核芯科技有限公司 处理器页表修改引起缺页异常的验证方法及装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070016755A1 (en) * 2005-07-15 2007-01-18 Ian Pratt Using writeable page tables for memory address translation in a hypervisor environment
US20170286694A1 (en) * 2016-04-01 2017-10-05 Samsung Electronics Co., Ltd. Method and apparatus for performing protected walk based shadow paging

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009001153A1 (en) * 2007-06-28 2008-12-31 Nokia Corporation Memory protection unit in a virtual processing environment
GB2514107B (en) * 2013-05-13 2020-07-29 Advanced Risc Mach Ltd Page table data management
JP6162652B2 (ja) * 2014-06-20 2017-07-12 株式会社東芝 メモリ管理装置、プログラム、及び方法
GB2543306B (en) * 2015-10-14 2019-05-01 Advanced Risc Mach Ltd Exception handling
US11526584B2 (en) * 2019-10-14 2022-12-13 International Business Machines Corporation Apparatus, systems, and methods for assigning access permission to social media

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070016755A1 (en) * 2005-07-15 2007-01-18 Ian Pratt Using writeable page tables for memory address translation in a hypervisor environment
US20170286694A1 (en) * 2016-04-01 2017-10-05 Samsung Electronics Co., Ltd. Method and apparatus for performing protected walk based shadow paging

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
COMPUTERS & SECURITY, vol 72, 2017, SHEN DONG ET AL, "TinyVisor: An extensible secure framework on android platforms", pages 145-162 *

Also Published As

Publication number Publication date
EP4441617B1 (en) 2025-08-06
WO2023099860A1 (en) 2023-06-08
JP2024545406A (ja) 2024-12-06
EP4441617A1 (en) 2024-10-09
US20250021487A1 (en) 2025-01-16
GB2613350A (en) 2023-06-07
KR20240109286A (ko) 2024-07-10
CN118339542A (zh) 2024-07-12
IL312735A (en) 2024-07-01
US12461861B2 (en) 2025-11-04
EP4441617C0 (en) 2025-08-06
GB202117274D0 (en) 2022-01-12

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