JP2024541487A5 - - Google Patents

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Publication number
JP2024541487A5
JP2024541487A5 JP2024531095A JP2024531095A JP2024541487A5 JP 2024541487 A5 JP2024541487 A5 JP 2024541487A5 JP 2024531095 A JP2024531095 A JP 2024531095A JP 2024531095 A JP2024531095 A JP 2024531095A JP 2024541487 A5 JP2024541487 A5 JP 2024541487A5
Authority
JP
Japan
Prior art keywords
secure
processor core
thread
program code
operation parameter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2024531095A
Other languages
English (en)
Japanese (ja)
Other versions
JP2024541487A (ja
Filing date
Publication date
Priority claimed from US17/457,449 external-priority patent/US12314755B2/en
Application filed filed Critical
Publication of JP2024541487A publication Critical patent/JP2024541487A/ja
Publication of JP2024541487A5 publication Critical patent/JP2024541487A5/ja
Pending legal-status Critical Current

Links

JP2024531095A 2021-12-03 2022-11-09 処理ユニットのプロセッサ・コア上のセキュア・コード・セグメントのスケジューリング Pending JP2024541487A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US17/457,449 US12314755B2 (en) 2021-12-03 2021-12-03 Scheduling a secure code segment on a processor core of a processing unit
US17/457,449 2021-12-03
PCT/EP2022/081210 WO2023099136A1 (en) 2021-12-03 2022-11-09 Scheduling a secure code segment on a processor core of a processing unit

Publications (2)

Publication Number Publication Date
JP2024541487A JP2024541487A (ja) 2024-11-08
JP2024541487A5 true JP2024541487A5 (https=) 2024-11-15

Family

ID=84364273

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2024531095A Pending JP2024541487A (ja) 2021-12-03 2022-11-09 処理ユニットのプロセッサ・コア上のセキュア・コード・セグメントのスケジューリング

Country Status (4)

Country Link
US (1) US12314755B2 (https=)
EP (1) EP4441600A1 (https=)
JP (1) JP2024541487A (https=)
WO (1) WO2023099136A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12602466B2 (en) 2021-12-03 2026-04-14 International Business Machines Corporation Operating a secure code segment on a processor core of a processing unit

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1870814B1 (en) 2006-06-19 2014-08-13 Texas Instruments France Method and apparatus for secure demand paging for processor devices
US7707578B1 (en) 2004-12-16 2010-04-27 Vmware, Inc. Mechanism for scheduling execution of threads for fair resource allocation in a multi-threaded and/or multi-core processing system
US20080271027A1 (en) 2007-04-27 2008-10-30 Norton Scott J Fair share scheduling with hardware multithreading
US8219996B1 (en) 2007-05-09 2012-07-10 Hewlett-Packard Development Company, L.P. Computer processor with fairness monitor
US20090031314A1 (en) 2007-07-25 2009-01-29 Microsoft Corporation Fairness in memory systems
US7996663B2 (en) 2007-12-27 2011-08-09 Intel Corporation Saving and restoring architectural state for processor cores
US8522354B2 (en) 2008-05-24 2013-08-27 Via Technologies, Inc. Microprocessor apparatus for secure on-die real-time clock
JP4778035B2 (ja) * 2008-11-07 2011-09-21 インターナショナル・ビジネス・マシーンズ・コーポレーション 外部資源を排他使用しながら実行される命令の実行時間の遅延を防ぐためのコンピュータ・システム、並びにその方法及びコンピュータ・プログラム
JP2013152636A (ja) * 2012-01-25 2013-08-08 Toyota Motor Corp 情報処理装置、タスクスケジューリング方法
US9183399B2 (en) 2013-02-14 2015-11-10 International Business Machines Corporation Instruction set architecture with secure clear instructions for protecting processing unit architected state information
CA2915620C (en) 2013-06-18 2022-12-13 Ciambella Ltd. Method and apparatus for code virtualization and remote process call generation
JP2015014966A (ja) * 2013-07-05 2015-01-22 日本電気株式会社 情報処理装置、情報処理方法、および、情報処理プログラム
US9594927B2 (en) 2014-09-10 2017-03-14 Intel Corporation Providing a trusted execution environment using a processor
WO2016094840A2 (en) 2014-12-11 2016-06-16 Ghosh Sudeep System, method & computer readable medium for software protection via composable process-level virtual machines
US10719420B2 (en) 2015-02-10 2020-07-21 International Business Machines Corporation System level testing of multi-threading functionality including building independent instruction streams while honoring architecturally imposed common fields and constraints
US11354128B2 (en) 2015-03-04 2022-06-07 Intel Corporation Optimized mode transitions through predicting target state
DE102015213263A1 (de) 2015-07-15 2017-01-19 Siemens Aktiengesellschaft Prozessor mit wahlweise einschaltbaren Sicherheitsfunktionen
US9864879B2 (en) * 2015-10-06 2018-01-09 Micron Technology, Inc. Secure subsystem
US10534725B2 (en) 2017-07-25 2020-01-14 International Business Machines Corporation Computer system software/firmware and a processor unit with a security module
US10783240B2 (en) * 2017-09-29 2020-09-22 Stmicroelectronics, Inc. Secure environment in a non-secure microcontroller
CN109858288B (zh) 2018-12-26 2021-04-13 中国科学院信息工程研究所 实现虚拟机安全隔离的方法与装置
US11372647B2 (en) 2019-12-05 2022-06-28 Marvell Asia Pte, Ltd. Pipelines for secure multithread execution
US11307857B2 (en) 2019-12-05 2022-04-19 Marvell Asia Pte, Ltd. Dynamic designation of instructions as sensitive for constraining multithreaded execution
CN111753311B (zh) 2020-08-28 2020-12-15 支付宝(杭州)信息技术有限公司 超线程场景下安全进入可信执行环境的方法及装置

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