JP2024525798A5 - - Google Patents
Info
- Publication number
- JP2024525798A5 JP2024525798A5 JP2024502040A JP2024502040A JP2024525798A5 JP 2024525798 A5 JP2024525798 A5 JP 2024525798A5 JP 2024502040 A JP2024502040 A JP 2024502040A JP 2024502040 A JP2024502040 A JP 2024502040A JP 2024525798 A5 JP2024525798 A5 JP 2024525798A5
- Authority
- JP
- Japan
- Prior art keywords
- predicate
- data value
- vector
- source
- instruction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB2110500.2A GB2612010B (en) | 2021-07-21 | 2021-07-21 | Predication techniques |
| GB2110500.2 | 2021-07-21 | ||
| PCT/GB2022/051586 WO2023002147A1 (en) | 2021-07-21 | 2022-06-22 | Predication techniques |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2024525798A JP2024525798A (ja) | 2024-07-12 |
| JP2024525798A5 true JP2024525798A5 (https=) | 2025-06-23 |
Family
ID=77443517
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2024502040A Pending JP2024525798A (ja) | 2021-07-21 | 2022-06-22 | 述語技術 |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US20240329996A1 (https=) |
| EP (1) | EP4374250B1 (https=) |
| JP (1) | JP2024525798A (https=) |
| KR (1) | KR20240027144A (https=) |
| CN (1) | CN117795477A (https=) |
| GB (1) | GB2612010B (https=) |
| IL (1) | IL310119A (https=) |
| TW (1) | TW202307653A (https=) |
| WO (1) | WO2023002147A1 (https=) |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7428631B2 (en) * | 2003-07-31 | 2008-09-23 | Intel Corporation | Apparatus and method using different size rename registers for partial-bit and bulk-bit writes |
| US20080016320A1 (en) * | 2006-06-27 | 2008-01-17 | Amitabh Menon | Vector Predicates for Sub-Word Parallel Operations |
| US7676647B2 (en) * | 2006-08-18 | 2010-03-09 | Qualcomm Incorporated | System and method of processing data using scalar/vector instructions |
| US9606803B2 (en) * | 2013-07-15 | 2017-03-28 | Texas Instruments Incorporated | Highly integrated scalable, flexible DSP megamodule architecture |
| US9400651B2 (en) * | 2013-09-24 | 2016-07-26 | Apple Inc. | Early issue of null-predicated operations |
| US20150089189A1 (en) * | 2013-09-24 | 2015-03-26 | Apple Inc. | Predicate Vector Pack and Unpack Instructions |
| GB2548908B (en) * | 2016-04-01 | 2019-01-30 | Advanced Risc Mach Ltd | Complex multiply instruction |
-
2021
- 2021-07-21 GB GB2110500.2A patent/GB2612010B/en active Active
-
2022
- 2022-06-22 IL IL310119A patent/IL310119A/en unknown
- 2022-06-22 EP EP22734030.4A patent/EP4374250B1/en active Active
- 2022-06-22 US US18/579,804 patent/US20240329996A1/en active Pending
- 2022-06-22 KR KR1020247005225A patent/KR20240027144A/ko active Pending
- 2022-06-22 CN CN202280053705.2A patent/CN117795477A/zh active Pending
- 2022-06-22 WO PCT/GB2022/051586 patent/WO2023002147A1/en not_active Ceased
- 2022-06-22 JP JP2024502040A patent/JP2024525798A/ja active Pending
- 2022-07-19 TW TW111126953A patent/TW202307653A/zh unknown
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10656944B2 (en) | Hardware apparatus and methods to prefetch a multidimensional block of elements from a multidimensional array | |
| JP2018500653A (ja) | ベクトルブロードキャストおよびｘｏｒａｎｄ論理命令のための装置および方法 | |
| US20210406018A1 (en) | Apparatuses, methods, and systems for instructions for moving data between tiles of a matrix operations accelerator and vector registers | |
| KR20110055629A (ko) | 단일 명령 다중 데이터（ｓｉｍｄ）데이터 처리기에서 확장된 어드레싱 모드들의 제공 | |
| KR20130100900A (ko) | 조건부 비교 명령 | |
| JP2017529601A (ja) | ビットシャッフルプロセッサ、方法、システム、および命令 | |
| JP2014182802A (ja) | 演算マスクのマスクされていない要素をコンソリデートするプロセッサ、方法、システム、及び命令 | |
| JP6773378B2 (ja) | ３ｄ座標から３ｄのｚ曲線インデックスを計算するための機械レベル命令 | |
| CN116880903A (zh) | 具有提取提前滞后的流引擎 | |
| CN107851015B (zh) | 向量操作数位大小控制 | |
| KR20180035211A (ko) | 벡터 산술 명령 | |
| JP7377208B2 (ja) | データ処理 | |
| JP6818010B2 (ja) | ベクトル長クエリ命令 | |
| JP4901754B2 (ja) | 単一命令複数データ実行エンジンのフラグレジスタのための評価ユニット | |
| JP2024525798A5 (https=) | ||
| JP4686435B2 (ja) | 演算装置 | |
| WO2010067522A1 (ja) | 演算ユニット、プロセッサ及び並列演算方法 | |
| KR102644951B1 (ko) | 산술 논리 장치 레지스터 시퀀싱 | |
| KR20200028965A (ko) | 데이터 처리장치에서의 벡터 인터리빙 | |
| KR102688393B1 (ko) | 벡터 술어 요약 생성 | |
| JP2024525798A (ja) | 述語技術 |