JP2024521546A - ブリッジを通して結合された集積デバイスを含むパッケージ - Google Patents

ブリッジを通して結合された集積デバイスを含むパッケージ Download PDF

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JP2024521546A
JP2024521546A JP2023565402A JP2023565402A JP2024521546A JP 2024521546 A JP2024521546 A JP 2024521546A JP 2023565402 A JP2023565402 A JP 2023565402A JP 2023565402 A JP2023565402 A JP 2023565402A JP 2024521546 A JP2024521546 A JP 2024521546A
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interconnects
integrated device
metallization
bridge
coupled
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Japanese (ja)
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JP2024521546A5 (cg-RX-API-DMAC10.html
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ホン・ボク・ウィ
アニケット・パティル
ジジエ・ワン
マーカス・ス
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クアルコム，インコーポレイテッド
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Publication of JP2024521546A publication Critical patent/JP2024521546A/ja
Publication of JP2024521546A5 publication Critical patent/JP2024521546A5/ja
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    • H10W70/08—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs
    • H10W70/09—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
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    • H10W72/07204—Connecting or disconnecting of bump connectors using auxiliary members using temporary auxiliary members, e.g. sacrificial coatings
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    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
JP2023565402A 2021-05-24 2022-04-25 ブリッジを通して結合された集積デバイスを含むパッケージ Pending JP2024521546A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US17/328,666 US20220375838A1 (en) 2021-05-24 2021-05-24 Package comprising integrated devices coupled through a bridge
US17/328,666 2021-05-24
PCT/US2022/026200 WO2022250821A1 (en) 2021-05-24 2022-04-25 Package comprising integrated devices coupled through a bridge

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JP2024521546A true JP2024521546A (ja) 2024-06-03
JP2024521546A5 JP2024521546A5 (cg-RX-API-DMAC10.html) 2025-04-22

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US (1) US20220375838A1 (cg-RX-API-DMAC10.html)
EP (1) EP4348711A1 (cg-RX-API-DMAC10.html)
JP (1) JP2024521546A (cg-RX-API-DMAC10.html)
KR (1) KR20240013097A (cg-RX-API-DMAC10.html)
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Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12355000B2 (en) 2020-11-10 2025-07-08 Qualcomm Incorporated Package comprising a substrate and a high-density interconnect integrated device
US12469811B2 (en) 2021-03-26 2025-11-11 Qualcomm Incorporated Package comprising wire bonds coupled to integrated devices
KR102914981B1 (ko) * 2021-06-14 2026-01-21 삼성전자주식회사 반도체 패키지
US20230026972A1 (en) * 2021-07-14 2023-01-26 Samsung Electronics Co., Ltd. Semiconductor package and method of fabricating the same
TWI912609B (zh) * 2023-06-16 2026-01-21 威盛電子股份有限公司 電子封裝體之製作方法及電子封裝體
US20250079348A1 (en) * 2023-08-30 2025-03-06 Qualcomm Incorporated Package comprising a substrate with an embedded passive device
US20250343176A1 (en) * 2024-05-03 2025-11-06 Qualcomm Incorporated Package comprising an interposer package with metallization portions, and a passive device and a bridge between the metallization portions

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160133571A1 (en) * 2014-11-07 2016-05-12 Qualcomm Incorporated Integrated device package comprising silicon bridge in an encapsulation layer
US9379090B1 (en) * 2015-02-13 2016-06-28 Qualcomm Incorporated System, apparatus, and method for split die interconnection
JP2017103458A (ja) * 2015-11-30 2017-06-08 台湾積體電路製造股▲ふん▼有限公司Ｔａｉｗａｎ Ｓｅｍｉｃｏｎｄｕｃｔｏｒ Ｍａｎｕｆａｃｔｕｒｉｎｇ Ｃｏｍｐａｎｙ，Ｌｔｄ． 集積チップおよびその製造方法
US20190363049A1 (en) * 2017-03-22 2019-11-28 Intel Corporation Multiple die package using an embedded bridge connecting dies
US20200006309A1 (en) * 2018-06-29 2020-01-02 Taiwan Semiconductor Manufacturing Company, Ltd. Buffer Design for Package Integration
US20200006251A1 (en) * 2018-06-29 2020-01-02 Taiwan Semiconductor Manufacturing Company, Ltd. Supporting InFO Packages to Reduce Warpage
US20200075546A1 (en) * 2018-08-29 2020-03-05 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor package and manufacturing method thereof
JP2021027334A (ja) * 2019-08-07 2021-02-22 インテル コーポレイション 超薄型ブリッジ及びマルチダイ・ウルトラファイン・ピッチ・パッチ・アーキテクチャ及び製造方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10833052B2 (en) * 2016-10-06 2020-11-10 Micron Technology, Inc. Microelectronic package utilizing embedded bridge through-silicon-via interconnect component and related methods

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160133571A1 (en) * 2014-11-07 2016-05-12 Qualcomm Incorporated Integrated device package comprising silicon bridge in an encapsulation layer
US9379090B1 (en) * 2015-02-13 2016-06-28 Qualcomm Incorporated System, apparatus, and method for split die interconnection
JP2018508993A (ja) * 2015-02-13 2018-03-29 クアルコム，インコーポレイテッド スプリットダイ相互接続のためのシステム、装置および方法
JP2017103458A (ja) * 2015-11-30 2017-06-08 台湾積體電路製造股▲ふん▼有限公司Ｔａｉｗａｎ Ｓｅｍｉｃｏｎｄｕｃｔｏｒ Ｍａｎｕｆａｃｔｕｒｉｎｇ Ｃｏｍｐａｎｙ，Ｌｔｄ． 集積チップおよびその製造方法
US20190363049A1 (en) * 2017-03-22 2019-11-28 Intel Corporation Multiple die package using an embedded bridge connecting dies
US20200006309A1 (en) * 2018-06-29 2020-01-02 Taiwan Semiconductor Manufacturing Company, Ltd. Buffer Design for Package Integration
US20200006251A1 (en) * 2018-06-29 2020-01-02 Taiwan Semiconductor Manufacturing Company, Ltd. Supporting InFO Packages to Reduce Warpage
US20200075546A1 (en) * 2018-08-29 2020-03-05 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor package and manufacturing method thereof
JP2021027334A (ja) * 2019-08-07 2021-02-22 インテル コーポレイション 超薄型ブリッジ及びマルチダイ・ウルトラファイン・ピッチ・パッチ・アーキテクチャ及び製造方法

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