JP2024021481A - 配線基板集合体、配線基板及び配線基板の製造方法 - Google Patents

配線基板集合体、配線基板及び配線基板の製造方法 Download PDF

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Publication number
JP2024021481A
JP2024021481A JP2022124328A JP2022124328A JP2024021481A JP 2024021481 A JP2024021481 A JP 2024021481A JP 2022124328 A JP2022124328 A JP 2022124328A JP 2022124328 A JP2022124328 A JP 2022124328A JP 2024021481 A JP2024021481 A JP 2024021481A
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JP
Japan
Prior art keywords
wiring
wiring board
solder resist
insulating layer
wiring structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2022124328A
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English (en)
Japanese (ja)
Other versions
JP2024021481A5 (https=
Inventor
裕 唐澤
Yutaka Karasawa
諒 宮澤
Ryo Miyazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2022124328A priority Critical patent/JP2024021481A/ja
Priority to US18/356,413 priority patent/US12463101B2/en
Publication of JP2024021481A publication Critical patent/JP2024021481A/ja
Publication of JP2024021481A5 publication Critical patent/JP2024021481A5/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/095—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias

Landscapes

  • Structure Of Printed Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2022124328A 2022-08-03 2022-08-03 配線基板集合体、配線基板及び配線基板の製造方法 Pending JP2024021481A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2022124328A JP2024021481A (ja) 2022-08-03 2022-08-03 配線基板集合体、配線基板及び配線基板の製造方法
US18/356,413 US12463101B2 (en) 2022-08-03 2023-07-21 Wiring board assembly, wiring board, and wiring board manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2022124328A JP2024021481A (ja) 2022-08-03 2022-08-03 配線基板集合体、配線基板及び配線基板の製造方法

Publications (2)

Publication Number Publication Date
JP2024021481A true JP2024021481A (ja) 2024-02-16
JP2024021481A5 JP2024021481A5 (https=) 2025-04-02

Family

ID=89769502

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2022124328A Pending JP2024021481A (ja) 2022-08-03 2022-08-03 配線基板集合体、配線基板及び配線基板の製造方法

Country Status (2)

Country Link
US (1) US12463101B2 (https=)
JP (1) JP2024021481A (https=)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0573977U (ja) * 1992-03-12 1993-10-08 株式会社富士通ゼネラル 多面取り基板
WO2008059571A1 (en) * 2006-11-15 2008-05-22 Panasonic Corporation Circuit board connection structure and circuit board
JP2011253979A (ja) * 2010-06-03 2011-12-15 Sumitomo Electric Printed Circuit Inc プリント配線板の接続構造、配線板接続体及び電子機器

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001160597A (ja) 1999-11-30 2001-06-12 Nec Corp 半導体装置、配線基板及び半導体装置の製造方法
US20130025914A1 (en) * 2011-07-25 2013-01-31 Ibiden Co., Ltd. Wiring board and method for manufacturing the same
JP2013098410A (ja) * 2011-11-02 2013-05-20 Ibiden Co Ltd 多数個取り基板

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0573977U (ja) * 1992-03-12 1993-10-08 株式会社富士通ゼネラル 多面取り基板
WO2008059571A1 (en) * 2006-11-15 2008-05-22 Panasonic Corporation Circuit board connection structure and circuit board
JP2011253979A (ja) * 2010-06-03 2011-12-15 Sumitomo Electric Printed Circuit Inc プリント配線板の接続構造、配線板接続体及び電子機器

Also Published As

Publication number Publication date
US20240047283A1 (en) 2024-02-08
US12463101B2 (en) 2025-11-04

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