JP2023181665A - Semiconductor equipment and electronic device - Google Patents

Abstract

To provide a semiconductor device that can reduce a leakage current and improve a breakdown voltage.SOLUTION: A semiconductor device includes a semiconductor substrate including a first layer and having a first region in plan view, an anode electrode located on the first region of the semiconductor substrate, a first semiconductor layer of a first conductivity type located in the first layer, and a second semiconductor region of a second conductivity type located on the top of the first layer. The second semiconductor region is located in a part of the first region in plan view. The anode electrode is joined to the second semiconductor region and the first semiconductor layer. The second semiconductor region has a linear shape in plan view, and includes a curved section curved at a corner of the first region.SELECTED DRAWING: Figure 1

Description

The present disclosure relates to semiconductor devices and electronic equipment.

Patent Document 1 describes a junction barrier Schottky diode (JBS) as a semiconductor device. The semiconductor device includes a guard ring surrounding an active region and a striped low resistance layer located within the active region.

Japanese Patent Application Publication No. 2016-66813

Further improvement in characteristics of semiconductor devices is desired. An object of the present disclosure is to provide a semiconductor device that can reduce leakage current and improve breakdown voltage.

A semiconductor device according to the present disclosure includes:
a semiconductor substrate including a first layer and having a first region in plan view;
an anode electrode located on the first region of the semiconductor substrate;
a first semiconductor layer of a first conductivity type located in the first layer;
a second semiconductor region of a second conductivity type located above the first layer;
Equipped with
The second semiconductor region is located in a part of the first region in plan view,
the anode electrode is joined to the second semiconductor region and the first semiconductor layer,
The second semiconductor region is
It has a linear shape in plan view, and includes a curved section curved at a corner of the first region.

An electronic device according to the present disclosure includes the above semiconductor device.

According to the present disclosure, it is possible to reduce leakage current and improve breakdown voltage in a semiconductor device.

FIG. 2 is a plan view (A) showing a semiconductor device according to Embodiment 1 of the present disclosure and a diagram (B) illustrating a first region. FIG. 2 is a cross-sectional view taken along line AA in FIG. 1(A). It is an enlarged view showing the periphery of the first corner of the first region. 3 is a graph showing characteristics of semiconductor devices of Embodiment 1 and Comparative Example. FIG. 2 is a plan view showing a semiconductor device according to a second embodiment of the present disclosure.

Hereinafter, each embodiment of the present disclosure will be described in detail with reference to the drawings.

(Embodiment 1)
FIG. 1 is a plan view (A) showing a semiconductor device according to a first embodiment of the present disclosure and a diagram (B) illustrating a first region. In FIG. 1(A), the guard ring 41 is shown by hatching. FIG. 1A shows a configuration in which elements above the semiconductor substrate 101 (anode electrode 31, field insulating film 42, and surface protection film 43) are removed. FIG. 2 is a cross-sectional view taken along line AA in FIG. 1(A).

The semiconductor device 1 of the first embodiment is a junction barrier Schottky diode (JBS) having a Schottky junction region and a pn junction region between an anode electrode 31 and a cathode electrode 37. Having a Schottky junction region reduces forward voltage and increases switching speed. By having the pn junction region, a depletion layer spreads in the vicinity of the pn junction region during reverse bias. Therefore, compared to a Schottky barrier diode that does not have a pn junction region, the semiconductor device 1 can reduce leakage current. Furthermore, by having a pn junction region, forward resistance is reduced and surge resistance is improved.

As shown in FIG. 1(B), the semiconductor device 1 includes a semiconductor substrate 101 having a first region 21 in plan view. Planar perspective means seeing through from a direction perpendicular to the upper surface of the semiconductor substrate 101. The first region 21 has a Schottky junction region and a pn junction region, and may be an active region through which a current flows. The first area 21 may be an area inside a guard ring 41, which will be described later.

The semiconductor substrate 101 includes a first semiconductor layer 32 of a first conductivity type (for example, n-type) located in the first layer 11 and a first semiconductor layer 32 of a second conductivity type (for example, p-type) located in a part of the first layer 11. The second semiconductor region 33 may also be provided. The second semiconductor region 33 may be located above the first layer 11, and the first semiconductor layer 32 may be located below the second semiconductor region 33. The semiconductor substrate 101 may include a plurality of second semiconductor regions 33. The first semiconductor layer 32 may be an epitaxial layer. The second semiconductor region 33 may be a region in which impurities are implanted in an epitaxial layer in a predetermined pattern and annealed.

The semiconductor substrate 101 may further include a base drift layer 34 located below the first layer 11 , a buffer layer 35 located below the base drift layer 34 , and a high resistance drift layer 36 . The base drift layer 34 and the buffer layer 35 may be epitaxial layers. The high resistance drift layer 36 may be an n-type SiC substrate.

The semiconductor substrate 101 is made of one or more semiconductor materials selected from the group consisting of silicon, silicon carbide, silicon germanium, silicon nitride, silicon dioxide, gallium arsenide, gallium nitride, indium phosphide, indium gallium arsenide, and germanium. or may be composed of the semiconductor material.

The semiconductor device 1 may further include an anode electrode 31 located on the first region 21 of the semiconductor substrate 101 and a cathode electrode 37 located below the semiconductor substrate 101. The anode electrode 31 may have a two-layer structure including a lower first metal layer 31a and an upper second metal layer 31b. The anode electrode 31 may be connected to the first semiconductor layer 32 and the second semiconductor region 33 throughout the first region 21 . The cathode electrode 37 may be bonded to the entire area of the semiconductor substrate 101 when viewed in plan. The junction region between the anode electrode 31 and the first semiconductor layer 32 corresponds to a Schottky junction region, and the junction region between the first semiconductor layer 32 and the second semiconductor region 33 corresponds to a pn junction region.

A guard ring 41 surrounding the first region 21 may further be located in the first layer 11 of the semiconductor substrate 101 . The guard ring 41 is a region having a lower resistance than the first semiconductor layer 32, and may be a region of the second conductivity type (for example, p-type) like the second semiconductor region 33. The depth D2 of the guard ring 41 may be the same as the depth D1 of the second semiconductor region 33, may be deeper than the depth D1 of the second semiconductor region 33, or may be shallower. The guard ring 41 may be annular in plan view. The width W2 from the inner peripheral end to the outer peripheral end of the guard ring 41 may be larger than the width W1 (width in the direction perpendicular to the longitudinal direction) of the second semiconductor region 33.

The semiconductor device 1 may further include a field insulating film 42 located on the semiconductor substrate 101 and a surface protection film 43 located on the field insulating film 42.

The field insulating film 42 has insulating properties and may be made of SiO ₂ (silicon oxide). The field insulating film 42 is annular and may extend along the outer periphery of the guard ring 41 . In plan perspective, the inner circumferential end of the field insulating film 42 is located outward from the inner circumferential end of the guard ring 41, and the outer circumferential end of the field insulating film 42 is located outward from the outer circumferential end of the guard ring 41. Good too. In plan view, the outer peripheral end of the guard ring 41 may overlap the field insulating film 42 over the entire circumferential area.

The anode electrode 31 may overlap a part of the guard ring 41 and a part of the field insulating film 42 in the entire circumferential region.

The surface protection film 43 has insulating properties and may be made of SiN (silicon nitride). The surface protection film 43 is annular and may be located above the outer periphery of the field insulating film 42 and the outer periphery of the anode electrode 31 over the entire circumferential region.

<Planar shape of second semiconductor region 33 and guard ring 41>
FIG. 3 is an enlarged view showing the vicinity of the first corner 21c of the first region 21. As shown in FIG. In FIG. 3, the width of the second semiconductor region 33 and the width of the guard ring 41 are deformed. In the following description of the shape, unless otherwise specified, the shape in plan view is shown.

The edge of the first region 21 includes a rounded first corner 21c, and a first side 21a and a second side 21b that are adjacent to each other with the first corner 21c in between (see FIG. 1(B)). .

The guard ring 41 has a first band-shaped guard ring side 41a, a second band-shaped guard ring side 41b, and a second band-shaped guard ring side 41b, corresponding to the first side 21a, second side 21b, and first corner 21c of the first region 21. It may have a band-shaped first guard ring corner portion 41c (see FIG. 1(A)). The first guard ring corner 41c may be curved to correspond to the roundness of the first corner 21c.

The plurality of second semiconductor regions 33 may have a plurality of linear portions 33a (33a-1, 33a-2, 33a-3) having a linear shape. The plurality of linear parts 33a may be separated from each other, or the plurality of linear parts 33a may be connected (joined) at the tip or the middle. Each linear portion 33a that is continuous in FIG. 3 may include breaks here and there and may be divided into a plurality of pieces.

As shown in FIG. 3, at least one linear section 33a (33a-2) includes a first straight section 331 extending along the first side 21a and a curved section 332 curved at the first corner 21c. . In FIG. 3, only one representative linear portion 33a (33a-2) is surrounded by a dashed line to indicate each section. According to this configuration, the degree of symmetry around the distal end portion 336 of the linear portion 33a can be increased, and the withstand pressure can be improved, compared to a configuration that does not have the curved section 332. That is, if there is no curved section 332 and the first straight section 331 extends to the first guard ring corner 41c, the angle formed by the first straight section 331 and the first guard ring corner 41c will be asymmetrical. Become. That is, the above-mentioned angle becomes an acute angle on one side and an obtuse angle on the other side across the first straight section 331. With this configuration, when a reverse bias is applied to the semiconductor device 1, the expansion of the depletion layer that occurs at the acute angle portion is reduced. Therefore, the breakdown voltage decreases. On the other hand, in the first embodiment, the presence of the curved section 332 can reduce the asymmetric structure described above. Therefore, the decrease in breakdown voltage as described above can be reduced.

Specifically, as shown in FIG. 3, the plurality of linear portions 33a include a first linear portion 33a-1 extending along the first side 21a to the second side 21b, and a first linear portion 33a-1. 1 and a second linear portion 33a-2 located between the first side 21a. The second linear portion 33a-2 may have a first straight section 331 extending along the first side 21a and a curved section 332 curved along the first corner 21c. The distal end portion 336 of the second linear portion 33a-2 on the side of the curved section 332 may be joined to the first linear portion 33a-1. According to this configuration, it is possible to further reduce the asymmetric structure around the tip portion 336 and further reduce the decrease in breakdown voltage.

The angle θ (FIG. 3) at which the first linear portion 33a-1 and the second linear portion 33a-2 connect may be 85°≦θ≦95°. Furthermore, the angle θ may be 90°. Here, the angle at which the two linear parts 33a connect may mean the angle between the center lines in the longitudinal direction of each linear part 33a at the connection point. With this configuration, the periphery of the tip portion 336 of the second linear portion 33a-2 becomes symmetrical, and it is possible to further reduce a drop in withstand voltage caused by the asymmetric structure. Note that the angle θ of X° (X is an arbitrary value) includes not only the exact X° but also X°+error (the error is within the tolerance range).

The tip portion 337 of the first linear portion 33a-1 may be joined to the second guard ring side portion 41b. According to this configuration, the peripheries of the tip portions 336 and 337 can be made symmetrical in both the first linear portion 33a-1 and the second linear portion 33a-2, and the withstand pressure caused by the asymmetric structure can be made symmetrical. can further reduce the decrease in

More specifically, as shown in FIG. 1B, the first region 21 has a first region that overlaps with the first guard ring corner portion 41c when viewed from the direction along the first guard ring side portion 41a. It may include a range 211 and a second range 212 overlapping with the second guard ring side portion 41b. In addition, as shown in FIG. It may include three linear parts 33a-3 and a first linear part 33a-1 located between the plurality of second linear parts 33a-2 and the plurality of third linear parts 33a-3. . The plurality of third linear portions 33a-3, the first linear portions 33a-1, and the plurality of second linear portions 33a-2 may be spaced apart from each other. The plurality of curved sections 332 (FIG. 3) included in each of the plurality of second linear parts 33a-2 may have a smaller curvature as they are located closer to the first guard ring corner part 41c. The centers of curvature of the plurality of curved sections 332 may be at the same point. According to this configuration, the peripheries of the tip portions 336, 337, and 338 in many of the linear portions 33a included in the first region 21 can be made symmetrical, and a decrease in withstand voltage caused by an asymmetric structure can be further reduced. can. That is, the withstand voltage can be improved.

As shown in FIGS. 1 and 2, the first region 21 has two or more (for example, four) corners and three or more (for example, four) sides, and all corners are rounded. May have. The guard ring 41 may have a plurality of guard ring corners and a plurality of guard ring sides corresponding to all corners and all sides of the first region 21, respectively. Furthermore, all guard ring corners may be curved. The shape of the second semiconductor region 33 around the first corner 21c and the first guard ring corner 41c described above is the same as that of the first corner 21c and the first guard ring corner 41c. It may also be provided in the second semiconductor region 33 around the . With this configuration, the degree of symmetry of the tip portions of the plurality of linear portions 33a (second semiconductor region 33) is improved over the entire first region 21, and the breakdown voltage of the semiconductor device 1 can be improved.

<Characteristics>
FIG. 4 is a graph showing the characteristics of the semiconductor devices of the first embodiment and the comparative example. In the graph, the horizontal axis represents reverse voltage, and the vertical axis represents reverse current. The semiconductor device of the comparative example is a Schottky barrier diode with a planar structure that does not have the second semiconductor region 33, and has the same structure as the semiconductor device 1 of the first embodiment except that it does not have the second semiconductor region 33. Ru.

As shown in the graph line of the comparative example, the semiconductor device of the comparative example generates a reverse current (leakage current) when a reverse voltage is applied. Then, when the reverse voltage reaches the withstand voltage Vmax, a large reverse current is generated. On the other hand, in the semiconductor device 1 of the first embodiment, the leakage current below the breakdown voltage Vmax is smaller than that of the comparative example. This characteristic is an effect of a depletion layer that spreads in the junction region (pn junction region) between the first semiconductor layer 32 and the second semiconductor region 33 during reverse bias.

Although not shown in FIG. 4, the semiconductor device 1 of the first embodiment further has a pn junction region between the first semiconductor layer 32 and the second semiconductor region 33, which reduces forward resistance and increases surge resistance. Improvements are also realized.

Here, as another comparative example not shown in FIG. 4, assume a JBS in which the second semiconductor region 33 has a stripe shape over the entire area. Generally, a JBS structure having a pn junction region has a lower breakdown voltage Vmax than a Schottky barrier diode having a planar structure. Therefore, the withstand voltage of JBS, which is another comparative example, is lower than the withstand voltage Vmax of the comparative example. On the other hand, as shown in FIG. 4, the breakdown voltage Vmax of the semiconductor device 1 of the first embodiment is equivalent to that of the planar structure Schottky barrier diode of the comparative example. That is, although the semiconductor device 1 of the first embodiment has the JBS structure including the Schottky junction region and the pn junction region, the breakdown voltage Vmax is not reduced. Therefore, the characteristic graph of FIG. 4 shows that the breakdown voltage of the semiconductor device 1 of the first embodiment is improved.

From the above, the semiconductor device 1 of the first embodiment achieves reduction in leakage current, improvement in surge resistance, and improvement in breakdown voltage.

(Embodiment 2)
FIG. 5 is a plan view showing a semiconductor device according to Embodiment 2 of the present disclosure. In FIG. 5, the guard ring 41 is shown by hatching. FIG. 5 shows a configuration in which elements above the semiconductor substrate 101 (anode electrode 31, field insulating film 42, and surface protection film 43) are excluded.

In the semiconductor device 1A of the second embodiment, the second linear portion 33a-2 includes a first straight section 331 extending along the first side 21a, a curved section 332 curved along the first corner 21c, and a first linear section 331 extending along the first side 21a. It may also have a second straight section 333 extending along the two sides 21b. The curved section 332 may be located between the first straight section 331 and the second straight section 333.

The second linear portion 33a-2 is annular and may have a plurality (for example, four) of curved sections 332 and a plurality of (for example, four) straight sections (331, 331, 333, 333). . In FIG. 5, only one representative second linear portion 33a-2 is surrounded by a dashed line to indicate each section.

As shown in FIG. 5, the second straight sections 333 of the plurality of second linear sections 33a-2 and the first linear section 33a-1 may intersect. The second linear sections 333 of the plurality of second linear portions 33a-2 and the plurality of third linear portions 33a-3 may intersect. The two linear portions 33a may intersect at 90 degrees at each intersection. Alternatively, although not shown, the first linear portion 33a-1 and the third linear portion 33a-3 do not intersect with the second linear portion 33a-2, and the innermost second linear portion 33a-2 It may be located within the area surrounded by.

In the semiconductor device 1A of the second embodiment as well, the degree of symmetry at the tip or intersection of each linear portion 33a (33a-1, 33a-2, 33a-3) is improved, and the breakdown voltage can be improved.

(Electronics)
An electronic device according to an embodiment of the present disclosure includes the semiconductor device 1 or 1A of the first embodiment or the second embodiment described above. Specifically, the electronic device may have a configuration in which the semiconductor devices 1 and 1A are housed in a package. The anode electrode 31 and cathode electrode 37 of the semiconductor devices 1 and 1A may be electrically connected to a plurality of electrodes exposed on the outside of the package. Alternatively, the electronic device according to the embodiment of the present disclosure may have a substrate (such as a printed circuit board), and the semiconductor devices 1 and 1A may be mounted on the substrate. Other electric elements, electronic elements, etc. may be mounted on the substrate. According to the electronic device of this embodiment, the reliability of the electronic device can be further improved due to the characteristics of the semiconductor devices 1 and 1A described above.

Each embodiment of the present disclosure has been described above. However, the semiconductor device of the present disclosure is not limited to the above embodiments. For example, in the first and second embodiments, the curved section 332 of the second linear portion 33a-2 is curved along the roundness of the first corner 21c or the first guard ring corner 41c. However, the curved section 332 is curved in the opposite direction to the rounding direction of the first corner 21c or the curved direction of the first guard ring corner 41c, and the tip of the second linear section 33a-2 is It may be joined to the ring corner portion 41c. Even in such a configuration, the second linear portion 33a-2 and the first guard ring corner portion 41c can be connected at a highly symmetrical angle (for example, 90 degrees). Therefore, the breakdown voltage of the semiconductor device can be improved. Other details shown in the embodiments can be changed as appropriate without departing from the spirit of the invention.

An embodiment of the present disclosure will be described below. In one embodiment,
(1) The semiconductor device is
a semiconductor substrate including a first layer and having a first region in plan view;
an anode electrode located on the first region of the semiconductor substrate;
a first semiconductor layer of a first conductivity type located in the first layer;
a second semiconductor region of a second conductivity type located above the first layer;
Equipped with
The second semiconductor region is located in a part of the first region in plan view,
the anode electrode is joined to the second semiconductor region and the first semiconductor layer,
The second semiconductor region is
It has a linear shape in plan view, and includes a curved section curved at a corner of the first region.

(2) The semiconductor device of (1) above is
comprising a plurality of the second semiconductor regions,
The edge of the first region includes a first corner and a first side and a second side that are adjacent to each other with the first corner interposed therebetween,
The plurality of second semiconductor regions include a first linear portion extending along the first side to the second side in plan view, and a first linear portion located between the first linear portion and the first side. 2 linear parts,
The second linear section has a straight section extending along the first side and a curved section curved along the first corner, and an end on the side of the curved section is connected to the first linear section. It is joined to the part.

(3) The semiconductor device of (2) above is
The angle θ at which the first linear portion and the second linear portion connect in plan view is 85°≦θ≦95°.

(4) The semiconductor device of (2) or (3) above is
further comprising a guard ring located above the first layer and surrounding the first region in plan view;
The guard ring includes a first guard ring side, a first guard ring corner, and a second guard ring side, respectively, along the first side, the first corner, and the second side of the first region. including,
The first guard ring corner portion is curved in plan view;
The first linear portion extends along the first guard ring side portion and is joined to the second guard ring side portion,
The second linear portion extends along the first guard ring side portion and the first guard ring corner portion, and is joined to the first linear portion.

(5) The semiconductor device of (4) above is
The plurality of second semiconductor regions include the first linear part, the plurality of second linear parts, and the plurality of third linear parts extending along the first linear part,
The first region includes a first range that overlaps with the first guard ring corner and a second range that overlaps with the second guard ring side when viewed from a direction along the first guard ring side. including;
In planar perspective, the plurality of third linear parts are located in the second range at intervals, and the second linear parts are located at intervals in the first range, and the third linear parts are located in the first range at intervals from each other. one linear part is located between the plurality of third linear parts and the plurality of second linear parts,
The plurality of curved sections included in each of the plurality of second linear parts have a smaller curvature as they are located closer to the first guard ring corner.

(6) The semiconductor device according to any one of (1) to (5) above,
The semiconductor substrate is made of one or more semiconductor materials selected from the group consisting of silicon, silicon carbide, silicon germanium, silicon nitride, silicon dioxide, gallium arsenide, gallium nitride, indium phosphide, indium gallium arsenide, and germanium. including.

In one embodiment,
(7) Electronic equipment is
It has the semiconductor devices of (1) to (6) above.

1, 1A Semiconductor device 11 First layer 21 First region 31 Anode electrode 32 First semiconductor layer 33 Second semiconductor region 33a Linear part 33a-1 First linear part 33a-2 Second linear part 33a-3 3 linear sections 331 first straight section 332 curved section 333 second straight section 336-338 tip section 34 base drift layer 35 buffer layer 36 high resistance drift layer 37 cathode electrode 41 guard ring 41a first guard ring side section 41b second Guard ring side portion 41c First guard ring corner portion 42 Field insulating film 43 Surface protection film 101 Semiconductor substrate 211 First range 212 Second range

Claims (7)

a semiconductor substrate including a first layer and having a first region in plan view;
an anode electrode located on the first region of the semiconductor substrate;
a first semiconductor layer of a first conductivity type located in the first layer;
a second semiconductor region of a second conductivity type located above the first layer;
Equipped with
The second semiconductor region is located in a part of the first region in plan view,
the anode electrode is joined to the second semiconductor region and the first semiconductor layer,
The second semiconductor region is
It has a linear shape in plan view and includes a curved section curved at a corner of the first region.
Semiconductor equipment. comprising a plurality of the second semiconductor regions,
The edge of the first region includes a first corner and a first side and a second side that are adjacent to each other with the first corner interposed therebetween,
The plurality of second semiconductor regions include a first linear portion extending along the first side to the second side in plan view, and a first linear portion located between the first linear portion and the first side. 2 linear parts,
The second linear section has a straight section extending along the first side and a curved section curved along the first corner, and an end on the side of the curved section is connected to the first linear section. connected to the
A semiconductor device according to claim 1. An angle θ at which the first linear portion and the second linear portion connect in planar perspective is 85°≦θ≦95°,
The semiconductor device according to claim 2. further comprising a guard ring located above the first layer and surrounding the first region in plan view;
The guard ring includes a first guard ring side, a first guard ring corner, and a second guard ring side, respectively, along the first side, the first corner, and the second side of the first region. including,
The first guard ring corner portion is curved in plan view;
The first linear portion extends along the first guard ring side portion and is joined to the second guard ring side portion,
The second linear part extends along the first guard ring side part and the first guard ring corner part, and is joined to the first linear part.
The semiconductor device according to claim 2. The plurality of second semiconductor regions include the first linear part, the plurality of second linear parts, and the plurality of third linear parts extending along the first linear part,
The first region includes a first range that overlaps with the first guard ring corner and a second range that overlaps with the second guard ring side when viewed from a direction along the first guard ring side. including;
In planar perspective, the plurality of third linear parts are located in the second range at intervals, and the second linear parts are located at intervals in the first range, and the third linear parts are located in the first range at intervals from each other. one linear part is located between the plurality of third linear parts and the plurality of second linear parts,
The plurality of curved sections included in each of the plurality of second linear portions have a smaller curvature as they are located closer to the first guard ring corner.
The semiconductor device according to claim 4. The semiconductor substrate is made of one or more semiconductor materials selected from the group consisting of silicon, silicon carbide, silicon germanium, silicon nitride, silicon dioxide, gallium arsenide, gallium nitride, indium phosphide, indium gallium arsenide, and germanium. The semiconductor device according to claim 1, comprising: An electronic device comprising the semiconductor device according to any one of claims 1 to 6.

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