JP2023178690A - Photoelectric conversion apparatus and equipment - Google Patents

Abstract

To provide a technique capable of achieving both a reduction in power consumption of pixel read circuits and a high saturation charge amount of photoelectric conversion units.SOLUTION: A photoelectric conversion apparatus includes: a first component including a first semiconductor substrate having a first surface and a second surface opposite the first surface, a photoelectric conversion unit configured to receive light from the second surface, a first semiconductor region, and a transfer transistor including a transfer gate disposed on a side of the first surface and configured to transfer a signal charge from the photoelectric conversion unit to the first semiconductor region; and a second component stacked on the first component and including a second semiconductor substrate having a third surface and a fourth surface opposite the third surface, an amplifier transistor including a gate connected to the first semiconductor region and disposed on a side of the third surface, and a reset transistor configured to reset the gate. A difference between a voltage to be applied to the transfer gate during a period of the transfer of the signal charge from the photoelectric conversion unit to the first semiconductor region and a reference voltage is greater than a difference between a power supply voltage to be applied to a main node of the reset transistor and the reference voltage.SELECTED DRAWING: Figure 2

Description

The present invention relates to photoelectric conversion devices and equipment.

In order to further increase the density of pixels included in a photoelectric conversion device, Patent Document 1 provides a photoelectric conversion unit included in the pixels on a first semiconductor substrate, and a pixel circuit included in the pixels on a second semiconductor substrate. Patent Document 1 describes that the first semiconductor substrate and the second semiconductor substrate are stacked. Further, Patent Document 1 describes that the film thickness of the gate insulating film of the transfer transistor included in the first semiconductor substrate is made different from the film thickness of the gate insulating film of the amplification transistor included in the second semiconductor substrate. .

International Publication 2019/130702 pamphlet

In the technique described in Patent Document 1, there is room for consideration in achieving both reduction in power consumption of the pixel readout circuit and a large amount of saturated charge in the photoelectric conversion section.

The present disclosure relates to a technology that achieves both reduction in power consumption of a pixel readout circuit and a large amount of saturated charge in a photoelectric conversion unit.

One aspect of the present disclosure includes: a first semiconductor substrate including a first surface and a second surface opposite to the first surface; a photoelectric conversion section that receives light from the second surface; a first semiconductor region; a first component including a transfer transistor having a transfer gate provided on the first surface side, which transfers signal charges of the photoelectric conversion section to the first semiconductor region; and a component stacked on the first component. a second semiconductor substrate having a third surface and a fourth surface opposite to the third surface; and an amplifier having a gate connected to the first semiconductor region and provided on the third surface side. a second component having a transistor and a reset transistor that resets the gate, the voltage from the photoelectric conversion unit to the first semiconductor region is higher than the difference between the power supply voltage applied to the main node of the reset transistor and a reference voltage. The photoelectric conversion device is characterized in that the difference between the voltage applied to the transfer gate during the period of transferring the signal charge and the reference voltage is larger.

In another aspect, a first semiconductor substrate includes a first surface and a second surface opposite to the first surface, a photoelectric conversion section that receives light from the second surface, a first semiconductor region, and a first component including a transfer transistor having a transfer gate provided on the first surface side, which transfers signal charges of a photoelectric conversion section to the first semiconductor region; and a component stacked on the first component. a second semiconductor substrate having a third surface and a fourth surface opposite to the third surface; and an amplification transistor connected to the first semiconductor region and having a gate provided on the third surface side. and a second component having a reset transistor that resets the gate, a first power supply voltage is applied to the main node of the reset transistor, a second power supply voltage is applied to the main node of the amplification transistor, The difference between the voltage applied to the transfer gate during the period of transferring the signal charge from the photoelectric conversion unit to the first semiconductor region and the reference voltage is larger than the difference between the first power supply voltage and the reference voltage and the reference voltage. The photoelectric conversion device is characterized in that the amplitude is larger than at least one of the differences between the second power supply voltage and the reference voltage.

According to the present disclosure, it is possible to provide a technique that achieves both reduction in power consumption of a pixel readout circuit and saturation charge amount of a photoelectric conversion unit.

Diagram showing the configuration of a photoelectric conversion device Diagram showing the configuration of the sensor section and readout circuit Cross-sectional view of photoelectric conversion device Plan view of photoelectric conversion device Cross-sectional view of photoelectric conversion device Potential diagram of photoelectric conversion device Potential diagram of photoelectric conversion device Cross-sectional view of photoelectric conversion device Plan view of photoelectric conversion device Cross-sectional view of photoelectric conversion device Diagram showing the configuration of the equipment

Each embodiment will be described below with reference to the drawings.

In each of the embodiments described below, an imaging device will be mainly described as an example of a photoelectric conversion device. However, each embodiment is not limited to an imaging device, and can be applied to other examples of photoelectric conversion devices. For example, there are distance measuring devices (devices such as distance measurement using focus detection and TOF (Time of Flight)), photometry devices (devices such as measuring the amount of incident light), and the like.

Furthermore, the conductivity types of semiconductor regions and wells and the implanted dopants described in the embodiments described below are merely examples, and are not limited to only the conductivity types and dopants described in the embodiments. The conductivity type and dopant described in the embodiments can be changed as appropriate, and the potentials of the semiconductor region and the well are changed as appropriate in accordance with this change.

Note that the conductivity types of transistors described in the embodiments described below are merely examples, and are not limited to only the conductivity types described in the examples. The conductivity types described in the embodiments can be changed as appropriate, and in accordance with this change, the potentials of the gate, source, and drain of the transistor are changed as appropriate.

For example, in the case of a transistor operated as a switch, the low level and high level of the potential supplied to the gate may be reversed with respect to the description in the embodiments as the conductivity type is changed. Furthermore, the conductivity types of the semiconductor regions described in the Examples described below are also examples, and are not limited to only the conductivity types described in the Examples. The conductivity type described in the embodiments can be changed as appropriate, and the potential of the semiconductor region is changed as appropriate in accordance with this change.

Furthermore, in the following embodiments, connections between circuit elements may be described. In this case, even if another element is interposed between the elements of interest, the elements of interest are treated as connected, unless otherwise specified. For example, assume that element A is connected to one node of a capacitive element C having a plurality of nodes, and element B is connected to the other node. Even in such a case, element A and element B are treated as connected unless otherwise specified.

The metal members such as wiring and pads described in this specification may be made of a single metal of one element, or may be a mixture (alloy). For example, a wiring described as a copper wiring may be made of copper alone, or may contain mainly copper and further contain other components. Further, for example, a pad connected to an external terminal may be made of a single piece of aluminum, or may have a structure mainly containing aluminum and further containing other components. The copper wiring and aluminum pads shown here are just examples, and can be changed to various metals.

Furthermore, the wiring and pads shown here are examples of metal members used in photoelectric conversion devices, and may be applied to other metal members.

<First embodiment>
Embodiments will be described below with reference to the drawings.

FIG. 1 shows an example of a schematic configuration of an imaging device 1 (an example of the photoelectric conversion device described above) according to an embodiment of the present disclosure. The imaging device 1 includes three substrates (a first component 10, a second component 20, and a third component 30). The imaging device 1 is a three-dimensional imaging device configured by bonding three parts (a first part 10, a second part 20, and a third part 30). The first component 10, the second component 20, and the third component 30 are stacked in this order.

The first component 10 has a plurality of sensor sections 12 that perform photoelectric conversion. The semiconductor substrate 14 corresponds to a specific example of the "first semiconductor substrate" of the present disclosure. The plurality of sensor units 12 are provided in a matrix within the pixel area 13 of the first component 10. The second component 20 includes, on a semiconductor substrate 21, one readout circuit 22 for each of the four sensor sections 12, which outputs a pixel signal based on the charge output from the sensor section 12. The semiconductor substrate 21 corresponds to a specific example of the "second semiconductor substrate" of the present disclosure. The second component 20 has a plurality of pixel drive lines 24 extending in the row direction and a plurality of pixel output lines 25 extending in the column direction. The third component 30 has a logic circuit 32 on a semiconductor substrate 31 that processes pixel signals. The semiconductor substrate 31 corresponds to a specific example of the "third semiconductor substrate" of the present disclosure. The logic circuit 32 includes, for example, a vertical scanning circuit 42, a column signal processing circuit 34, a horizontal scanning circuit 35, and a control circuit 36. The logic circuit 32 (specifically, the horizontal scanning circuit 35) outputs the output voltage Vout for each sensor section 12 to the outside. In the logic circuit 32, for example, a low resistance region made of silicide formed using a salicide (self-aligned silicide) process such as CoSi ₂ or NiSi is formed on the surface of the impurity diffusion region in contact with the source electrode and the drain electrode. You can.

For example, the vertical scanning circuit 42 sequentially selects the plurality of sensor units 12 on a row-by-row basis. The column signal processing circuit 34 performs, for example, correlated double sampling (CDS) processing on the pixel signals output from each sensor section 12 in the row selected by the vertical scanning circuit 42. The column signal processing circuit 34 extracts the signal level of the pixel signal by performing CDS processing, for example, and holds pixel data corresponding to the amount of light received by each sensor section 12. For example, the horizontal scanning circuit 35 sequentially outputs the pixel data held in the column signal processing circuit 34 to the outside. The control circuit 36 controls driving of each block (vertical scanning circuit 42, column signal processing circuit 34, and horizontal scanning circuit 35) in the logic circuit 32, for example.

For example, the vertical scanning circuit 42 sequentially selects the plurality of sensor units 12 on a row-by-row basis. The column signal processing circuit 34 performs, for example, correlated double sampling (CDS) processing on the pixel signals output from each sensor unit 12 in the row selected by the vertical scanning circuit 42. The column signal processing circuit 34 extracts the signal level of the pixel signal by performing CDS processing, for example, and holds pixel data corresponding to the amount of light received by each sensor section 12. Further, the column signal processing circuit 34 may include an AD conversion section that converts the signal (analog signal) output by the amplification transistor AMP into a digital signal. For example, the horizontal scanning circuit 35 sequentially outputs the pixel data held in the column signal processing circuit 34 to the outside. The control circuit 36 controls driving of each block (vertical scanning circuit 42, column signal processing circuit 34, and horizontal scanning circuit 35) in the logic circuit 32, for example.

FIG. 2 shows an example of the configuration of the sensor section 12. An example of the sensor section 12 and the readout circuit 22 is shown. In the following, a case will be described in which four sensor units 12_a to 12_d share one readout circuit 22 as shown in FIG. 2. Here, “sharing” refers to the outputs of the four sensor units 12_a to 12_d being input to the common readout circuit 22. Note that, below, when describing common matters regarding the sensor units 12_a to 12_d, they will be collectively referred to as the sensor unit 12.

Each sensor section 12 has common components.

Each sensor section 12 includes, for example, a photodiode PD, a transfer transistor TR electrically connected to the photodiode PD, and a first FD node FD1 that is a part of a floating diffusion (FD). Regarding each member of the photodiode and transfer gate in each sensor section 12, a to d are added to the end of each code. The readout circuit 22 has a second FD node FD2 that is another part of the floating diffusion FD that temporarily holds the charge output from the photodiode PD via the transfer transistor TR. The four first FD nodes FD1_a to FD1_d are connected to one second FD node FD2. The second FD node FD2 is an input node of the amplification transistor AMP. The photodiode PD corresponds to a specific example of the "photoelectric conversion element" of the present disclosure. The photodiode PD performs photoelectric conversion and generates charges according to the amount of received light. The cathode of the photodiode PD is electrically connected to the source of the transfer transistor TR, and the anode of the photodiode PD is given the potential applied to the well region. That is, it is electrically connected to a power supply line (eg, ground potential). Furthermore, the photodiode PD is provided inside a well region connected to this power supply line. The drain of the transfer transistor TR is electrically connected to the floating diffusion FD, and the gate of the transfer transistor TR is electrically connected to the pixel drive line 24. The transfer transistor TR is, for example, a CMOS (complementary metal oxide semiconductor) transistor.

The floating diffusion FDs of the sensor units 12 that share one readout circuit 22 are electrically connected to each other and to the input end of the common readout circuit 22 . The readout circuit 22 includes, for example, a reset transistor RES, a selection transistor SEL, and an amplification transistor AMP. Note that the selection transistor SEL may be omitted if necessary. The source of the reset transistor RES (the input terminal of the readout circuit 22) is electrically connected to the floating diffusion FD. From another perspective, the source of the reset transistor RES (the input terminal of the readout circuit 22) is electrically connected to the gate of the amplification transistor AMP. The drain of the reset transistor RES is electrically connected to the power supply line (SVDD) and the drain of the amplification transistor AMP. The gate of the reset transistor RES is electrically connected to the pixel drive line 24 (see FIG. 1). The source of the amplification transistor AMP is electrically connected to the drain of the selection transistor SEL, and the gate of the amplification transistor AMP is electrically connected to the source of the reset transistor RES. The source of the selection transistor SEL (output end of the readout circuit 22) is electrically connected to the pixel output line 25, and the gate of the selection transistor SEL is electrically connected to the pixel drive line 24 (see FIG. 1). .

When the transfer transistor TR is turned on, the transfer transistor TR transfers the charge of the photodiode PD to the floating diffusion FD. The reset transistor RES resets the potential of the floating diffusion FD to a predetermined potential. When the reset transistor RES turns on, it resets the potential of the floating diffusion FD to the potential of the power supply line (SVDD). From another perspective, it can be said that the reset transistor RES resets the potential of the gate of the amplification transistor AMP to a predetermined potential. This predetermined potential is typically a voltage corresponding to a voltage obtained by subtracting the threshold voltage of the reset transistor RES from the power supply voltage SVDD. The selection transistor SEL controls the output timing of the pixel signal from the readout circuit 22. The amplification transistor AMP generates, as a pixel signal, a voltage signal corresponding to the level of charge held in the floating diffusion FD. The amplification transistor AMP constitutes a source follower type amplifier, and outputs a pixel signal with a voltage corresponding to the level of charge generated by the photodiode PD. When the selection transistor SEL is turned on, the amplification transistor AMP amplifies the potential of the floating diffusion FD and outputs a voltage corresponding to the potential to the column signal processing circuit 34 via the pixel output line 25. The reset transistor RES, the amplification transistor AMP, and the selection transistor SEL are, for example, CMOS transistors.

Control signals VTX_a to d are applied from the vertical scanning circuit 42 to each transfer transistor TR_a to d. Control signals VTX_a to d have at least two voltage levels. The transfer transistor TR is here an N-type MOS transistor. When a relatively high voltage control signal VTX is input, the transfer transistor TR is turned on. Thereby, the signal charge of the photodiode PD is transferred to the first FD node FD1. On the other hand, when a relatively low voltage control signal VTX is input, the transfer transistor TR is turned off. As a result, the photodiode PD and the first FD node FD1 become non-conductive. Note that non-conduction is not limited to the fact that no current flows; for example, the flow of leakage current is included in the range of non-conduction. The amplitude of the control signal VTX can be considered as the difference between the voltage (typically ground potential) applied to the well region of the photodiode PD and a reference voltage. That is, the amplitude of the control signal VTX when turning on the transfer transistor TR is expressed by the difference between the well potential of the photodiode PD and the relatively high voltage of the control signal VTX. On the other hand, the amplitude of the control signal VTX when turning off the transfer transistor TR is expressed by the difference between the well potential of the photodiode PD and the relatively low voltage of the control signal VTX. Note that although the reference voltage for this amplitude is the well potential of the photodiode PD, it can also be viewed from a different perspective. In other words, the voltage of the control signal VTX that turns off the transfer transistor TR can be considered as the reference voltage. In this case, the amplitude of the control signal VTX that turns on the transfer transistor TR is the difference between the voltage of the control signal VTX that turns on the transfer transistor TR and the voltage of the control signal VTX that turns off the transfer transistor TR.

Note that the description has been made here assuming that the transfer transistor TR is an N-type MOS transistor. As described above, in this specification, the conductivity type of the transistor can be changed as appropriate. Naturally, the transfer transistor TR can also be a P-type MOS transistor. When the transfer transistor TR is a P-type MOS transistor, the transfer transistor TR is turned on when the control signal VTX is at a relatively low voltage. On the other hand, when the control signal VTX is at a relatively high voltage, the transfer transistor TR is turned off. Even in this case, when viewed as an amplitude from the reference voltage, the relationship is similar to the above-described relationship. In other words, when looking at the well potential of the photodiode PD (typically a positive voltage of about 3V) as a reference voltage, the amplitude of the control signal VTX that turns on the transfer transistor TR is equal to the amplitude of the control signal VTX that turns off the transfer transistor TR. It becomes larger than the amplitude (difference from the reference voltage). The same applies to the case where the reference voltage is the potential of the control signal TR when turning off the transfer transistor TR. That is, the amplitude (difference from the reference voltage) of the control signal VTX when turning on the transfer transistor TR is larger than the amplitude (difference from the reference voltage) of the control signal VTX when turning off the transfer transistor TR. Hereinafter, unless otherwise specified, amplitude will be explained as a difference from a reference voltage.

In this embodiment, the amplitude of the control signal VTX when turning on the transfer transistor TR is made larger than the amplitude of the power supply voltage SVDD, which is the voltage applied to the main node of the reset transistor RES. The description will be made assuming that the transfer transistor TR is an N-type MOS transistor, but when turning on the transfer transistor TR, the control signal VTX is set to 5V. On the other hand, the power supply voltage SVDD is set to 3V. That is, when the well potential (ground potential) of the photodiode PD is used as a reference voltage, the control signal VTX for turning on the transfer transistor TR has a larger amplitude than the power supply voltage SVDD. Further, a case will be described in which the reference voltage is the voltage of the control signal VTX when turning off the transfer transistor. The voltage of the control signal VTX when turning off the transfer transistor is −1V. Even when the voltage of the control signal VTX used to turn off the transfer transistor is set as a reference voltage, the control signal VTX used to turn on the transfer transistor TR has a larger amplitude than the power supply voltage SVDD. Note that although the voltage of the control signal VTX when turning off the transfer transistor is set to -1V, it may be set to another voltage such as a ground potential. Further, even when the transfer transistor TR is a P-type MOS transistor, as described above, the control signal VTX used to turn on the transfer transistor TR has a larger amplitude than the power supply voltage SVDD.

Note that although the explanation has been made here assuming that the possible values of the control signal VTX are binary, the control signal VTX may take more voltage values. For example, it is possible to cause signal charges to overflow from the photodiode PD to the first FD node FD1 during a period when the photodiode PD is accumulating signal charges. In this case, the control signal VTX may be adjusted between the on level and the off level of the transfer transistor TR during the period.

Note that it may be provided between the power supply line (SVDD) and the amplification transistor AMP. In this case, the drain of the reset transistor RES is electrically connected to the power supply line (SVDD) and the drain of the selection transistor SEL. The source of the selection transistor SEL is electrically connected to the drain of the amplification transistor AMP, and the gate of the selection transistor SEL is electrically connected to the pixel drive line 24 (see FIG. 1). The source of the amplification transistor AMP (output end of the readout circuit 22) is electrically connected to the pixel output line 25, and the gate of the amplification transistor AMP is electrically connected to the source of the reset transistor RES. Furthermore, a transistor for changing the capacitance value of the FD may be further provided in the electrical path between the reset transistor RES and the second FD node FD2.

FIG. 3 is a cross-sectional view of the photoelectric conversion device of this embodiment. This cross-sectional view shows a cross section of a line passing through the photodiode PD and the gate of the transfer transistor TR in the first component 10, the second component 20, and the third component 30. The semiconductor region 101 is a photodiode PD. In other words, the semiconductor region 101 is a photoelectric conversion region that generates and accumulates signal charges (electrons in this embodiment) according to incident light. Furthermore, the semiconductor region 101 is an N-type impurity region. FIG. 2 shows a configuration in which four sensor sections 12 are connected to one amplification transistor AMP. The cross-sectional view of FIG. 3 shows two sensor parts 12 that appear in one cross section among the four sensor parts 12.

The transfer gate 111 of the transfer transistor TR controls conduction between the semiconductor region 101 and the semiconductor region 121 (first semiconductor region) which is the region of the first FD node FD1. The semiconductor region 121 is an N-type semiconductor region. The pixel isolation section 201 is provided between the plurality of semiconductor regions 101 and electrically isolates the plurality of semiconductor regions 101. The pixel isolation section 201 may include an insulating section such as silicon oxide, or may be a semiconductor region forming a potential barrier. Typically, it is a semiconductor region whose main carriers are charges of opposite polarity to the signal charges accumulated by the photodiode PD. A pixel isolation layer 211 is provided between the pixel isolation section 201 and the semiconductor region 101. The pixel separation layer 211 has a role of reducing dark current, especially when the pixel separation section 201 is provided as an insulating section. The semiconductor region 121, which is the first FD node FD1, and the gate 141 of the amplification transistor AMP are connected via a conductor 205. The conductor 205 mainly contains metal such as tungsten and copper. The conductor 205 is formed to penetrate an insulator 251 that separates the semiconductor substrate 21 . The insulator 251 electrically isolates the plurality of readout circuits 22 from each other. Further, the insulator 251 is provided to penetrate the semiconductor substrate 21 from the third surface to the fourth surface.

The semiconductor substrate 14 includes a first surface F1 on the incident surface side and a second surface F2 opposite to the first surface. The semiconductor region 221 is a P-type semiconductor region provided in a region on the first surface F1 side (incident surface side) of the semiconductor region 101. The fixed charge film 231 is provided on the first surface F1 of the semiconductor substrate 14. Dark current entering the semiconductor region 101 is reduced by the semiconductor region 221 and the fixed charge film 231.

Microlens ML guides light to semiconductor region 101. A planarization layer 241 is provided between the microlens ML and the fixed charge film 231. Note that each of the plurality of sensor sections 12 may further be provided with a color filter to perform color separation.

The first part 100, the second part 200, and the third part 300 are stacked. The second component 200 is provided between the first component 100 and the third component 300. A transistor 301 is provided on the semiconductor substrate 31 of the third component 300. The second component 20 and the third component 30 are electrically connected via the connecting portion 311 . The connecting portion 311 is made of metal. Typically, the connection portion 311 mainly contains copper. Further, the connecting portion 311 is formed to further include a barrier metal (titanium, nickel, etc.) for suppressing copper diffusion.

FIG. 4 is a plan view of the second surface F2 of the first component 10 shown in FIG. 7 is a diagram also showing a plan view of the third component 30 as seen from the side. FIG.

In FIG. 4, members having the same functions as those shown in FIGS. 2 and 3 are designated by the same reference numerals as those shown in FIGS. 2 and 3. One transfer gate 111_a to 111_d is provided corresponding to each of the four semiconductor regions 101 that are photodiodes PD. Two transfer gates 111_a and 111_c are provided facing each other. Furthermore, two transfer gates 111_b and 111_d are provided facing each other. A semiconductor region 121, which is a first FD node FD1, is provided corresponding to each of the transfer gates 111_a to 111_d.

Further, a well contact 261 is provided to apply a predetermined potential (typically a ground potential) to the well region of the semiconductor substrate 14 of the first component 10. The voltage applied to this well region is the voltage applied to the well region of photodiode PD. Photodiode PD is provided inside this well region.

The semiconductor substrate 21 of the second component 20 is provided with a gate 141 of the amplification transistor AMP and a gate 151 of the selection transistor SEL. Further, a gate 131 of a reset transistor RES is provided. Further, a well contact is provided to apply a predetermined potential (typically a ground potential) to the well region of the semiconductor substrate 21 of the second component 20.

FIG. 5 is a cross-sectional view of the semiconductor substrate 14 of the first component 10 and the semiconductor substrate 21 of the second component 20. A gate insulating film G1 (first gate insulating film) is provided between the second surface F2 of the semiconductor substrate 14 and the transfer gate 111. Further, the semiconductor substrate 21 has a third surface F3 and a fourth surface F4 opposite to the third surface F3. A gate insulating film G2 (second gate insulating film) is provided between the third surface F3 of the semiconductor substrate 21 and the gate 141 of the amplification transistor AMP. Further, a gate insulating film G2 (second gate insulating film) is similarly provided between the third surface F3 of the semiconductor substrate 21 and the gate of the reset transistor RES. Further, a gate insulating film G2 (second gate insulating film) is similarly provided between the third surface F3 of the semiconductor substrate 21 and the gate of the selection transistor SEL.

Each of the gate insulating films G1 and G2 is typically a film mainly containing silicon and oxygen, or a film mainly containing silicon and nitrogen. That is, each of the gate insulating films G1 and G2 can be a silicon oxide film, a silicon oxynitride film, or a silicon nitride film.

In this embodiment, the film thicknesses of the gate insulating films G1 and G2 are made substantially equal to each other. What is meant by "substantially equal" is to allow variations in film thickness caused by errors caused by manufacturing variations. The film thicknesses of the gate insulating films G1 and G2 are determined based on the gate breakdown voltage required for the transfer transistor TR.

In this embodiment, the amplitude of the control signal VTX when turning on the transfer transistor TR is made larger than the amplitude of the power supply voltage SVDD, which is the voltage applied to the main node of the reset transistor RES. This effect will be explained.

In FIG. 6, the horizontal axis represents the distance from the semiconductor region 121, and the vertical axis represents the potential with respect to the signal charge (here, electrons) accumulated by the photodiode PD.

The potential curve E1 is a curve obtained when the power supply voltage SVDD is 5V. That is, this is a case where the floating diffusion FD is reset by a voltage obtained by subtracting the threshold value of the reset transistor RES from 5V. The photodiode PD is also reset to a voltage corresponding to the reset voltage of the floating diffusion FD. On the other hand, the potential curve E2 is a curve obtained when the power supply voltage SVDD is 3V. That is, this is a case where the floating diffusion FD is reset with a voltage obtained by subtracting the threshold value of the reset transistor RES from 3V. The photodiode PD is also reset to a voltage corresponding to the reset voltage of the floating diffusion FD. When the power supply voltage SVDD is lowered, the potential of the photodiode PD increases, and the potential curve becomes like E2. Furthermore, as the power supply voltage SVDD becomes lower, the transfer characteristics of the transfer transistor TR deteriorate. Therefore, it is conceivable to further reduce the impurity concentration of the photodiode PD. In this case, the potential curve of the semiconductor region 101 further rises to become a curve E3.

As a result, as the power supply voltage SVDD is lowered, the saturated charge amount of the photodiode PD decreases from the amount in the potential region P1 to the amount in the potential region P2. Therefore, the challenge is to achieve both a reduction in the power supply voltage and a saturation charge amount of the photodiode PD.

In this embodiment, the amplitude of the control signal VTX when turning on the transfer transistor TR is made larger than the amplitude of the power supply voltage SVDD, which is the voltage applied to the main node of the reset transistor RES. A potential curve according to this configuration is shown in FIG.

The potential region P1 is the same as in FIG. The potential curve according to this embodiment is shown as a curve E4. The amplitude of the control signal VTX when turning on the transfer transistor TR is made larger than the amplitude of the power supply voltage SVDD, which is the voltage applied to the main node of the reset transistor RES. Thereby, the potential barrier below the transfer gate 111 can be ensured as a sufficient barrier even when the power supply voltage SVDD is lowered. Therefore, even in the case of curve E4, the potential region P3 has a sufficient amount of saturated charge. In the form of FIG. 7, the saturation charge amounts in the potential region P1 and the potential region P3 are at approximately the same level. Thereby, the photoelectric conversion device of this embodiment can achieve both a low power supply voltage and a high saturation charge amount of the photodiode PD.

Note that in this embodiment, the film thicknesses of the gate insulating films G1 and G2 are set to be the same based on the gate breakdown voltage required for the transfer transistor TR. That is, the gate insulating film G1 of the transfer transistor TR and the gate insulating film G2 of the amplification transistor AMP, reset transistor RES, and selection transistor SEL, which are transistors of the second component 20, are set to have the same thickness. Thereby, it is possible to obtain sufficient gate breakdown voltage for the transistor included in the second component 20 as well.

Note that it is also possible to make the film thicknesses of the gate insulating films G1 and G2 different. The gate breakdown voltages of the amplification transistor AMP, the reset transistor RES, and the selection transistor SEL may be at a level lower than that of the transfer transistor TX to which a control signal VTX having an amplitude larger than the power supply voltage SVDD is applied. Therefore, the gate insulating film G2 of the transistor of the second component 20 can be made thinner than the gate insulating film G1 of the transfer transistor TR.

Note that, in this embodiment, a mode in which four photodiodes PD share one second FD node FD2 has been described, but the present invention is not limited to this mode. In other words, more photodiodes PD may share one second FD node FD2.

Further, as shown in FIG. 8, one photodiode PD may be connected to one second FD node FD2. In the configuration shown in FIG. 8, one photodiode PD is connected to the gate 141 of the amplification transistor AMP, which is one second FD node FD2. In FIG. 8, each member is given the same reference numeral as the member having the same function as each member shown in FIG. 3, and the explanation thereof will be omitted.

FIG. 9 is a plan view of a configuration in which one photodiode PD shown in FIG. 8 is connected to one second FD node FD2. Similar to FIG. 4, this plan view includes a plan view of the second surface F2 of the first component 10 viewed from the second component 21 side, and a plan view of the second component 20 viewed from the third component 30 side. It is a figure shown together.

In FIG. 9, members having the same functions as those shown in FIG. 4 are designated by the same reference numerals as those shown in FIG. A transfer gate 111 is provided in one semiconductor region 101 that is a photodiode PD. The gate 141 of the amplification transistor AMP of one readout circuit 22 is connected to one semiconductor region 101 and one semiconductor region 121 that is the first FD node FD1.

Also in this configuration, as described in this embodiment, the amplitude of the control signal VTX when turning on the transfer transistor TR is made larger than the amplitude of the power supply voltage SVDD, which is the voltage applied to the main node of the amplification transistor AMP. Can be applied. Thereby, the effects described in this embodiment can be similarly obtained.

Further, in this embodiment, the voltages applied to the main node of the amplification transistor AMP and the main node of the reset transistor RES are both the same power supply voltage SVDD, but the voltage is not limited to this example. In other words, different power supply voltages may be applied to the main node of the amplification transistor AMP and the main node of the reset transistor RES. In this case, if a control signal VTX having an amplitude larger than at least one of the first power supply voltage of the main node of the reset transistor RES and the second power supply voltage of the main node of the amplification transistor AMP is applied when the transfer transistor TR is on, good. Among these, when the control signal VTX with a larger amplitude than the first power supply voltage applied to the main node of the reset transistor RES is applied when the transfer transistor TR is on, a decrease in the saturation charge amount of the photodiode PD is particularly suppressed. This is preferable because it can be done.

<Second embodiment>
In this embodiment, the gate insulating film G1 and the gate insulating film G2 have different dielectric constants.

The configuration of the photoelectric conversion device of this embodiment can be the same as that of the first embodiment.

The following description will be made based on FIG. 5 described in the first embodiment.

FIG. 5 is a cross-sectional view of the semiconductor substrate 14 of the first component 10 and the semiconductor substrate 21 of the second component 20. A gate insulating film G1 (first gate insulating film) is provided between the second surface F2 of the semiconductor substrate 14 and the transfer gate 111. Further, the semiconductor substrate 21 has a third surface F3 and a fourth surface F4 opposite to the third surface F3. A gate insulating film G2 (second gate insulating film) is provided between the third surface F3 of the semiconductor substrate 21 and the gate 141 of the amplification transistor AMP. Note that, as in the first embodiment, a gate insulating film G2 is also provided between each of the gate of the selection transistor SEL and the gate of the reset transistor RES and the third surface F3 of the semiconductor substrate 21. Each of the gate insulating films G1 and G2 is typically a film mainly containing silicon and oxygen, or a film mainly containing silicon and nitrogen. That is, each of the gate insulating films G1 and G2 can be a silicon oxide film, a silicon oxynitride film, or a silicon nitride film.

In this embodiment, the gate insulating films G1 and G2 have different dielectric constants. On the other hand, the film thicknesses of the gate insulating films G1 and G2 are made substantially equal to each other. What is meant by "substantially equal" is to allow variations in film thickness caused by errors caused by manufacturing variations. Further, in this embodiment, the dielectric constant of the gate insulating film G2 is made higher than that of the gate insulating film G1. Thereby, the driving force of the amplification transistor AMP can be improved. On the other hand, by making the relative permittivity of the gate insulating film G1 lower than the relative permittivity of the gate insulating film G2, formation of a strong electric field in the semiconductor region under the transfer gate is suppressed. This makes it possible to reduce leakage current generated near the transfer gate, thereby reducing noise. Transfer efficiency by the transfer gate 111 can be improved. The dielectric constants of the gate insulating films G1 and G2 can be varied by, for example, varying the concentration of nitrogen. That is, in order to increase the dielectric constant of the gate insulating film, the nitrogen concentration is increased. Therefore, in this embodiment, by making the nitrogen concentration contained in the gate insulating film G1 higher than the nitrogen concentration contained in the gate insulating film G2, the dielectric constants of the gate insulating films can be made different. In this example, the gate insulating film G1 may be a silicon oxynitride film or a silicon nitride film, and the gate insulating film G2 may be a silicon oxide film.

Further, the dielectric constant of the gate insulating film may be varied by a method other than the method of varying the nitrogen concentration. For example, the gate insulating films G1 and G2 may contain the same element but have different film densities. By reducing the film density of the gate insulating film, the relative permittivity decreases. Therefore, the film density of the gate insulating film G1 is made smaller than the film density of the gate insulating film G2. This makes the dielectric constant of the gate insulating film G2 higher than that of the gate insulating film G1. Furthermore, the film densities of the gate insulating films G1 and G2 may be made different, and the nitrogen concentrations may also be made different. The relative dielectric constant of the gate insulating film G2 may be made larger than that of the gate insulating film G1 by varying the film density and nitrogen concentration. In this case, the film density of the gate insulating film G2 is made smaller than that of the gate insulating film G1, but the nitrogen concentration contained in the gate insulating film G2 is made higher than the nitrogen concentration contained in the gate insulating film G1. Thereby, the relative permittivity of the gate insulating film G2 can be made larger than the relative permittivity of the gate insulating film G1. Further, although the nitrogen concentration contained in the gate insulating film G1 is higher than the nitrogen concentration contained in the gate insulating film G2, the film density is made higher in the gate insulating film G2 than in the gate insulating film G1. Thereby, the relative permittivity of the gate insulating film G2 can be made larger than the relative permittivity of the gate insulating film G1.

In this embodiment, the transfer transistor TR and the amplification transistor AMP are provided on different semiconductor substrates. This allows the gate insulating films G1 and G2 to have different dielectric constants. In this embodiment, the dielectric constant of the gate insulating film G1 is lower than that of the gate insulating film G2. Thereby, it is possible to both increase the driving force of the amplification transistor AMP and reduce the noise of the transfer gate 111.

Note that, in this embodiment, a mode in which four photodiodes PD share one second FD node FD2 has been described, but the present invention is not limited to this mode. In other words, more photodiodes PD may share one second FD node FD2.

Further, as shown in FIGS. 8 and 9, only one photodiode PD may be connected to one second FD node FD2. Also in this configuration, the same effects as in this embodiment can be obtained.

<Third embodiment>
The photoelectric conversion device of this embodiment will be described focusing on the differences from the second embodiment.

FIG. 10 is shown as a cross-sectional view of the photoelectric conversion device of this embodiment. The photoelectric conversion device of this embodiment can have a configuration similar to that shown in FIGS. 2 to 4. Note that the present invention can also be applied to the configurations of the photoelectric conversion devices shown in FIGS. 8 and 9.

In FIG. 10, members having the same functions as those shown in FIG. 5 are given the same reference numerals as those shown in FIG. 5.

In the photoelectric conversion device of this embodiment, the protective film (first protective film) that covers the transfer gate 111 and the protective film (second protective film) that covers the gate 141 of the amplification transistor AMP are made to have different thicknesses. The film thickness T1a of the protective film 411 (first protective film) covering the transfer gate 111 is made larger than the film thickness T2a of the protective film 412 (second protective film) covering the gate 141 of the amplification transistor AMP. Each of the protective films 411 and 412 is typically a film mainly containing silicon and nitrogen. Typically, it is a silicon nitride film. The protective film 411 functions as an etching stop film when the conductor 205 is passed through. The conductor 205 requires a process of penetrating the insulating film L1 of the second component 20, the insulator 251 provided between the semiconductor substrate 21, and the insulating film L2 of the first component 10. Therefore, by making the protective film 411 thicker than the protective film 412, it is possible to obtain the effect of making it difficult to damage the semiconductor region 121.

Note that in this embodiment as well, the gate insulating films G1 and G2 have different dielectric constants, similar to the first embodiment. Thereby, the effects obtained in the first embodiment can also be obtained in this embodiment.

<Fourth embodiment>
This embodiment is applicable to any of the first to third embodiments. FIG. 11A is a schematic diagram illustrating a device 9191 including the semiconductor device 930 of this embodiment. The photoelectric conversion device (imaging device) of each embodiment described above can be used for the semiconductor device 930. The device 9191 including the semiconductor device 930 will be described in detail. The semiconductor device 930 can include the package 920 that houses the semiconductor device 910 in addition to the semiconductor device 910 having the semiconductor layer 10, as described above. The package 920 can include a base body to which the semiconductor device 910 is fixed, and a lid body made of glass or the like that faces the semiconductor device 910. The package 920 can further include a bonding member such as a bonding wire or a bump that connects the terminal provided on the base and the terminal provided on the semiconductor device 910.

The device 9191 can include at least one of an optical device 940, a control device 950, a processing device 960, a display device 970, a storage device 980, and a mechanical device 990. Optical device 940 corresponds to semiconductor device 930. The optical device 940 is, for example, a lens, a shutter, or a mirror. Control device 950 controls semiconductor device 930. The control device 950 is, for example, a semiconductor device such as an ASIC.

Processing device 960 processes the signal output from semiconductor device 930. The processing device 960 is a semiconductor device such as a CPU or an ASIC for configuring an AFE (analog front end) or a DFE (digital front end). The display device 970 is an EL display device or a liquid crystal display device that displays information (image) obtained by the semiconductor device 930. The storage device 980 is a magnetic device or a semiconductor device that stores information (image) obtained by the semiconductor device 930. The storage device 980 is a volatile memory such as SRAM or DRAM, or a nonvolatile memory such as a flash memory or a hard disk drive.

Mechanical device 990 has a movable part or a propulsion part such as a motor or an engine. The device 9191 displays the signal output from the semiconductor device 930 on the display device 970 or transmits it to the outside using a communication device (not shown) included in the device 9191. For this reason, it is preferable that the device 9191 further includes a storage device 980 and a processing device 960, in addition to the storage circuit and arithmetic circuit included in the semiconductor device 930. Mechanical device 990 may be controlled based on a signal output from semiconductor device 930.

Further, the device 9191 is suitable for electronic devices such as information terminals (for example, smartphones and wearable terminals) and cameras (for example, interchangeable lens cameras, compact cameras, video cameras, and surveillance cameras) that have a shooting function. Mechanical device 990 in the camera can drive parts of optical device 940 for zooming, focusing, and shutter operation. Alternatively, the mechanical device 990 in the camera can move the semiconductor device 930 for anti-vibration operation.

Further, the device 9191 may be a transportation device such as a vehicle, a ship, or an aircraft. Mechanical device 990 in a transportation device can be used as a moving device. The device 9191 as a transport device is suitable for transporting the semiconductor device 930 or for assisting and/or automating driving (maneuvering) using a photographing function. A processing device 960 for assisting and/or automating driving (maneuvering) can perform processing for operating a mechanical device 990 as a mobile device based on information obtained by the semiconductor device 930. Alternatively, the device 9191 may be a medical device such as an endoscope, a measuring device such as a distance sensor, an analytical device such as an electron microscope, an office device such as a copying machine, or an industrial device such as a robot.

According to the embodiments described above, it is possible to obtain good pixel characteristics. Therefore, the value of the semiconductor device can be increased. Increasing value here includes at least one of the following: adding functionality, improving performance, improving characteristics, improving reliability, improving manufacturing yield, reducing environmental impact, reducing cost, downsizing, and reducing weight. Applicable.

Therefore, if the semiconductor device 930 according to this embodiment is used in the device 9191, the value of the device can also be improved. For example, by mounting the semiconductor device 930 on a transportation device, excellent performance can be obtained when photographing the exterior of the transportation device or measuring the external environment. Therefore, when manufacturing and selling transportation equipment, deciding to mount the semiconductor device according to this embodiment on the transportation equipment is advantageous in improving the performance of the transportation equipment itself. In particular, the semiconductor device 930 is suitable for transportation equipment that performs driving support and/or automatic operation of transportation equipment using information obtained by the semiconductor device.

Further, the photoelectric conversion system and moving body of this embodiment will be explained using FIGS. 11(b) and 11(c).

FIG. 11(a) shows an example of a photoelectric conversion system related to an on-vehicle camera. The photoelectric conversion system 8 includes a photoelectric conversion device 80. The photoelectric conversion device 80 is the photoelectric conversion device (imaging device) described in any of the above embodiments. The photoelectric conversion system 8 includes an image processing unit 801 that performs image processing on the plurality of image data acquired by the photoelectric conversion device 80, and a parallax (position of parallax images) from the plurality of image data acquired by the photoelectric conversion system 8. It has a parallax acquisition unit 802 that calculates phase difference). The photoelectric conversion system 8 also includes a distance acquisition unit 803 that calculates the distance to the object based on the calculated parallax, and a collision determination unit that determines whether there is a possibility of a collision based on the calculated distance. 804. Here, the parallax acquisition unit 802 and the distance acquisition unit 803 are examples of distance information acquisition means that acquires distance information to the target object. That is, distance information is information regarding parallax, defocus amount, distance to a target object, and the like. The collision determination unit 804 may determine the possibility of collision using any of these distance information. The distance information acquisition means may be realized by specially designed hardware or may be realized by a software module. Further, it may be realized by an FPGA (Field Programmable Gate Array), an ASIC (Application Specific Integrated Circuit), or a combination thereof.

The photoelectric conversion system 8 is connected to a vehicle information acquisition device 810, and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. Further, the photoelectric conversion system 8 is connected to a control ECU 820 that is a control device that outputs a control signal for generating a braking force to the vehicle based on the determination result by the collision determination unit 804. The photoelectric conversion system 8 is also connected to a warning device 830 that issues a warning to the driver based on the determination result of the collision determination unit 804. For example, if the collision determination unit 804 determines that there is a high possibility of a collision, the control ECU 820 performs vehicle control to avoid the collision and reduce damage by applying the brakes, releasing the accelerator, or suppressing engine output. The alarm device 830 warns the user by sounding an alarm such as a sound, displaying alarm information on a screen of a car navigation system, etc., or applying vibration to a seat belt or steering wheel.

In this embodiment, the photoelectric conversion system 8 images the surroundings of the vehicle, for example, the front or the rear. FIG. 11C shows a photoelectric conversion system used to image the front of the vehicle (imaging range 850). Vehicle information acquisition device 810 sends instructions to photoelectric conversion system 8 or photoelectric conversion device 80 . With such a configuration, the accuracy of distance measurement can be further improved.

Above, we explained an example of control to avoid collisions with other vehicles, but it can also be applied to control to automatically drive while following other vehicles, control to automatically drive to avoid moving out of the lane, etc. . Furthermore, the photoelectric conversion system can be applied not only to vehicles such as own vehicle, but also to mobile objects (mobile devices) such as ships, aircraft, and industrial robots. In addition, the present invention can be applied not only to mobile objects but also to a wide range of devices that use object recognition, such as intelligent transportation systems (ITS).

[Modified embodiment]
The present invention is not limited to the above-described embodiments, and various modifications are possible.

For example, examples in which a part of the configuration of one embodiment is added to another embodiment, or examples in which part of the configuration of another embodiment is replaced are also included in the embodiments of the present invention.

Further, the device (photoelectric conversion system) shown in the fourth embodiment is an example of a photoelectric conversion system to which the photoelectric conversion device can be applied, and is a photoelectric conversion system to which the photoelectric conversion device of the present invention can be applied. is not limited to the configuration shown in FIG.

Note that the above embodiments are merely examples of implementation of the present invention, and the technical scope of the present invention should not be interpreted to be limited by these embodiments. That is, the present invention can be implemented in various forms without departing from its technical idea or main features.

The embodiments described above can be modified as appropriate without departing from the technical concept. Note that the disclosure content of this specification includes not only what is described in this specification, but also all matters that can be understood from this specification and the drawings attached to this specification. The disclosure herein also includes the complement of the concepts described herein. In other words, if the specification includes, for example, the statement "A is greater than B," even if the statement "A is not greater than B" is omitted, the specification still states "A is greater than B." It can be said that the company has disclosed that it is not large. This is because when it is stated that "A is larger than B", it is assumed that "A is not larger than B" is being considered.

Note that the present disclosure includes the following configuration.

(Configuration 1)
A first semiconductor substrate having a first surface and a second surface opposite to the first surface, a photoelectric conversion section that receives light from the second surface, a first semiconductor region, and a signal charge of the photoelectric conversion section. a first component having a transfer transistor having a transfer gate provided on the side of the first surface, which transfers data to the first semiconductor region;
a second semiconductor substrate laminated on the first component, the second semiconductor substrate having a third surface and a fourth surface opposite to the third surface; an amplification transistor having a gate provided on the side; and a second component having a reset transistor for resetting the gate;
The difference between the power supply voltage applied to the main node of the reset transistor and the reference voltage is greater than the difference between the voltage applied to the transfer gate and the reference voltage during the period of transferring the signal charge from the photoelectric conversion unit to the first semiconductor region. A photoelectric conversion device characterized in that the difference between the two is larger.

(Configuration 2)
A first semiconductor substrate having a first surface and a second surface opposite to the first surface, a photoelectric conversion section that receives light from the second surface, a first semiconductor region, and a signal charge of the photoelectric conversion section. a first component having a transfer transistor having a transfer gate provided on the side of the first surface, which transfers data to the first semiconductor region;
a second semiconductor substrate laminated on the first component, the second semiconductor substrate having a third surface and a fourth surface opposite to the third surface; an amplification transistor having a gate provided on the side; and a second component having a reset transistor for resetting the gate;
A first power supply voltage is applied to the main node of the reset transistor, a second power supply voltage is applied to the main node of the amplification transistor,
The difference between the voltage applied to the transfer gate during the period of transferring the signal charge from the photoelectric conversion unit to the first semiconductor region and the reference voltage is larger than the difference between the first power supply voltage and the reference voltage and the reference voltage. A photoelectric conversion device characterized in that the difference between the second power supply voltage and the reference voltage is greater than at least one of the two.

(Configuration 3)
The photoelectric conversion section is formed inside a well region,
The photoelectric conversion device according to Structure 1 or Structure 2, wherein the reference voltage is a voltage applied to the well region.

(Configuration 4)
The photoelectric conversion device according to configuration 1 or configuration 2, wherein the reference voltage is a voltage applied to the transfer gate during a period when the transfer transistor is off.

(Configuration 5)
a first gate insulating film is provided between the first surface and the transfer gate,
a second gate insulating film is provided between the gates;
5. The photoelectric conversion device according to any one of configurations 1 to 4, wherein the thickness of the first gate insulating film is greater than the thickness of the second gate insulating film.

(Configuration 6)
a first gate insulating film is provided between the first surface and the transfer gate,
a second gate insulating film is provided between the gates;
5. The photoelectric conversion device according to any one of configurations 1 to 4, wherein the thickness of the first gate insulating film and the thickness of the second gate insulating film are substantially equal.

(Configuration 7)
The photoelectric conversion device according to Structure 6 or Structure 7, wherein the relative permittivity of the first gate insulating film and the relative permittivity of the second gate insulating film are different.

(Configuration 8)
8. The photoelectric conversion device according to configuration 7, wherein the first gate insulating film is a film mainly containing silicon and oxygen, and the second gate insulating film is a film mainly containing silicon and nitrogen.

(Configuration 9)
The configuration further includes a third component having an AD conversion section that converts the signal output by the amplification transistor into a digital signal, and the first component, the second component, and the third component are stacked. 9. The photoelectric conversion device according to any one of configurations 1 to 8.

(Configuration 10)
A device comprising the photoelectric conversion device according to any one of Configurations 1 to 9,
an optical device compatible with the photoelectric conversion device;
a control device that controls the photoelectric conversion device;
a processing device that processes the signal output from the photoelectric conversion device;
a display device that displays information obtained by the photoelectric conversion device;
a storage device that stores information obtained by the photoelectric conversion device; and
A device further comprising at least one of a mechanical device that operates based on information obtained by the photoelectric conversion device.

10 First component 14 First semiconductor substrate 20 Second component 21 Second semiconductor substrate 30 Third component 31 Third semiconductor substrate 101 Semiconductor region (photoelectric conversion section)
111 Transfer gate 121 Semiconductor region (first semiconductor region)
141 Gate of amplification transistor 205 Conductor F1 First surface F2 Second surface F3 Third surface F4 Fourth surface G1 First gate insulating film G2 Second gate insulating film

Claims (18)

A first semiconductor substrate having a first surface and a second surface opposite to the first surface, a photoelectric conversion section that receives light from the second surface, a first semiconductor region, and a signal charge of the photoelectric conversion section. a first component having a transfer transistor having a transfer gate provided on the side of the first surface, which transfers data to the first semiconductor region;
a second semiconductor substrate laminated on the first component, the second semiconductor substrate having a third surface and a fourth surface opposite to the third surface; an amplification transistor having a gate provided on the side; and a second component having a reset transistor for resetting the gate;
The voltage applied to the transfer gate during the period of transferring the signal charge from the photoelectric conversion unit to the first semiconductor region is greater than the difference between the power supply voltage applied to the main node of the reset transistor and the reference voltage. A photoelectric conversion device characterized in that the difference is larger. A first semiconductor substrate having a first surface and a second surface opposite to the first surface, a photoelectric conversion section that receives light from the second surface, a first semiconductor region, and a signal charge of the photoelectric conversion section. a first component having a transfer transistor having a transfer gate provided on the side of the first surface, which transfers data to the first semiconductor region;
a second semiconductor substrate laminated on the first component, the second semiconductor substrate having a third surface and a fourth surface opposite to the third surface; an amplification transistor having a gate provided on the side; and a second component having a reset transistor for resetting the gate;
A first power supply voltage is applied to the main node of the reset transistor, a second power supply voltage is applied to the main node of the amplification transistor,
The difference between the voltage applied to the transfer gate during the period of transferring the signal charge from the photoelectric conversion unit to the first semiconductor region and the reference voltage is larger than the difference between the first power supply voltage and the reference voltage and the reference voltage. A photoelectric conversion device characterized in that the difference between the second power supply voltage and the reference voltage is greater than at least one of the two. The photoelectric conversion section is formed inside a well region,
The photoelectric conversion device according to claim 1, wherein the reference voltage is a voltage applied to the well region. The photoelectric conversion section is formed inside a well region,
3. The photoelectric conversion device according to claim 2, wherein the reference voltage is a voltage applied to the well region. 2. The photoelectric conversion device according to claim 1, wherein the reference voltage is a voltage applied to the transfer gate while the transfer transistor is off. 3. The photoelectric conversion device according to claim 2, wherein the reference voltage is a voltage applied to the transfer gate while the transfer transistor is off. a first gate insulating film is provided between the first surface and the transfer gate,
a second gate insulating film is provided between the gates;
The photoelectric conversion device according to claim 1, wherein the thickness of the first gate insulating film is greater than the thickness of the second gate insulating film. a first gate insulating film is provided between the first surface and the transfer gate,
a second gate insulating film is provided between the gates;
3. The photoelectric conversion device according to claim 2, wherein the thickness of the first gate insulating film is greater than the thickness of the second gate insulating film. a first gate insulating film is provided between the first surface and the transfer gate,
a second gate insulating film is provided between the gates;
2. The photoelectric conversion device according to claim 1, wherein the thickness of the first gate insulating film and the thickness of the second gate insulating film are approximately equal. a first gate insulating film is provided between the first surface and the transfer gate,
a second gate insulating film is provided between the gates;
3. The photoelectric conversion device according to claim 2, wherein the thickness of the first gate insulating film and the thickness of the second gate insulating film are approximately equal. 8. The photoelectric conversion device according to claim 7, wherein the relative permittivity of the first gate insulating film and the relative permittivity of the second gate insulating film are different. 9. The photoelectric conversion device according to claim 8, wherein the relative permittivity of the first gate insulating film and the relative permittivity of the second gate insulating film are different. 10. The photoelectric conversion device according to claim 9, wherein the relative permittivity of the first gate insulating film and the relative permittivity of the second gate insulating film are different. 11. The photoelectric conversion device according to claim 10, wherein the relative permittivity of the first gate insulating film and the relative permittivity of the second gate insulating film are different. 12. The photoelectric conversion device according to claim 11, wherein the first gate insulating film is a film mainly containing silicon and oxygen, and the second gate insulating film is a film mainly containing silicon and nitrogen. A claim further comprising a third component having an AD conversion section that converts the signal output by the amplification transistor into a digital signal, and the first component, the second component, and the third component are stacked. Item 1. The photoelectric conversion device according to item 1. A claim further comprising a third component having an AD conversion section that converts the signal output by the amplification transistor into a digital signal, and the first component, the second component, and the third component are stacked. Item 2. The photoelectric conversion device according to item 2. A device comprising the photoelectric conversion device according to any one of claims 1 to 17,
an optical device compatible with the photoelectric conversion device;
a control device that controls the photoelectric conversion device;
a processing device that processes the signal output from the photoelectric conversion device;
a display device that displays information obtained by the photoelectric conversion device;
a storage device that stores information obtained by the photoelectric conversion device; and
A device further comprising at least one of a mechanical device that operates based on information obtained by the photoelectric conversion device.

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