JP2023176355A - Voltage detection circuit of charge pump and gate drive circuit - Google Patents

Abstract

To provide a voltage detection circuit of a charge pump, capable of detecting a pressure rise voltage by a charge pump circuit with high accuracy as well as reducing a power consumption current, and provide a gate drive circuit.SOLUTION: A voltage current conversion circuit converts an emitter potential difference of a transistor Q2 and a transistor Q4 into a current difference flowing in the transistor Q2 and the transistor Q4. Each of Zener diodes dz1 and Dz2 is connected to between a first input 18 into which a gate voltage VG is inputted and an emitter of the transistor Q2, and is not connected to a second input 19 into which a DC voltage VDD1 and an emitter of the transistor Q4. A comparison circuit 20 compares a current flowing in each of the transistors Q2 and Q4, and outputs their comparison result.SELECTED DRAWING: Figure 2

Description

The present invention relates to a voltage detection circuit and a gate drive circuit for a charge pump.

Overcurrent protection circuits have been proposed that turn off a load switch to interrupt the overcurrent when an overcurrent flows through the load. When an N-channel field effect transistor (MOS transistor) is used as a load switch, a boosted voltage obtained by boosting the power supply voltage is supplied to the gate of the MOS transistor by a charge pump circuit. Additionally, in order to reduce power consumption, there is a method that stops the boost operation of the charge pump circuit when the boost voltage, that is, the gate voltage, rises sufficiently, and restarts the boost operation when it drops to a certain value. It becomes necessary.

The gate voltage operates over a wide voltage range from near ground to above the power supply voltage. Conventionally, as a method for detecting a voltage in which the input voltage changes over a wide voltage range, a circuit as disclosed in Patent Document 1, for example, has been proposed. As a voltage detection circuit for a charge pump that detects an increase or decrease in gate voltage using the circuit of Patent Document 1, for example, one shown in FIG. 4 can be considered.

The charge pump voltage detection circuit 100 shown in FIG. 4 is a circuit that compares the voltage difference between the gate voltage VG and the DC voltage VDD1 and the reference voltage Vref. In the voltage detection circuit 100, the emitter potential difference between the transistors Q1 and Q2 and the transistors Q3 and Q4 becomes the difference in current flowing through the transistors Q2 and Q4. Therefore, the emitter potential difference between the transistors Q2 and Q4 is detected as the voltage difference between the resistors R31 and R32 connected in series with the transistors Q2 and Q4. The output of the comparator 101 that compares the voltages across the resistors R31 and R22 is the output of the voltage detection circuit 100.

Further, in order to set the reference voltage Vref, a current mirror circuit 102 and a constant current source 103 are provided which sink a constant current I3 from the current flowing through the resistor R21. The reference voltage Vref is expressed by the following formula.
Vref=R21・I3

As the reference voltage Vref, approximately 10V to 15V is required. It is desirable to suppress the constant current I3 to a small value in terms of current consumption. If the current value of the constant current I3 is 1 μA and a potential difference of 10 V is detected, the resistance value of the resistor R21 is 10 MΩ.

By the way, the gain of the voltage detection circuit 100 depends on the value of the resistor R21, and the higher the resistance value of the resistor R21, the lower the gain, and the lower the detection accuracy. Therefore, the conventional voltage detection circuit 100 has a problem in that it is not possible to reduce current consumption and improve detection accuracy at the same time.

Japanese Patent Application Publication No. 05-232147

The present invention has been made in view of the above-mentioned circumstances, and its purpose is to provide a charge pump voltage detection circuit that can reduce current consumption and accurately detect the boosted voltage boosted by the charge pump circuit. It is about providing.

In order to achieve the above-mentioned object, a voltage detection circuit and a gate drive circuit for a charge pump according to the present invention are characterized by the following [1] to [6].
[1]
a first transistor whose collector and base are connected or whose drain and gate are connected;
An emitter is connected to an emitter of the first transistor, and a base is connected to a base of the first transistor, or a source is connected to a source of the first transistor, and a gate of the first transistor is connected to the emitter of the first transistor. a second transistor whose gate is connected;
a third transistor whose collector and base are connected or whose drain and gate are connected;
The emitter is connected to the emitter of the third transistor, and the base is connected to the base of the third transistor, or the source is connected to the source of the third transistor, and the gate of the third transistor is connected to the emitter of the third transistor. a fourth transistor whose gate is connected;
a constant current source connected to the first transistor and the third transistor,
a voltage-current conversion circuit that converts an emitter potential difference or a source potential difference between the second transistor and the fourth transistor into a current difference flowing through the second transistor and the fourth transistor;
a first input that receives a boosted voltage obtained by boosting a DC voltage by a charge pump circuit and is connected to the emitter or source of the second transistor;
a second input to which the DC voltage is input and connected to the emitter or source of the fourth transistor;
a first Zener diode connected between the first input and the emitter or source of the second transistor;
a comparison circuit that outputs a comparison result of currents flowing through the second transistor and the fourth transistor, and stops or starts boosting operation of the charge pump circuit according to the comparison result. Must be a voltage detection circuit.
[2]
In the charge pump voltage detection circuit described in [1],
a first resistor connected in series with the first Zener diode between the first input and the emitter or source of the second transistor;
a second resistor connected between the second input and the emitter or source of the fourth transistor;
The resistance values of the first resistor and the second resistor are set to different values,
Must be a charge pump voltage detection circuit.
[3]
In the charge pump voltage detection circuit described in [1],
further comprising a diode-connected bipolar transistor connected in series with the first Zener diode between the first input and the emitter or source of the second transistor;
Must be a charge pump voltage detection circuit.
[4]
In the charge pump voltage detection circuit described in [1],
The constant current source has a second Zener diode, and is configured from a constant current circuit that flows a constant current according to the Zener voltage of the second Zener diode.
Must be a charge pump voltage detection circuit.
[5]
In the charge pump voltage detection circuit described in [1],
The comparison circuit includes a current mirror circuit whose input is connected to the collector or drain of the fourth transistor and whose output is connected to the collector or drain of the second transistor.
Must be a charge pump voltage detection circuit.
[6]
a charge pump circuit that supplies a boosted voltage obtained by boosting the DC voltage to the gate of a load switch transistor connected between a DC power source and a load;
The charge pump voltage detection circuit according to any one of [1] to [5],
Must be a gate drive circuit.

According to the present invention, it is possible to provide a charge pump voltage detection circuit and a gate drive circuit that can reduce current consumption and accurately detect the boosted voltage boosted by the charge pump circuit.

The present invention has been briefly described above. Furthermore, the details of the present invention will be further clarified by reading the mode for carrying out the invention (hereinafter referred to as "embodiment") described below with reference to the accompanying drawings. .

FIG. 1 is a circuit diagram showing a power supply device incorporating a charge pump voltage detection circuit according to the present invention. FIG. 2 is a circuit diagram showing details of the first voltage detection circuit shown in FIG. 1 in the first embodiment. FIG. 3 is a circuit diagram showing details of the first voltage detection circuit shown in FIG. 1 in the second embodiment. FIG. 4 is a circuit diagram showing an example of a conventional charge pump voltage detection circuit.

(First embodiment)
A first embodiment of the present invention will be described below with reference to each figure.

FIG. 1 is a circuit diagram showing a power supply device incorporating a charge pump voltage detection circuit of the present invention in a first embodiment. As shown in the figure, the power supply device 1 is a device that supplies a DC voltage VDD1 output from a power supply 2 to a load RL. The power supply device 1 includes a load switch transistor MSW connected between a power supply 2 and a load RL, a sense resistor Rs for detecting the current flowing through the load RL, and an on/off control of the transistor MSW to prevent overcurrent. The overcurrent protection circuit 3 protects the power supply 2 and the load RL from damage.

Transistor MSW is composed of an N-channel field effect transistor. Transistor MSW is connected to the positive electrode side of power supply 2 rather than load RL. The transistor MSW has a source connected to the load RL, and a drain connected to the positive electrode of the power supply 2 via the sense resistor Rs.

The overcurrent protection circuit 3 includes a power source 4, an overcurrent cutoff circuit 5, and a gate drive circuit 6. Power supply 4 outputs DC voltage VDD2. The overcurrent cutoff circuit 5 is a circuit that turns off the transistor MSW to cut off the overcurrent when an overcurrent flows through the load RL. The gate drive circuit 6 is a circuit that turns on the transistor MSW.

First, the overcurrent cutoff circuit 5 will be explained. The overcurrent cutoff circuit 5 includes a differential amplifier 7 that amplifies the voltage across the sense resistor Rs according to the load current, and when an overcurrent is detected based on the output of the differential amplifier 7, the gate of the transistor MSW is pulled down to ground. , and a gate control circuit 8 for forcibly turning off the transistor MSW.

Next, details of the gate drive circuit 6 will be explained. The gate drive circuit 6 includes a charge pump circuit 9, a constant current circuit 10, a resistor R1, a first voltage detection circuit 11, a second voltage detection circuit 12, and a charge pump control circuit 13. There is. The charge pump circuit 9 is a circuit that boosts the DC voltage VDD1 and supplies it to the gate of the transistor MSW. The constant current circuit 10 is a circuit that receives current supply from the charge pump circuit 9 and outputs a constant current I1. In this embodiment, the constant current circuit 10 includes a constant current source 15 and transistors M11 and M12 forming a current mirror circuit.

Constant current source 15 outputs constant current I1. Transistors M11 and M12 are composed of P-channel field effect transistors. The gate and drain of the transistor M11 are connected. Constant current source 15 is connected between the drain of transistor M11 and ground. The gate and source of the transistor M12 are connected to the gate and source of the transistor M11. The drain of transistor M12 is connected to the gate of transistor MSW. According to the above configuration, the constant current I1 output from the constant current source 15 is returned to the drain of the transistor M12 as a current according to the transistor size ratio of the transistors M11 and M12.

The resistor R1 has one end connected to the drain of the transistor M12, and is supplied with the drain current of the transistor M12. The gate capacitance of transistor MSW is charged by the drain current of transistor M12, and transistor MSW can be turned on. The resistor R1 is connected between the gate and source of the transistor MSW, and discharges the charge of the gate capacitor when the drain current of the transistor M12 is not supplied to the gate capacitor. When the gate capacitance is discharged by the resistor R1, the transistor MSW is turned off.

The charge pump circuit 9 described above includes a capacitor C1, an inverter 14, and diodes D1 and D2 for preventing backflow. One end of the capacitor C1 is connected to a connection point between the cathode of the diode D1 and the anode of the diode D2. The other end of the capacitor C1 is connected to the output of the inverter 14.

The inverter 14 operates upon receiving the DC voltage VDD1 from the power supply 2. A pulse signal output from an oscillation circuit (not shown) is input to the inverter 14. The diode D1 has an anode connected to the positive electrode of the power source 4, and a cathode connected to one end of the capacitor C1. The diode D2 has an anode connected to one end of the capacitor C1, and a cathode connected to the sources of the transistors M11 and M12 forming the constant current circuit 10. The cathode of this diode D2 becomes the output of the charge pump circuit 9, which outputs a boosted voltage obtained by boosting the DC voltage VDD1.

According to the above configuration, when the pulse signal from the oscillation circuit becomes H level and the output of the inverter 14 becomes L level (ground), the potential at the other end of the capacitor C1 becomes equal to the ground. A current is supplied through the capacitor C1 to charge the capacitor C1. By charging from the power source 4, the voltage across the capacitor C1 becomes equal to the DC voltage VDD2. Further, the diode D2 prevents current from flowing from the gate of the transistor MSW to the capacitor C1. When the output of the inverter 14 becomes H level (DC voltage VDD1), the potential at the other end of the capacitor C1 becomes equal to the DC voltage VDD1. Therefore, one end of the capacitor C1 has a potential obtained by shifting up the DC voltage VDD1 to the high voltage side by the DC voltage VDD2.

That is, a pulse signal that alternately repeats an L level (DC voltage VDD2) and an H level (DC voltage VDD1+DC voltage VDD2) is output from one end of the capacitor C1. This pulse signal is smoothed by a smoothing capacitor (not shown), and a boosted voltage higher than the DC voltage VDD1 is output from the output of the charge pump circuit 9, and is supplied to the constant current circuit 10.

The first voltage detection circuit 11 is a circuit that detects an increase in the gate voltage VG of the transistor MSW. The first voltage detection circuit 11 compares the potential difference (VG-Vref1) between the gate voltage VG of the transistor MSW and the reference voltage Vref1 with the DC voltage VDD1, and outputs the comparison result to the charge pump control circuit 13. The second voltage detection circuit 12 is a circuit that detects a decrease in the gate voltage VG of the transistor MSW. The second voltage detection circuit 12 compares the potential difference (VG-Vref2) between the gate voltage VG of the transistor MSW and the reference voltage Vref2 (<Vref1) with the DC voltage VDD1, and transmits the comparison result to the charge pump control circuit 13. Output to.

When the gate voltage VG of the transistor MSW increases and the first voltage detection circuit 11 outputs a comparison result that the potential difference (VG-Vref1) is larger than the DC voltage VDD1, the charge pump control circuit 13 operates as shown in the figure. Control the oscillation circuit that does not operate to stop outputting the pulse signal. As a result, the boosting operation of the charge pump circuit 9 is stopped. When the gate voltage VG of the transistor MSW decreases and the second voltage detection circuit 12 outputs a comparison result indicating that the potential difference (VG-Vref2) has become lower than the DC voltage VDD1, the charge pump control circuit 13 controls the charge pump control circuit 13 (not shown). The oscillation circuit is controlled to restart the output of the pulse signal. As a result, the boosting operation of the charge pump circuit 9 is restarted.

Next, details of the first voltage detection circuit 11 and the second voltage detection circuit 12 described above will be explained. The first voltage detection circuit 11 and the second voltage detection circuit 12 correspond to the voltage detection circuit of the charge pump of the present invention. The first voltage detection circuit 11 and the second voltage detection circuit 12 have the same configuration except that the reference voltages Vref1 and Vref2 are different. Therefore, the first voltage detection circuit 11 will be described as a representative example with reference to FIG.

As shown in FIG. 2, the first voltage detection circuit 11 includes a voltage-current conversion circuit 17, a first input 18, a second input 19, Zener diodes Dz1 and Dz2, and resistors R21 and R22. It has a transistor Tr, diodes D22, D22, D3, and a comparison circuit 20.

The voltage-current conversion circuit 17 includes transistors Q1 to Q4 and a constant current source 16. Transistors Q1 to Q4 are composed of PNP type bipolar transistors. The collector and base of the transistor Q1 (first transistor) are connected to each other, and the collector and base, which are connected to each other, are connected to the constant current source 16. The transistor Q2 (second transistor) has a base connected to the base of the transistor Q1, and an emitter connected to the emitter of the transistor Q1.

The collector and base of the transistor Q3 (third transistor) are connected to each other, and the collector and base, which are connected to each other, are connected to the constant current source 16. The transistor Q4 (fourth transistor) has a base connected to the base of the transistor Q3, and an emitter connected to the emitter of the transistor Q3. Constant current source 16 outputs constant current I2. The voltage-current conversion circuit 17 converts the emitter potential difference between the transistors Q2 and Q4 into a current difference flowing through the transistors Q2 and Q4.

The first input 18 receives the gate voltage VG of the transistor MSW (=the boosted voltage obtained by boosting the DC voltage VDD1 by the charge pump circuit 9), and receives the gate voltage VG of the transistor MSW, which is a diode D21, the transistor Tr (bipolar transistor), and the Zener diodes Dz1 and Dz2, which will be described later. (first Zener diode) is connected to the emitter of transistor Q2 via resistor R21 (first resistor).

The second input 19 receives the DC voltage VDD1 and is connected to the emitter of the transistor Q4 via a diode D22 and a resistor R22 (second resistor), which will be described later.

The resistor R21, the Zener diodes Dz1 and Dz2, the transistor Tr, and the diode D21 are connected in series between the emitters of the transistors Q1 and Q2 and the first input 18. One end of the resistor R21 is connected to the emitters of the transistors Q1 and Q2, and the other end is connected to the anode of the Zener diode Dz1. The cathode of the Zener diode Dz1 is connected to the anode of the Zener diode Dz2. The cathode of the Zener diode Dz2 is connected to the collector of the transistor Tr. The transistor Tr is diode-connected (ie, the base and collector are connected). The diode D21 has a cathode connected to the emitter of the transistor Tr, and an anode connected to the first input 18.

A resistor R22 and a diode D22 are connected in series between the emitters of the transistors Q3 and Q4 and the second input 19. No Zener diode or bipolar transistor is connected between the emitters of the transistors Q3 and Q4 and the second input 19. One end of the resistor R22 is connected to the emitters of the transistors Q3 and Q4, and the other end is connected to the cathode of the diode D22. The diode D22 has an anode connected to the second input 19. The diode D3 has an anode connected to the emitters of the transistors Q3 and Q4, and a cathode connected to the emitters of the transistors Q1 and Q2.

According to the above configuration, when the gate voltage VG increases and the emitter potential of transistors Q1 and Q2 becomes higher than the emitter potential of transistors Q3 and Q4, the current flowing through transistor Q2 becomes larger than the current flowing through transistor Q4. . On the other hand, when the gate voltage VG decreases and the emitter potential of transistors Q1 and Q2 becomes lower than the emitter potential of transistors Q3 and Q4, the current flowing through transistor Q2 becomes lower than that of transistor Q4.

The emitter potential Ve1 of the transistors Q1 and Q2 is expressed by the following equation (1).
Ve1=VG-Vd-Vbe-2Vdz-R21・I21...(1)
Vd: Forward voltage of diodes D21, D22 Vbe: Base-emitter voltage of transistor Tr Vdz: Zener voltage of Zener diodes Dz1, Dz2 R21: Resistance value of resistor R21 I21: Current flowing through resistor R21

The emitter potential Ve2 of the transistors Q3 and Q4 is expressed by the following equation (2).
Ve2=VDD1-Vd-R22・I22...(2)
R22: Resistance value of resistor R22 I22: Current flowing through resistor R22

The voltage difference (VG-VDD1) when the emitters of the transistors Q1 and Q2 and the emitters of the transistors Q3 and Q4 become equal becomes the reference voltage Vref1. At this time, I2=I21=I22. Therefore, the reference voltage Vref1 is expressed by the following equation (3).
Vref1=2Vdz+Vbe+I2・(R21-R22)...(3)

In the first embodiment, the reference voltage Vref can be set by the Zener voltage Vdz of the Zener diodes Dz1 and Dz2 connected in series with the resistor R21 and the base-emitter voltage Vbe of the transistor Tr. Thereby, the resistance values of the resistors R21 and R22 can be kept small, the gain of the voltage-current conversion circuit 17 can be increased, and the detection accuracy of the first voltage detection circuit 11 can be improved.

Furthermore, in the first embodiment, the resistance values of the resistors R21 and R22 are set to different values. If the resistance values of the resistors R21 and R22 are made equal, the reference voltage Vref1 needs to be set by the Zener voltage Vdz and the base-emitter voltage Vbe, and it is difficult to set the reference voltage Vref1 to a desired value. On the other hand, by making the resistance values of the resistors R21 and R22 different, the reference voltage Vref1 can be finely adjusted to a desired value by the difference in the resistance values of the resistors R21 and R22, and the reference voltage Vref1 can be adjusted to the desired value. can be easily set up.

Further, when the potential difference (VG-VDD1) is lower than the reference voltage Vref1, the Zener diodes Dz1 and Dz2 are turned off, and the current flowing out from the gate of the transistor MSW can be suppressed. When used as the overcurrent protection circuit 3 as shown in FIG. 1, this can suppress the current flowing from the gate of the transistor MSW to the ground during normal operation when the overcurrent protection circuit 3 is not operating.

The transistor Tr is an element for temperature correction. For example, when the Zener voltage Vdz of the Zener diodes Dz1 and Dz2 has a positive temperature coefficient, the base-emitter voltage of the bipolar transistor Tr has a negative temperature characteristic, so that the reference voltage Vref1 is Temperature fluctuations can be moderated.

The comparison circuit 20 outputs the comparison result of the currents flowing through the transistors Q2 and Q4 from the output terminal COUT. The comparison circuit 20 includes transistors M1 and M2 that constitute a current mirror circuit, transistors M3 and M4, and a resistor R3. Transistors M1 to M4 are composed of N-channel field effect transistors. The gate and drain of the transistor M1 are connected. The source of the transistor M1 is connected to ground, and the drain, which is the input of the current mirror circuit, is connected to the collector of the transistor Q4. The current flowing through the transistor Q4 is supplied to the transistor M1.

The transistor M2 has a gate connected to the gate of the transistor M1, and a source connected to the source of the transistor M1. Thereby, the drain current flowing through the transistor M1 is turned back to the drain current of the transistor M2. The drain of transistor M2, which is the output of the current mirror circuit, is connected to the collector of transistor Q2 via transistor M3, which will be described later.

The transistor M3 has a gate connected to the positive electrode of the power supply 4, a source connected to the drain of the transistor M2, and a drain connected to the collector of the transistor Q2. The current flowing through the transistor Q2 is supplied to the transistor M3. The transistor M4 has a source connected to the ground, a gate connected to a connection point between the source of the transistor M3 and the drain of the transistor M2, and a drain connected to the positive electrode of the power source 4 via a resistor R3. The connection point between this resistor R3 and the drain of the transistor M4 becomes an output terminal COUT.

According to the above configuration, when the current flowing through the transistor Q2 is larger than the current flowing through the transistor Q4, the current flowing through the transistor M3 becomes larger than the current flowing through the transistor M2. As a result, the connection point between transistors M2 and M3 becomes H level, transistor M4 is turned on, and L level (ground) is output from the output terminal COUT.

On the other hand, when the current flowing through the transistor Q2 is smaller than the current flowing through the transistor Q3, the current flowing through the transistor M3 becomes smaller than the current flowing through the transistor M2. As a result, the connection point between transistors M2 and M3 becomes L level, transistor M4 is turned off, and H level (DC voltage VDD2) is output from the output terminal COUT.

Further, according to the comparison circuit 20 described above, the gate voltage of the transistor M4 can be clamped by the transistor M3. As a result, when the potential difference (VG-VDD1) is large, current flows only through the transistors Q1 and Q2, and the collector currents of the transistors Q3 and Q4 stop. Since the bases and emitters of the transistors Q1 and Q2 are connected, the current flowing to the first input 18 is expressed by the following equation (4).
IG=I2・(MQ21+1)…(4)
IG: Current flowing from the first input 18 (gate of transistor MSW in FIG. 1) to ground MQ21: Emitter area ratio of transistor Q1 to transistor Q2 (assumed to be "1" in this embodiment)

When the resistor R31 is connected to the collector of the transistor Q2 as in the voltage detection circuit 100 of FIG. 4 described above, a current twice the constant current I2 flows to the ground via the transistors Q1 and Q2. However, in the first voltage detection circuit 11 of the first embodiment, the collector current of the transistor Q2 flows to the ground via the transistors M2 and M3, but the transistor M2 forms a current mirror with the transistor M1. In a state where the collector current of transistor Q4 is stopped, transistor M1 is off. Therefore, the collector current cannot flow through the transistor M2, and the current flows from the emitter to the base of the transistor Q2. Therefore, the current from the gate of the transistor MSW becomes the same as the constant current I2, and can be suppressed more than in equation (4).

The second voltage detection circuit 12 is almost the same as the first voltage detection circuit 11, and the number of Zener diodes, the number of bipolar transistors Tr, the resistance values of the resistors R21 and R22, etc. are set appropriately to determine the reference voltage. Vref2 is set lower than reference voltage Vref1.

The diode D21 prevents current from flowing from the power supply 2 to the gate of the transistor MSW because the diode D21 becomes reverse biased when the gate voltage VG drops to near ground. Diode D22 is provided to cancel the potential difference generated in diode D21.

(Second embodiment)
Next, a second embodiment will be described. The difference between the first embodiment and the second embodiment is the configuration of the first voltage detection circuit 11B. The first voltage detection circuit 11B and the second voltage detection circuit differ only in reference voltages Vref1 and Vref2. Therefore, the first voltage detection circuit 11B will be described as a representative example with reference to FIG.

Note that in FIG. 3, the same parts as those of the first voltage detection circuit 11 already described in the first embodiment described with reference to FIG.

The difference between the first voltage detection circuit 11 of the first embodiment and the first voltage detection circuit 11B of the second embodiment is that the transistor Tr is replaced with a transistor Tr in order to correct the temperature coefficient of the Zener diodes Dz1 and Dz2. A resistor R5 is provided, and the constant current source 16 is constructed from a constant current circuit 16B shown in FIG.

Resistor R5 is connected between resistor R21 and Zener diode Dz1. The constant current circuit 16B includes a transistor M5, a resistor R4, a Zener diode Dz3, and a comparator 22. Transistor M5 is composed of an N-channel field effect transistor. The drain of the transistor M5 is connected to the collector and base of the transistors Q1 and Q3. One end of the resistor R4 is connected to the source of the transistor M5, and the other end is connected to the cathode of the Zener diode Dz3. The anode of the Zener diode Dz3 is connected to ground. The comparator 22 has a non-inverting input supplied with the reference voltage Vref3, and an inverting input connected to a connection point between the resistor R4 and the source of the transistor M5.

According to the above configuration, the constant current I2 output by the constant current circuit 16B of the second embodiment, that is, the drain current of the transistor M5 is expressed by the following equation (5).
I2=ID5=(Vref3-Vdz3)/R4...(5)
ID5: Drain current of transistor M5 Vdz3: Zener voltage of Zener diode Dz3 R4: Resistance value of resistor R4

If the resistance values of the resistors R21, R4, and R5 are the same, the sum of the voltages generated in the resistors R21, R5 and the Zener diodes Dz1, Dz2 will be equal to twice the reference voltage Vref3. As is clear from equation (5), the constant current I2 has a value according to the Zener voltage Vdz3, and changes according to the temperature so as to cancel out the temperature fluctuation of the Zener voltage Vdz that sets the reference voltage Vref1. Thereby, if the reference voltage Vref3 is constant with respect to temperature, the reference voltage Vref1 can also be made constant with respect to temperature.

Note that the present invention is not limited to the embodiments described above, and can be modified, improved, etc. as appropriate. In addition, the material, shape, size, number, arrangement location, etc. of each component in the above-described embodiments are arbitrary as long as the present invention can be achieved, and are not limited.

According to the embodiment described above, hysteresis is provided in the control of the charge pump circuit 9 by providing the two first voltage detection circuits 11 and the second voltage detection circuit 12, but the present invention is not limited to this. isn't it. If there is no need to provide hysteresis, only the first voltage detection circuit 11 may be provided.

According to the embodiment described above, the resistors R21 and R22 are set to different resistance values, but the present invention is not limited to this. If the reference voltage Vref1 can be set using only the Zener diode, the resistors R21 and R22 may be set to the same resistance value.

According to the first embodiment described above, the diode-connected bipolar transistor Tr is connected between the first input 18 and the emitters of the transistors Q1 and Q2, but the invention is not limited to this. If there is no need to correct temperature fluctuations in the reference voltage Vref1, the transistor Tr may not be provided.

According to the embodiment described above, the comparator circuit 20 has the transistors M1 and M2 that constitute a current mirror circuit, but the present invention is not limited to this. The comparator circuit 20 includes a third resistor connected between the emitter of the transistor Q2 and the ground, a fourth resistor connected between the emitter of the transistor Q4 and the ground, and a voltage generated in the third resistor. It may also include a comparator that compares the voltage with the voltage generated across the fourth resistor.

Furthermore, in the embodiments described above, the transistors Q1 to Q4 are composed of bipolar transistors, but are not limited to this, and may be composed of field effect transistors. In this case, the base of the transistor can be interpreted as the gate, the emitter as the source, and the collector as the drain.

Q1 transistor (first transistor)
Q2 transistor (second transistor)
Q3 transistor (third transistor)
Q4 transistor (fourth transistor)
6 Gate drive circuit 9 Charge pump circuit 11, 11B First voltage detection circuit (charge pump voltage detection circuit)
16 Constant current source 16B Constant current circuit 17 Voltage-current conversion circuit 18 First input 19 Second input 20 Comparison circuit Dz1, Dz2 Zener diode (first Zener diode)
Dz3 Zener diode (second Zener diode)
M1 transistor (current mirror circuit)
M2 transistor (current mirror circuit)
MSW transistor (transistor for load switch)
R21 resistance (first resistance)
R22 resistance (second resistance)
RL Load Tr Transistor (bipolar transistor)
VDD1 DC voltage

Claims (6)

a first transistor whose collector and base are connected or whose drain and gate are connected;
An emitter is connected to an emitter of the first transistor, and a base is connected to a base of the first transistor, or a source is connected to a source of the first transistor, and a gate of the first transistor is connected to the emitter of the first transistor. a second transistor whose gate is connected;
a third transistor whose collector and base are connected or whose drain and gate are connected;
The emitter is connected to the emitter of the third transistor, and the base is connected to the base of the third transistor, or the source is connected to the source of the third transistor, and the gate of the third transistor is connected to the emitter of the third transistor. a fourth transistor whose gate is connected;
a constant current source connected to the first transistor and the third transistor,
a voltage-current conversion circuit that converts an emitter potential difference or a source potential difference between the second transistor and the fourth transistor into a current difference flowing through the second transistor and the fourth transistor;
a first input that receives a boosted voltage obtained by boosting a DC voltage by a charge pump circuit and is connected to the emitter or source of the second transistor;
a second input to which the DC voltage is input and connected to the emitter or source of the fourth transistor;
a first Zener diode connected between the first input and the emitter or source of the second transistor;
a comparison circuit that outputs a comparison result of currents flowing through the second transistor and the fourth transistor, and stops or starts boosting operation of the charge pump circuit according to the comparison result. Voltage detection circuit. The charge pump voltage detection circuit according to claim 1,
a first resistor connected in series with the first Zener diode between the first input and the emitter or source of the second transistor;
a second resistor connected between the second input and the emitter or source of the fourth transistor;
The resistance values of the first resistor and the second resistor are set to different values,
Charge pump voltage detection circuit. The charge pump voltage detection circuit according to claim 1,
further comprising a diode-connected bipolar transistor connected in series with the first Zener diode between the first input and the emitter or source of the second transistor;
Charge pump voltage detection circuit. The charge pump voltage detection circuit according to claim 1,
The constant current source has a second Zener diode, and is configured from a constant current circuit that flows a constant current according to the Zener voltage of the second Zener diode.
Charge pump voltage detection circuit. The charge pump voltage detection circuit according to claim 1,
The comparison circuit includes a current mirror circuit whose input is connected to the collector or drain of the fourth transistor and whose output is connected to the collector or drain of the second transistor.
Charge pump voltage detection circuit. a charge pump circuit that supplies a boosted voltage obtained by boosting the DC voltage to the gate of a load switch transistor connected between a DC power source and a load;
A charge pump voltage detection circuit according to any one of claims 1 to 5,
Gate drive circuit.

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