JP2023155745A - Thin-film transistor, and method of manufacturing the same - Google Patents

Abstract

To provide a thin-film transistor having an excellent flex resistance and a good transistor characteristic, in an organic/inorganic hybrid type thin-film transistor.SOLUTION: Provided is a thin-film transistor that has an insulation substrate, and at least has a gate electrode layer, a gate insulating layer, a semiconductor layer, a source electrode layer, and a drain electrode layer on the substrate. The gate insulating layer comprises: a first gate insulating layer containing an organic material; and a second gate insulating layer consisting of an inorganic compound and formed in an upper surface of the first gate insulating layer. A carbon concentration of the second gate insulating layer is 0.5 to 10 at%, and a hydrogen concentration of the same is 1 to 15 at%. A film thickness of the second gate insulating layer is 2 to 60 nm.SELECTED DRAWING: Figure 1

Description

The present disclosure relates to a thin film transistor including a semiconductor layer and a method for manufacturing the thin film transistor.

Currently, there is an increasing demand for flexible devices in which devices such as displays and sensors are formed on flexible base materials.

Generally, devices that do not require flexibility are driven by inorganic thin film transistors in which an inorganic semiconductor such as amorphous silicon or an oxide semiconductor is formed as a semiconductor layer on a glass substrate.

As the gate insulating layer of an inorganic thin film transistor, inorganic insulating films such as silicon oxide, silicon nitride, and silicon oxynitride formed by chemical vapor deposition are generally used to maintain electrical voltage resistance. , is deposited to a thickness of about several hundred nm.

However, since the above-mentioned inorganic gate insulating layer has poor flexibility, when a flexible device is fabricated using an amorphous silicon thin film transistor formed on a resin substrate, cracks easily occur when it is bent and used. There is.

On the other hand, an organic thin film transistor using an organic semiconductor as a semiconductor layer has excellent flexibility because a highly flexible organic insulating film can be used as a gate insulating layer.

However, organic thin film transistors have disadvantages such as inferior atmospheric stability and long-term reliability compared to inorganic thin film transistors. This disadvantage primarily stems from organic semiconductor materials.

Therefore, a technique for manufacturing a thin film transistor using an organic gate insulating layer and an inorganic semiconductor is attracting attention (Non-Patent Document 1). However, according to Non-Patent Document 1, when manufacturing a thin film transistor with a bottom gate structure, for example, if an inorganic semiconductor is directly deposited on an organic gate insulating layer using a vacuum deposition apparatus using plasma, the organic gate insulating layer It has been reported that carrier traps are generated at the interface between the gate insulating film and the semiconductor when the surface of the TFT is exposed to plasma and damaged, making it impossible to establish a good interface state and obtaining the desired TFT characteristics. ing.

Therefore, Patent Document 1 reports a technology for manufacturing an organic/inorganic hybrid thin film transistor with a bottom gate structure in which the gate insulating layer has a two-layer structure of a thick organic gate insulating layer and a thin inorganic gate insulating layer. ing. The thick organic gate insulating layer improves the insulation and bending resistance of the gate insulating layer, and the thin inorganic gate insulating layer forms a good interface with the inorganic semiconductor layer and plays the role of developing high transistor characteristics. ing. However, a thin film transistor using an organic/inorganic hybrid type has better flexibility than an inorganic thin film transistor, but is inferior to an organic thin film transistor, so it is necessary to devise ways to further improve flexibility. Therefore, in Patent Document 1, not only the gate insulating layer has a two-layer structure, but also the area ratio of the organic gate layer and the inorganic gate insulating layer in the organic/inorganic hybrid thin film transistor is limited. Discloses technology that increases flexibility.

Patent Document 1 discloses a technique for increasing the flexibility of the entire thin film transistor by patterning an inorganic gate insulating layer having poor flexibility to reduce its area. The method for patterning the inorganic gate insulating layer is to deposit an inorganic insulating film such as silicon oxide in vacuum, apply a resist on the inorganic insulating film, pattern the resist using a photolithography method, and then use a dry etching method. A common method is to remove unnecessary portions of the inorganic insulating film. However, when dry etching is performed, the surface of the organic gate insulating layer underlying the inorganic gate insulating layer is also etched, resulting in a problem that the surface of the organic gate insulating layer becomes rough.

When the surface roughness of the organic insulating film is large, the film quality of the source/drain electrode formed in the upper layer deteriorates, and the durability against bending decreases. Specifically, peeling or disconnection may occur between the organic insulating film and the source/drain electrode.

Therefore, it is preferable not to use dry etching as a method for patterning the inorganic gate insulating layer. It is necessary to use a patterning method that does not damage the underlying organic insulating film.

An example of a method for patterning an inorganic gate insulating layer that does not use dry etching is described in Patent Document 2. Patent Document 2 discloses that a gate insulating layer is formed by coating a precursor solution of an inorganic compound that will become a gate insulating layer using a spin coating method or the like, and then patterning and generating an inorganic compound by light irradiation and heat treatment. A method for forming the is described.

Patent No. 6958603 International Publication No. 2018/074607

Mitsuru Nakata et al. , “Analysis of the Influence of Sputtering Damage to Polymer Gate Insulators in Amorphous InGaZnO4 Thin-Film Transistors ", Japanese Journal of Applied Physics, published March 29, 2012, Volume 51, Number 4R, 044105

However, Patent Document 2 does not consider the bending resistance of the gate insulating film, leaving room for improvement.

In view of the above points, an object of the present invention is to provide an organic/inorganic hybrid thin film transistor having excellent bending resistance and good transistor characteristics.

A thin film transistor for solving the above problems is a thin film transistor having an insulating substrate, at least a gate electrode layer, a gate insulating layer, a semiconductor layer, a source electrode layer, and a drain electrode layer on the substrate, The gate insulating layer includes a first gate insulating layer containing an organic material and a second gate insulating layer made of an inorganic compound formed within the upper surface of the first gate insulating layer, and the carbon concentration of the second gate insulating layer is The hydrogen concentration is 0.5 at% to 10 at%, the hydrogen concentration is 1 at% to 15 at%, and the thickness of the second gate insulating layer is 2 to 60 nm.

The semiconductor layer may be made of an oxide semiconductor.

A method for manufacturing a thin film transistor to solve the above problems includes a step of forming a gate electrode layer on a part of a flat surface of a flexible base material, and a first gate insulating layer containing an organic material so as to cover the gate electrode layer. a second gate insulating layer, which is made of an inorganic compound and has a carbon concentration of 0.5 at% to 10 at%, a hydrogen concentration of 1 at% to 15 at%, and a film thickness of 2 to 60 nm, on the upper surface of the first gate insulating layer; a step of forming a gate insulating layer; a step of forming a semiconductor layer made of an oxide semiconductor within the upper surface of the second gate insulating layer; a step of forming a source electrode layer connected to the semiconductor layer; In the step of forming the second gate insulating layer, which includes the step of forming the drain electrode layer to be connected, a precursor solution of an inorganic compound is formed into a film by a coating method, and the coated surface is subjected to light irradiation and heat treatment. The method is characterized by forming a second gate insulating layer.

INDUSTRIAL APPLICABILITY The present invention can provide an organic/inorganic hybrid thin film transistor having excellent durability against bending.

1 is a cross-sectional view showing a cross-sectional structure of a thin film transistor according to an embodiment of the present invention.

An embodiment of a thin film transistor and a method for manufacturing the thin film transistor will be described below. First, the layer structure of a thin film transistor will be explained, and then a method for manufacturing the thin film transistor will be explained.

FIG. 1 is a cross-sectional view showing a cross-sectional structure of a thin film transistor according to an embodiment of the present invention. The thin film transistor according to the embodiment includes a flexible substrate 11 , a gate electrode layer 12 , a source electrode layer 14 , a drain electrode layer 15 , a semiconductor layer 13 , a first gate insulating layer 21 , and a second gate insulating layer 22 . Note that, in FIG. 1, for convenience of explaining the layer structure of the thin film transistor, wiring connected to various electrodes is omitted.

In the following, the upper and lower surfaces of the constituent elements of the thin film transistor will be described with reference to FIG. In the thin film transistor according to the embodiment, the gate electrode layer 12 is formed on a part of the flat surface of the flexible substrate 11, the first gate insulating layer 21 is formed so as to cover the gate electrode layer 12, and the first gate insulating layer A second gate insulating layer 22 is formed within the upper surface of the second gate insulating layer 21 , a semiconductor layer 13 is formed within the upper surface of the second gate insulating layer 22 , and the semiconductor layer 13 , the second gate insulating layer 22 and the first gate insulating layer 21 are A source electrode layer 14 and a drain electrode layer 15 are formed thereon. The source and drain of a thin film transistor are determined by the operation of a drive circuit equipped with the thin film transistor. Therefore, in a thin film transistor, one electrode layer may change its function from source to drain, and another electrode layer may change its function from drain to source. Although the thin film transistor in this embodiment is a bottom gate/top contact type transistor, it may be a bottom gate/bottom contact type transistor or the like.

[Flexible substrate]
The flexible substrate 11 has an insulating property on its upper surface. The flexible substrate 11 may be a transparent substrate or an opaque substrate. The flexible substrate 11 may be an insulating film, a metal foil with an insulating support surface, an alloy foil with an insulating support surface, or a flexible It may also be a thin plate glass with a

The material constituting the flexible substrate 11 is at least one selected from the group consisting of an organic polymer compound, a composite material of an organic material and an inorganic material, a metal, an alloy, and an inorganic compound.

When the flexible substrate 11 is composed of an organic polymer compound, polymethyl methacrylate, polyacrylate, polycarbonate, polystyrene, polyethylene sulfide, polyether sulfone, polyolefin, polyethylene terephthalate, polyethylene naphthalate, cycloolefin polymer, polyether sulfide, etc. Examples include phene, triacetylcellulose, polyvinyl fluoride film, ethylene-tetrafluoroethylene copolymer, polyimide, fluorine-based polymer, and cyclic polyolefin-based polymer.

When the flexible substrate 11 is a composite material, examples include glass fiber reinforced acrylic polymer or glass fiber reinforced polycarbonate. When a metal or an alloy is used for the flexible substrate 11, examples thereof include aluminum, copper, iron-chromium alloy, iron-nickel alloy, iron-nickel-chromium alloy, and the like. When the flexible substrate 11 is an inorganic compound, examples thereof include non-alkali glass containing silicon oxide, boron oxide, and aluminum oxide, or alkali glass containing silicon oxide, sodium oxide, and calcium oxide.

[Electrode layer]
The gate electrode layer 12, the source electrode layer 14, and the drain electrode layer 15 may each have a single layer structure or a multilayer structure. When the gate electrode layer 12, the source electrode layer 14, and the drain electrode layer 15 have a multilayer structure, each electrode layer has a bottom layer that increases adhesion with the lower layer and an uppermost layer that increases the adhesion with the upper layer. It is preferable.

The material constituting the gate electrode layer 12, the source electrode layer 14, and the drain electrode layer 15 may be a metal, an alloy, or a conductive metal oxide. The materials forming the gate electrode layer 12, the source electrode layer 14, and the drain electrode layer 15 may be different from each other or may be the same.

The metal is at least one of transition metals, alkali metals, and alkaline earth metals. The transition metal is at least one selected from the group consisting of indium, aluminum, gold, silver, platinum, titanium, copper, nickel, and tungsten. The alkali metal is lithium or cesium. The alkaline earth metal is at least one of magnesium and calcium. Examples of the alloy include molybdenum niobium (MoNb), iron chromium, aluminum lithium, magnesium silver, aluminum neodymium alloy, and aluminum neodymium zirconia alloy.

The metal oxide is one selected from the group consisting of indium oxide, tin oxide, zinc oxide, cadmium oxide, indium cadmium oxide, cadmium tin oxide, and zinc tin oxide. The metal oxide may contain impurities. The metal oxide containing impurities is indium oxide containing at least one kind of impurity selected from the group consisting of tin, zinc, titanium, cerium, hafnium, zirconium, and molybdenum. The impurity-containing metal oxide may be antimony or fluorine-containing tin oxide. The impurity-containing metal oxide may be zinc oxide containing at least one impurity selected from the group consisting of gallium, aluminum, and boron.

When the material constituting the semiconductor layer 13 is a metal oxide, the source electrode layer 14 and the drain electrode layer 15 contain the same elements as those contained in the semiconductor layer 13, which will be described later, and have an impurity concentration of The layer may be sufficiently higher than the semiconductor layer 13.

From the perspective of expanding the range of materials that can be used for the gate electrode layer 12, source electrode layer 14, and drain electrode layer 15, the electrical resistivity of each electrode layer 12, 14, and 15 is 5.0×10 ⁻⁵ Ω·cm. It is preferable that it is above. From the viewpoint of suppressing power consumption of the thin film transistor, the electrical resistivity of each electrode layer 12, 14, and 15 is preferably 1.0×10 ⁻² Ω·cm or less.

From the viewpoint of suppressing the electrical resistance values of the gate electrode layer 12, source electrode layer 14, and drain electrode layer 15, the thickness of each electrode layer is preferably 50 nm or more. From the viewpoint of increasing the bending resistance of each layer constituting the thin film transistor and reducing cost, the thickness of each electrode layer 12, 14, and 15 is preferably 200 nm or less.

[First gate insulating layer]
The material constituting the first gate insulating layer 21 is an organic polymer compound or an organic-inorganic composite material. Organic polymer compounds include polyvinylphenol, polyimide, polyvinyl alcohol, acrylic polymers, epoxy polymers, fluoropolymers including amorphous fluoropolymers, melamine polymers, furan polymers, xylene polymers, polyamide-imide polymers, silicone polymers, and cycloolefin polymers. At least one type selected from the group. From the viewpoint of increasing the heat resistance of the first gate insulating layer 21, the organic polymer compound is preferably at least one selected from the group consisting of polyimide, acrylic polymer, and fluorine-based polymer.

The organic-inorganic composite material may be, for example, a mixture of particles formed from an organic polymer compound and an inorganic compound. However, the particles formed from the inorganic compound are nanoparticles, that is, particles having a size ranging from several nm to several hundred nm. The organic-inorganic composite material may have a molecular structure including an atomic group having properties as an organic compound and an atomic group having properties as an inorganic compound. An example of such an organic-inorganic composite material is silsesquioxane. Silsesquioxane has a skeleton formed from silicon and oxygen, which are atomic groups that have the characteristics of an inorganic compound, and has an organic group, which is an atomic group that has the characteristics of an organic compound, in its molecular structure. Contains. Organic-inorganic composite materials can have both the characteristics of organic polymer compounds and the characteristics of inorganic compounds. Therefore, for example, an organic-inorganic composite material can have both the bending resistance and impact resistance that are the characteristics of an organic polymer compound, and the heat resistance and durability that are the characteristics of an inorganic compound.

The first gate insulating layer 21 may be a single layer or a multilayer. When the first gate insulating layer 21 is multilayered, the materials of the layers constituting the first gate insulating layer 21 are each an organic polymer compound or an organic-inorganic composite material.

From the viewpoint of maintaining sufficient insulation between the gate electrode layer 12, the source electrode layer 14, and the drain electrode layer 15, the resistivity of the first gate insulating layer 21 should be 1×10 ¹¹ Ω·cm or more. is preferable, and more preferably 1×10 ¹³ Ω·cm or more.

When suppressing the gate voltage for driving the thin film transistor, the thickness of the first gate insulating layer 21 is preferably 2500 nm or less. In order to suppress current leakage and gate voltage, the thickness of the first gate insulating layer 21 is preferably 200 nm or more and 2500 nm or less.

[Second gate insulating layer]
The material constituting the second gate insulating layer 22 includes an inorganic compound that does not have long-range order. The inorganic compound is a silicon compound such as silicon oxide, silicon nitride, silicon oxynitride, and silicon oxynitride silicon carbide compound (SiC _x N _y O _z ), or Ce, Pr, Nd, Sm, Eu, Gd, It is an oxide containing at least one metal element selected from the group of Tb, Dy, Er, Tm, Yb, Lu, Hf, La, Al, and Zr. Furthermore, the material constituting the second gate insulating layer 22 may be a mixture containing an inorganic compound and an organic compound that do not have long-range order.

The second gate insulating layer 22 may be a single layer film or a multilayer film. The resistivity of the second gate insulating layer 22 is preferably 1×10 ¹¹ Ω or more, more preferably 1×10 ¹³ Ω or more.

Carbon contained in the inorganic compound alleviates fluctuations in short-range order due to bending of the flexible substrate 11. On the other hand, if the carbon content is excessive, the film quality of the inorganic compound deteriorates, and carrier traps are generated at the interface between the second gate insulating layer 22 and the semiconductor layer 13, resulting in a decrease in mobility and The insulation properties of the two-gate insulating layer 22 are reduced. Therefore, there is a suitable range for the carbon concentration of the second gate insulating layer 22. Specifically, it is preferably in the range of 0.5 at% or more and 10 at% or less.

Hydrogen contained in the inorganic compound reduces dangling bonds contained in the inorganic compound and stabilizes the interface state between the semiconductor layer 13 and the second gate insulating layer 22. Therefore, hydrogen contained in the inorganic compound increases the mobility of the thin film transistor. On the other hand, if the hydrogen content is excessive, hydrogen within the second gate insulating layer 22 is likely to dissociate, and the dissociated hydrogen diffuses into the semiconductor layer 13 and acts as a donor. Therefore, the carrier concentration increases more than appropriate, causing a shift in the threshold voltage. Therefore, there is a suitable range for the hydrogen concentration of the second gate insulating layer 22. Specifically, it is preferably in the range of 1 at% or more and 15 at% or less.

In this way, by controlling the carbon concentration and hydrogen concentration such that the carbon concentration of the second gate insulating layer 22 is 0.5 at% or more and 10 at% or less and the hydrogen concentration is 1 at% or more and 15 at% or less, the thin film transistor The durability against bending can be increased.

In order to form a continuous film without scattering the inorganic compound in the form of islands, the thickness of the second gate insulating layer 22 is preferably 2 nm or more. In order to improve the durability of the electrical characteristics of the second gate insulating layer 22 against bending of the flexible substrate 11, the thickness is preferably 60 nm or less.

Further, although details will be described later, dry etching is not used for patterning the second gate insulating layer 22. When the dry etching method is used, the surface roughness of the first gate insulating layer 21 which is the base of the second gate insulating layer 22 becomes large, and there are gaps between the first gate insulating layer 21 and the source electrode layer 14 and drain electrode layer 15. This is because there is a risk that peeling or disconnection of each electrode layer may occur. Therefore, in the thin film transistor of this embodiment, since dry etching is not used for patterning the second gate insulating layer 22, the adhesion between the source electrode layer 14 and the drain electrode layer 15 is improved, and the flexible substrate 11 is bent. The durability is increased.

[Semiconductor layer 13]
The material constituting the semiconductor layer 13 is an oxide semiconductor. The oxide semiconductor contains at least one metal element selected from indium, gallium, zinc, and tin.

The oxide semiconductor may be a one-component oxide semiconductor composed of one type of metal element, a binary oxide semiconductor composed of two types of metal elements, or a single-component oxide semiconductor composed of three or more types of metal elements. A multi-component oxide semiconductor may also be used. The oxide semiconductor may be an amorphous semiconductor, a microcrystalline semiconductor made up of many small single crystals, or a polycrystalline semiconductor made up of many microcrystals.

When it is required to increase the light transmittance and field effect mobility (hereinafter also referred to as mobility) of the semiconductor layer 13, the semiconductor layer 13 preferably contains indium.

Examples of the mono-component oxide semiconductor include indium oxide, zinc oxide, gallium oxide, and tin oxide. The binary oxide semiconductor is, for example, indium zinc oxide or indium gallium oxide. The ternary oxide semiconductor is a ternary oxide semiconductor containing indium. Examples of the ternary oxide semiconductor include indium gallium zinc oxide, indium aluminum zinc oxide, indium tin zinc oxide, and indium hafnium zinc oxide. In addition to the metal elements constituting the metal oxide, the oxide semiconductor includes at least one other metal element selected from the group consisting of titanium, germanium, yttrium, zirconium, lanthanum, cerium, tungsten, and magnesium. It may also contain one type of element.

An example of an oxide semiconductor is an In--M--Zn based oxide. The In-M-Zn-based oxide contains indium (In) and zinc (Zn). The In-M-Zn-based oxide contains at least one metal element (M) selected from the group consisting of aluminum, titanium, gallium, germanium, yttrium, zirconium, lanthanum, cerium, hafnium, and tin.

[Method for manufacturing thin film transistor]
An example of a method for manufacturing the thin film transistor of this embodiment will be shown below. The method for manufacturing a bottom-gate/top-contact transistor includes a first step of forming a gate electrode layer 12 on a flexible substrate 11, a second step of laminating a first gate insulating layer 21 on the gate electrode layer 12, and a second step of laminating a first gate insulating layer 21 on the gate electrode layer 12. A third step of laminating the second gate insulating layer 22 on the first gate insulating layer 21, a fourth step of laminating the semiconductor layer 13 on the second gate insulating layer 22, and a source electrode layer 14 and a drain electrode layer on the semiconductor layer 13. 15 is included.

Note that in the method for manufacturing a bottom-gate/bottom-contact type transistor, in the fourth step, the source electrode layer 14 and the drain electrode layer 15 are laminated on the second gate insulating layer 22. Further, in the fifth step, the semiconductor layer 13 is laminated on the source electrode layer 14, the drain electrode layer 15, and the second gate insulating layer 22. The method of laminating the source electrode layer 14 and the drain electrode layer 15 in the fourth step is the method of laminating the source electrode layer 14 and the drain electrode layer 15 in the fifth step of the method for manufacturing a bottom gate/top contact type transistor. As the method for stacking the semiconductor layer 13 in the fifth step, the method for stacking the semiconductor layer 13 in the fourth step in the method for manufacturing a bottom gate/top contact type transistor is used. Therefore, in the following, a method for manufacturing a bottom gate/top contact type transistor will be mainly described, and a description of a method for manufacturing a bottom gate/bottom contact type transistor will be omitted.

In the first step, the gate electrode layer 12 may be formed by a film forming method using a mask that follows the shape of the gate electrode layer 12. Alternatively, the gate electrode layer 12 may be formed by forming an electrode film to become the gate electrode layer 12 and then processing the electrode film into the shape of the gate electrode layer 12 using an etching method.

The film forming method used to form the gate electrode layer 12 includes, for example, a vacuum evaporation method, an ion plating method, a sputtering method, a laser ablation method, a spin coating method using a conductive paste, a dip coating method, and a slit die coating method. It may be at least one type selected from. Alternatively, the film forming method used to form the gate electrode layer 12 may be at least one selected from the group consisting of, for example, a screen printing method, a letterpress printing method, an intaglio printing method, a planographic printing method, and an inkjet method.

The first gate insulating layer 21 is formed by forming a coating liquid containing an organic polymer compound, an organic-inorganic composite material, or a precursor of an organic-inorganic composite material, and then curing it through processes such as light and heat treatment. be done.

In the second step, the first gate insulating layer 21 may be formed by a coating method using a mask that follows the shape of the first gate insulating layer 21.

The first gate insulating layer 21 is formed by applying a solution in which a photosensitive polymer is added to the material that will become the first gate insulating layer 21 using a spin coating method, a casting method, etc., and then applying a photolithographic method to the coated film. Alternatively, the first gate insulating layer 21 may be formed by a method of processing the first gate insulating layer 21 into the shape.

The first gate insulating layer 21 is coated with a coating liquid containing an organic polymer compound, an organic-inorganic composite material, or a precursor of an organic-inorganic composite material by a dip coating method, a slit die coating method, a screen printing method, a gravure offset printing method, or the like. It may be formed by printing using a printing method such as a flexo printing method or an inkjet method.

In the third step, the second gate insulating layer 22 is formed by forming a coating film coated with a precursor solution of an inorganic compound that will become the second gate insulating layer 22, and then undergoing processes such as light and heat treatment to promote a chemical reaction. It is formed by letting

The second gate insulating layer 22 is formed by applying a precursor solution of an inorganic compound that will become the second gate insulating layer 22 as desired using a spin coating method or a casting method using a mask that follows the shape of the second gate insulating layer 22. It may also be formed by applying it in the shape of , and then undergoing a process such as light or heat treatment to promote a chemical reaction. When forming the second gate insulating layer 22 using this method, roughening of the surface of the first gate insulating layer 21 can be suppressed compared to when forming the second gate insulating layer 22 by patterning using a dry etching method. , the adhesion between the source electrode layer 14 and the drain electrode layer 15 is improved, and the durability of the flexible substrate 11 against bending is increased. Furthermore, in forming a film of an inorganic compound, it is easier to control the H concentration and C concentration in the film by using the above method than by using a general vacuum film forming method. Therefore, it is easy to control the carbon concentration of the second gate insulating layer 22 to be 0.5 at% or more and 10 at% or less, and the hydrogen concentration to be 1 at% or more and 15 at% or less, thereby increasing the durability of the thin film transistor against bending. becomes.

The second gate insulating layer 22 is formed by coating a precursor solution of an inorganic compound that will become the second gate insulating layer 22 using a spin coating method, a casting method, etc., and then using a light irradiation method using a laser. The second gate insulating layer 22 may be formed by a method of processing it into the shape of the second gate insulating layer 22.

The second gate insulating layer 22 is formed by printing a precursor solution of an inorganic compound that will become the second gate insulating layer 22 using a dip coating method, a slit die coating method, a screen printing method, a gravure offset printing method, a flexographic printing method, an inkjet method, etc. It may be formed by printing in a desired shape using a method and then promoting a chemical reaction through a process such as light or heat treatment.

In the fourth step, the semiconductor layer 13 may be formed by a film forming method using a mask that follows the shape of the semiconductor layer 13. Alternatively, the semiconductor layer 13 may be formed by forming a semiconductor film to become the semiconductor layer 13 and then processing the semiconductor film into the shape of the semiconductor layer 13 using an etching method.

The semiconductor layer 13 is formed by a sputtering method, a CVD method, an ALD method, or a sol-gel method. The sputtering method includes a DC sputtering method in which a direct current voltage is applied to the flexible substrate 11, or an RF sputtering method in which a high frequency is applied to the film forming space. The impurity addition method may be, for example, a plasma treatment method, an ion implantation method, an ion doping method, a plasma immersion ion implantation method, or the like. Alternatively, the film forming method used to form the semiconductor layer 13 is selected from the group consisting of, for example, a spin coating method using a coating liquid containing a precursor of an inorganic compound, a dip coating method, a slit die coating method, a screen printing method, and an inkjet method. At least one coating method may be used.

In the fifth step, the source electrode layer 14 and the drain electrode layer 15 may be formed by a film forming method using a mask that follows the shape of the electrode layer. Alternatively, the source electrode layer 14 and the drain electrode layer 15 can be formed by forming an electrode film that will become the source electrode layer 14 and the drain electrode layer 15, and then using an etching method to remove the electrode film from the source electrode layer 14 and the drain electrode layer 15. It may be formed by a method of processing into a shape.

The film forming methods used to form the source electrode layer 14 and the drain electrode layer 15 include vacuum evaporation, ion plating, sputtering, laser ablation, spin coating using conductive paste, dip coating, and slit die coating. At least one type selected from the group consisting of. Alternatively, the film formation method used to form the source electrode layer 14 and the drain electrode layer 15 is, for example, at least one selected from the group consisting of a screen printing method, a letterpress printing method, an intaglio printing method, a planographic printing method, and an inkjet method. It's good.

[Example 1]
As the thin film transistor of Example 1, a bottom gate/top contact type transistor shown in FIG. 1 was formed.

In the thin film transistor of Example 1, a polyimide film having a thickness of 20 μm was used for the flexible substrate 11. In the thin film transistor of Example 1, an aluminum neodymium film, which is an aluminum alloy film, was used for the gate electrode layer 12. The gate electrode layer 12 is formed by forming an aluminum alloy film on the flexible substrate 11 by DC magnetron sputtering under the following film forming conditions, and then forming a resist mask from a photosensitive polyresist film laminated on the aluminum alloy film. It was obtained by wet etching the aluminum alloy film using the resist mask and then peeling off the resist mask. The thickness of the gate electrode layer 12 was 80 nm.

<Film formation conditions for gate electrode layer 12>
・Target composition ratio: Al (at%): Nd (at%) = 98:2
・Sputter gas: Argon ・Sputter gas flow rate: 100sccm
・Film forming pressure: 1.0Pa
・Target power: 200W
・Base material temperature: 23℃

In the thin film transistor of Example 1, an acrylic resin film with a thickness of 0.6 μm was used for the first gate insulating layer 21. After applying a solution containing a photosensitive acrylic resin using a spin coating method, the photosensitive coating film is exposed to light using a photomask and developed, and the developed coating film is baked at 230 ° C. , the first gate insulating layer 21 was obtained. A stylus-type step meter (Dektak 6M, manufactured by Bruker Japan Co., Ltd.) was used to confirm the film thickness.

In the thin film transistor of Example 1, a silicon oxide film with a thickness of 60 nm was used for the second gate insulating layer 22. The second gate insulating layer 22 was formed by patterning a solution of 10% perhydropolysilazane ((H ₂ Si-NH)n diluted in di-n-butyl ether by flexographic printing, and then heating it to 150°C. It was dried on a hot plate for 5 minutes. Thereafter, it was dried for 90 minutes on a hot plate heated to 180°C in an environment of 80°C and 75% relative humidity. Thereafter, the sample was introduced into a vacuum chamber and subjected to oxygen plasma treatment (10 seconds, input power: 100 W), thereby obtaining the second gate insulating layer 22. A stylus-type step meter (Dektak XT, manufactured by Bruker Japan Co., Ltd.) was used to measure the film thickness.

A silicon oxide film was formed on the substrate for measuring the hydrogen concentration under the same conditions as the method for manufacturing the second gate insulating layer 22 described above, and the hydrogen concentration was measured by hydrogen forward scattering spectrometry (HFS). As a result of measurement, the hydrogen concentration was 1.0 at%. Next, using the above substrate, carbon concentration was measured by Rutherford Backscattering Spectrometry (RBS), and as a result, the carbon concentration was 0.5 at%.

In the thin film transistor of Example 1, an indium gallium zinc oxide (InGaZnO) film having a thickness of 30 nm was used for the semiconductor layer 13. The semiconductor layer 13 is formed by forming an InGaZnO film by DC magnetron sputtering under the following film formation conditions, forming a resist mask from a photosensitive polyresist film laminated on the InGaZnO film, and using the resist mask to wet the InGaZnO film. It was obtained by peeling off the resist mask after etching.

<Film formation conditions for semiconductor layer 13>
・Target composition ratio: In:Ga:Zn:O=1:1:1:4
・Sputter gas: Argon/oxygen ・Argon flow rate: 100sccm
・Oxygen flow rate: 0.1sccm
・Film forming pressure: 1.0Pa
・Target power: 300W
・Target frequency: 13.56MHz
・Substrate temperature: 23℃

In the thin film transistor of Example 1, an ACX film, which is an aluminum alloy film, was used for the source electrode layer 14 and the drain electrode layer 15. After forming an ACX film by DC magnetron sputtering under the following film forming conditions, a resist mask is formed from the photosensitive polyresist film laminated on the ACX film, and the ACX film is wet-etched using the resist mask. Obtained by peeling off the mask. The film thicknesses of the source electrode layer 14 and the drain electrode layer 15 were 80 nm.

<Film formation conditions for source electrode layer 14 and drain electrode layer 15>
・Target composition ratio:
Al (at%): B (at%): Ni (at%) = 96.4:0.4:3.2
・Sputter gas: Argon ・Sputter gas flow rate: 100sccm
・Film forming pressure: 1.0Pa
・Target power: 200W
・Base material temperature: 23℃

[Example 2]
The thin film transistor of Example 2 was manufactured in the same manner as the thin film transistor of Example 1 except for the method of manufacturing the second gate insulating layer 22.

For the second gate insulating layer 22 in Example 2, a silicon oxide film with a thickness of 60 nm was used. A 10% solution of perhydropolysilazane ((H ₂ Si-NH)n, perhydropolysilazane) diluted in di-n-butyl ether was used to form a pattern using a flexographic printing method, and then dried for 5 minutes on a hot plate heated to 150°C. . Thereafter, it was dried for 120 minutes on a hot plate heated to 180°C in an environment of 80°C and 75% relative humidity. Thereafter, the sample was introduced into a vacuum chamber and subjected to oxygen plasma treatment (10 seconds, input power 50 W).

A silicon oxide film was formed on the substrate for measuring the hydrogen concentration under the same conditions as the method for manufacturing the second gate insulating layer 22 described above, and the hydrogen concentration was measured by hydrogen forward scattering spectrometry (HFS). As a result of measurement, the hydrogen concentration was 1.2 at%. Next, using the above substrate, carbon concentration was measured by Rutherford Backscattering Spectrometry (RBS), and as a result, the carbon concentration was 0.6 at%.

[Example 3]
The thin film transistor of Example 3 was manufactured in the same manner as the thin film transistor of Example 1 except for the method of manufacturing the second gate insulating layer 22.

For the second gate insulating layer 22 in Example 3, a silicon oxide film with a thickness of 60 nm was used. A 10% solution of perhydropolysilazane ((H ₂ Si-NH)n) diluted in di-n-butyl ether was used to form a pattern using a flexographic printing method, and then dried on a heated hot plate for 5 minutes. Thereafter, it was dried for 60 minutes on a hot plate heated to 180°C in an environment of 80°C and 75% relative humidity. Thereafter, the sample was introduced into a vacuum chamber and subjected to oxygen plasma treatment (10 seconds, input power 50 W).

A silicon oxide film was formed on the substrate for measuring the hydrogen concentration under the same conditions as the method for manufacturing the second gate insulating layer 22 described above, and the hydrogen concentration was measured by hydrogen forward scattering spectrometry (HFS). As a result of measurement, the hydrogen concentration was 3.7 at%. Next, using the above substrate, carbon concentration was measured by Rutherford Backscattering Spectrometry (RBS), and as a result, the carbon concentration was 0.5 at%.

[Example 4]
The thin film transistor of Example 4 was manufactured in the same manner as the thin film transistor of Example 1 except for the method of manufacturing the second gate insulating layer 22.

For the second gate insulating layer 22 in Example 4, a silicon oxide film with a thickness of 60 nm was used. A 10% solution of perhydropolysilazane ((H ₂ Si-NH)n, perhydropolysilazane) diluted in di-n-butyl ether was used to form a pattern using a flexographic printing method, and then dried on a heated hot plate for 5 minutes. Thereafter, it was dried for 60 minutes on a hot plate heated to 150°C in an environment of 80°C and 75% relative humidity. Thereafter, the sample was introduced into a vacuum chamber and subjected to oxygen plasma treatment (10 seconds, input power 100 W).

A silicon oxide film was formed on the substrate for measuring the hydrogen concentration under the same conditions as the method for manufacturing the second gate insulating layer 22 described above, and the hydrogen concentration was measured by hydrogen forward scattering spectrometry (HFS). As a result of measurement, the hydrogen concentration was 9.8 at%. Next, using the above substrate, carbon concentration was measured by Rutherford Backscattering Spectrometry (RBS), and as a result, the carbon concentration was 1.3 at%.

[Example 5]
The thin film transistor of Example 5 was manufactured in the same manner as the thin film transistor of Example 1 except for the method of manufacturing the second gate insulating layer 22.

For the second gate insulating layer 22 in Example 5, a silicon oxide film with a thickness of 60 nm was used. A 10% solution of perhydropolysilazane ((H ₂ Si-NH)n, perhydropolysilazane) diluted in di-n-butyl ether was used to form a pattern using a flexographic printing method, and then dried on a heated hot plate for 5 minutes. Thereafter, it was dried for 90 minutes on a hot plate heated to 180°C in an environment of 80°C and 75% relative humidity. Thereafter, the sample was introduced into a vacuum chamber and subjected to oxygen plasma treatment (5 seconds, input power 70 W).

A silicon oxide film was formed on the substrate for measuring the hydrogen concentration under the same conditions as the method for manufacturing the second gate insulating layer 22 described above, and the hydrogen concentration was measured by hydrogen forward scattering spectrometry (HFS). As a result of measurement, the hydrogen concentration was 11.7 at%. Next, using the above substrate, carbon concentration was measured by Rutherford Backscattering Spectrometry (RBS), and as a result, the carbon concentration was 3.4 at%.

[Example 6]
The thin film transistor of Example 6 was manufactured in the same manner as the thin film transistor of Example 1 except for the method of manufacturing the second gate insulating layer 22.

For the second gate insulating layer 22 in Example 6, a silicon oxide film with a thickness of 60 nm was used. A 10% solution of perhydropolysilazane ((H ₂ Si-NH)n, perhydropolysilazane) diluted in di-n-butyl ether was used to form a pattern using a flexographic printing method, and then dried on a heated hot plate for 5 minutes. Thereafter, it was dried for 90 minutes on a hot plate heated to 150°C in an environment of 80°C and 75% relative humidity. Thereafter, the sample was introduced into a vacuum chamber and subjected to oxygen plasma treatment (10 seconds, input power 50 W).

A silicon oxide film was formed on the substrate for measuring the hydrogen concentration under the same conditions as the method for manufacturing the second gate insulating layer 22 described above, and the hydrogen concentration was measured by hydrogen forward scattering spectrometry (HFS). As a result of measurement, the hydrogen concentration was 14.0 at%. Next, using the above substrate, carbon concentration was measured by Rutherford Backscattering Spectrometry (RBS), and as a result, the carbon concentration was 8.9 at%.

[Example 7]
The thin film transistor of Example 7 was manufactured in the same manner as the thin film transistor of Example 1 except for the method of manufacturing the second gate insulating layer 22.

For the second gate insulating layer 22 in Example 7, a silicon oxide film with a thickness of 60 nm was used. A 10% solution of perhydropolysilazane ((H ₂ Si-NH)n, perhydropolysilazane) diluted in di-n-butyl ether was used to form a pattern using a flexographic printing method, and then dried on a heated hot plate for 5 minutes. Thereafter, it was dried for 50 minutes on a hot plate heated to 160°C in an environment of 80°C and 75% relative humidity. Thereafter, the sample was introduced into a vacuum chamber and subjected to oxygen plasma treatment (5 seconds, input power 50 W).

A silicon oxide film was formed on the substrate for measuring the hydrogen concentration under the same conditions as the method for manufacturing the second gate insulating layer 22 described above, and the hydrogen concentration was measured by hydrogen forward scattering spectrometry (HFS). As a result of measurement, the hydrogen concentration was 14.9 at%. Next, using the above substrate, carbon concentration was measured by Rutherford Backscattering Spectrometry (RBS), and as a result, the carbon concentration was 9.8 at%.

[Example 8]
The thin film transistor of Example 8 was manufactured in the same manner as the thin film transistor of Example 1 except for the method of manufacturing the second gate insulating layer 22.

For the second gate insulating layer 22 in Example 8, a LaZrO film with a thickness of 60 nm was used. Lanthanum acetylacetonate and zirconium butoxide were added to 2-methoxyethanol so that the atomic ratio of lanthanum to zirconium was 3:7, and the mixture was heated and stirred at 110° C. for 30 minutes. Next, the obtained solution was transferred to a pressure-resistant container, the temperature was raised to 160°C, held for 1 hour, and then returned to room temperature to prepare a 0.1 mol/kg lanthanum/zirconium mixed solution, which was coated by spin coating. Coated. After spin coating, heat on a hot plate heated to 150°C, irradiate the desired shape with irradiation light with peaks at 185 nm and 254 nm, and then immerse the sample in 2-methoxyethanol for 20 minutes to remove unnecessary parts. Dissolved and removed. Thereafter, it was baked at 220°C for 1 hour.

A LaZrO film was formed on the substrate for measuring the hydrogen concentration under the same conditions as the method for manufacturing the second gate insulating layer 22 described above, and the hydrogen concentration was measured by hydrogen forward scattering spectrometry (HFS). As a result, the hydrogen concentration was 5.2 at%. Next, using the above substrate, carbon concentration was measured by Rutherford Backscattering Spectrometry (RBS), and as a result, the carbon concentration was 1.9 at%.

[Example 9]
The thin film transistor of Example 9 was manufactured in the same manner as the thin film transistor of Example 1 except for the method of manufacturing the second gate insulating layer 22.

For the second gate insulating layer 22 in Example 9, a LaZrO film with a thickness of 60 nm was used. Lanthanum acetylacetonate and zirconium butoxide were added to 2-methoxyethanol so that the atomic ratio of lanthanum to zirconium was 3:7, and the mixture was heated and stirred at 110° C. for 30 minutes. Next, the obtained solution was transferred to a pressure-resistant container, the temperature was raised to 160°C, held for 1 hour, and then returned to room temperature to prepare a 0.1 mol/kg lanthanum/zirconium mixed solution, which was coated by spin coating. Coated. After spin coating, heat on a hot plate heated to 150°C, irradiate the desired shape with irradiation light having peaks at 185 nm and 254 nm for 10 minutes, and then immerse the sample in 2-methoxyethanol for 20 minutes to remove unnecessary particles. The parts were dissolved and removed. Thereafter, it was baked at 200°C for 1 hour.

LaZrO was formed on the substrate for measuring the hydrogen concentration under the same conditions as the method for manufacturing the second gate insulating layer 22 described above, and the hydrogen concentration was measured by hydrogen forward scattering spectrometry (HFS). As a result, the hydrogen concentration was 7.6 at%. Next, using the above substrate, carbon concentration was measured by Rutherford Backscattering Spectrometry (RBS), and as a result, the carbon concentration was 7.0 at%.
[Example 10]
The thin film transistor of Example 10 was manufactured in the same manner as the thin film transistor of Example 1 except for the method of manufacturing the second gate insulating layer 22.

For the second gate insulating layer 22 in Example 10, an HfZrO film with a thickness of 60 nm was used. Hafnium acetylacetonate and zirconium butoxide were added to 2-methoxyethanol so that the atomic ratio of hafnium to zirconium was 3:7, and the mixture was heated and stirred at 110° C. for 30 minutes. Next, the obtained solution was transferred to a pressure-resistant container, heated to 160° C., held for 1 hour, and then returned to room temperature to prepare a mixed solution of 0.1 mol/kg, and applied by spin coating. After spin coating, heat on a hot plate heated to 150°C, irradiate the desired shape with irradiation light having peaks at 185 nm and 254 nm for 10 minutes, and then immerse the sample in 2-methoxyethanol for 20 minutes to remove unnecessary particles. The parts were dissolved and removed. Thereafter, it was baked at 220°C for 1 hour.

A LaZrO film was formed on the substrate for measuring the hydrogen concentration under the same conditions as the method for manufacturing the second gate insulating layer 22 described above, and the hydrogen concentration was measured by hydrogen forward scattering spectrometry (HFS). As a result, the hydrogen concentration was 8.1 at%. Next, using the above substrate, carbon concentration was measured by Rutherford Backscattering Spectrometry (RBS), and as a result, the carbon concentration was 4.8 at%.

[Example 11]
The thin film transistor of Example 11 was manufactured in the same manner as the thin film transistor of Example 1 except for the method of manufacturing the second gate insulating layer 22.

For the second gate insulating layer 22 in Example 11, an AlZrO film with a thickness of 60 nm was used. Aluminum acetylacetonate and zirconium butoxide were added to 2-methoxyethanol so that the atomic ratio of aluminum to zirconium was 3:7, and the mixture was heated and stirred at 110° C. for 30 minutes. Next, the obtained solution was transferred to a pressure-resistant container, heated to 160° C., held for 1 hour, and then returned to room temperature to prepare a mixed solution of 0.1 mol/kg, and applied by spin coating. After spin coating, heat on a hot plate heated to 150°C, irradiate the desired shape with irradiation light having peaks at 185 nm and 254 nm for 10 minutes, and then immerse the sample in 2-methoxyethanol for 20 minutes to remove unnecessary particles. The parts were dissolved and removed. Thereafter, it was baked at 220°C for 1 hour.

An AlZrO film was formed on the substrate for measuring the hydrogen concentration under the same conditions as the method for manufacturing the second gate insulating layer 22 described above, and the hydrogen concentration was measured by hydrogen forward scattering spectrometry (HFS). As a result, the hydrogen concentration was 8.0 at%. Next, using the above substrate, carbon concentration was measured by Rutherford Backscattering Spectrometry (RBS), and as a result, the carbon concentration was 5.1 at%.

[Example 12]
The thin film transistor of Example 12 was manufactured in the same manner as the thin film transistor of Example 1 except for the method of manufacturing the second gate insulating layer 22.

For the second gate insulating layer 22 in Example 12, a SmZrO film with a thickness of 60 nm was used. Samarium acetylacetonate and zirconium butoxide were added to 2-methoxyethanol so that the atomic ratio of samarium to zirconium was 3:7, and the mixture was heated and stirred at 110° C. for 30 minutes. Next, the obtained solution was transferred to a pressure-resistant container, heated to 160° C., held for 1 hour, and then returned to room temperature to prepare a mixed solution of 0.1 mol/kg, and applied by spin coating. After spin coating, heat on a hot plate heated to 150°C, irradiate the desired shape with irradiation light having peaks at 185 nm and 254 nm for 10 minutes, and then immerse the sample in 2-methoxyethanol for 20 minutes to remove unnecessary particles. The parts were dissolved and removed. Thereafter, it was baked at 220°C for 1 hour.

A SmZrO film was formed on the substrate for measuring the hydrogen concentration under the same conditions as the method for manufacturing the second gate insulating layer 22 described above, and the hydrogen concentration was measured by hydrogen forward scattering spectrometry (HFS). As a result, the hydrogen concentration was 7.9 at%. Next, using the above substrate, carbon concentration was measured by Rutherford Backscattering Spectrometry (RBS), and as a result, the carbon concentration was 4.9 at%.

[Example 13]
The thin film transistor of Example 13 was manufactured in the same manner as the thin film transistor of Example 1 except for the method of manufacturing the second gate insulating layer 22.

For the second gate insulating layer 22 in Example 13, an HfO film with a thickness of 60 nm was used. Hafnium acetylacetonate was added to 2-methoxyethanol, and the mixture was heated and stirred at 110° C. for 30 minutes. Next, the obtained solution was transferred to a pressure-resistant container, heated to 160° C., held for 1 hour, and then returned to room temperature to prepare a 0.1 mol/kg solution, which was applied by spin coating. After spin coating, heat on a hot plate heated to 150°C, irradiate the desired shape with irradiation light having peaks at 185 nm and 254 nm for 10 minutes, and then immerse the sample in 2-methoxyethanol for 20 minutes to remove unnecessary particles. The parts were dissolved and removed. Thereafter, it was baked at 220°C for 1 hour.

An HfO film was formed on the substrate for measuring the hydrogen concentration under the same conditions as the method for manufacturing the second gate insulating layer 22 described above, and the hydrogen concentration was measured by hydrogen forward scattering spectrometry (HFS). As a result, the hydrogen concentration was 6.2 at%. Next, using the above substrate, carbon concentration was measured by Rutherford Backscattering Spectrometry (RBS), and as a result, the carbon concentration was 4.1 at%.

[Example 14]
The thin film transistor of Example 14 was manufactured in the same manner as the thin film transistor of Example 1 except for the method of manufacturing the second gate insulating layer 22.

For the second gate insulating layer 22 of Example 14, a ZrO film with a thickness of 60 nm was used. Zirconium acetylacetonate was added to 2-methoxyethanol, and the mixture was heated and stirred at 110°C for 30 minutes. Next, the obtained solution was transferred to a pressure-resistant container, heated to 160° C., held for 1 hour, and then returned to room temperature to prepare a 0.1 mol/kg solution, which was applied by spin coating. After spin coating, heat on a hot plate heated to 150°C, irradiate the desired shape with irradiation light having peaks at 185 nm and 254 nm for 10 minutes, and then immerse the sample in 2-methoxyethanol for 20 minutes to remove unnecessary particles. The parts were dissolved and removed. Thereafter, it was baked at 220°C for 1 hour.

A ZrO film was formed on the substrate for measuring the hydrogen concentration under the same conditions as the method for manufacturing the second gate insulating layer 22 described above, and the hydrogen concentration was measured by hydrogen forward scattering spectrometry (HFS). As a result, the hydrogen concentration was 6.9 at%. Next, using the above substrate, carbon concentration was measured by Rutherford Backscattering Spectrometry (RBS), and as a result, the carbon concentration was 3.9 at%.

[Example 15]
The thin film transistor of Example 15 was manufactured in the same manner as the thin film transistor of Example 7 except that a 2 nm thick silicon oxide film was used as the second gate insulating layer 22.

[Example 16]
The thin film transistor of Example 16 was manufactured in the same manner as the thin film transistor of Example 7 except that a 30 nm thick silicon oxide film was used as the second gate insulating layer 22.

[Comparative example 1]
The thin film transistor of Comparative Example 1 was manufactured in the same manner as the thin film transistor of Example 1 except for the method of manufacturing the second gate insulating layer 22.

For the second gate insulating layer 22 of Comparative Example 1, a silicon oxide film with a thickness of 30 nm was used, which was formed by a parallel plate plasma CVD method. The film forming conditions are shown below.
<Film formation conditions for silicon oxide film>
・Base material temperature: 200℃
・Reaction gas: Silane/Dinitrogen monoxide ・Reaction gas flow rate: 50sccm (Silane), 500sccm (Dinitrogen monoxide)
・Film forming pressure: 200Pa
・High frequency power: 500W ・High frequency power frequency: 13.56MHz

A dry etching method was used for patterning the second gate insulating layer 22. It was obtained by forming a resist mask from a photosensitive polyresist film laminated on a silicon oxide film, dry etching the silicon oxide film using the resist mask, and then peeling off the resist mask. The conditions for dry etching are shown below.

<Etching conditions for second gate insulating layer 22>
・Reaction gas: Tetrafluoromethane ・Reaction gas flow rate: 30sccm
・Film forming pressure: 10Pa
・High frequency power: 300W
・Etching time: 20 seconds

A silicon oxide film was formed on the substrate for measuring the hydrogen concentration under the same conditions as the method for manufacturing the second gate insulating layer 22 described above, and the hydrogen concentration was measured by hydrogen forward scattering spectrometry (HFS). As a result of measurement, the hydrogen concentration was 8.2 at%. Next, using the above substrate, carbon concentration was measured by Rutherford Backscattering Spectrometry (RBS), and as a result, the carbon concentration was less than 0.1 at% (below the detection limit).

[Comparative example 2]
The thin film transistor of Comparative Example 2 was manufactured in the same manner as the thin film transistor of Example 1 except for the method of manufacturing the second gate insulating layer 22.

For the second gate insulating layer 22 of Comparative Example 2, a silicon nitride film with a thickness of 30 nm was used, which was formed by a parallel plate plasma CVD method. The film forming conditions are shown below.
・Base material temperature: 200℃
・Reactive gas: silane/ammonia/hydrogen/nitrogen ・Reactive gas flow rate: 10 sccm (silane), 60 sccm (ammonia)
2000sccm (hydrogen), 2000sccm (nitrogen)
・Film forming pressure: 300Pa
・High frequency power: 500W
・High frequency power frequency: 13.56MHz

A dry etching method was used for patterning the second gate insulating layer 22. It was obtained by forming a resist mask from a photosensitive polyresist film laminated on a silicon oxide film, dry-etching a silicon nitride film using the resist mask, and then peeling off the resist mask. The conditions for dry etching are shown below.

<Etching conditions for second gate insulating layer 22>
・Reaction gas: Tetrafluoromethane ・Reaction gas flow rate: 30sccm
・Film forming pressure: 10Pa
・High frequency power: 300W
・Etching time: 50 seconds

A silicon oxide film was formed on the substrate for measuring the hydrogen concentration under the same conditions as the method for manufacturing the second gate insulating layer 22 described above, and the hydrogen concentration was measured by hydrogen forward scattering spectrometry (HFS). As a result of measurement, the hydrogen concentration was 11 at%. Next, using the above substrate, carbon concentration was measured by Rutherford Backscattering Spectrometry (RBS), and as a result, the carbon concentration was less than 0.1 at% (below the detection limit).

[Comparative example 3]
The thin film transistor of Comparative Example 3 was manufactured in the same manner as the thin film transistor of Example 1 except for the method of manufacturing the second gate insulating layer 22.

For the second gate insulating layer 22 of Comparative Example 3, a silicon oxide film with a thickness of 60 nm was used. After forming a pattern using a flexo printing method using a solution of 15% Perhydropolysilazane ((H ₂ Si-NH)n) diluted in di-n-butyl ether, it was dried for 5 minutes on a hot plate heated to 150°C. did. Thereafter, it was dried for 90 minutes on a hot plate heated to 160°C in an environment of 80°C and 75% relative humidity. Thereafter, the sample was introduced into a vacuum chamber and subjected to oxygen plasma treatment (10 seconds, input power: 100 W).

A silicon oxide film was formed on the substrate for measuring the hydrogen concentration under the same conditions as the method for manufacturing the second gate insulating layer 22 described above, and the hydrogen concentration was measured by hydrogen forward scattering spectrometry (HFS). As a result of measurement, the hydrogen concentration was 3.1 at%. Next, using the above substrate, carbon concentration was measured by Rutherford Backscattering Spectrometry (RBS), and as a result, the carbon concentration was 0.4 at%.

[Comparative example 4]
The thin film transistor of Comparative Example 4 was manufactured in the same manner as the thin film transistor of Example 1 except for the method of manufacturing the second gate insulating layer 22.

For the second gate insulating layer 22 of Comparative Example 4, a silicon oxide film with a thickness of 60 nm was used. A 15% solution of perhydropolysilazane ((H ₂ Si-NH)n, perhydropolysilazane) diluted in di-n-butyl ether was used to form a pattern using a flexographic printing method, and then dried for 5 minutes on a hot plate heated to 150°C. . Thereafter, it was dried for 60 minutes on a hot plate heated to 160°C in an environment of 80°C and 75% relative humidity. Thereafter, the sample was introduced into a vacuum chamber and subjected to oxygen plasma treatment (10 seconds, input power 50 W).

A silicon oxide film was formed on the substrate for measuring the hydrogen concentration under the same conditions as the method for manufacturing the second gate insulating layer 22 described above, and the hydrogen concentration was measured by hydrogen forward scattering spectrometry (HFS). As a result of measurement, the hydrogen concentration was 18.0 at%. Next, using the above substrate, carbon concentration was measured by Rutherford Backscattering Spectrometry (RBS), and as a result, the carbon concentration was 7.2 at%.

[Comparative example 5]
The thin film transistor of Comparative Example 5 was manufactured in the same manner as the thin film transistor of Example 1 except for the method of manufacturing the second gate insulating layer 22.

For the second gate insulating layer 22 of Comparative Example 5, a silicon oxide film with a thickness of 60 nm was used. A 15% solution of perhydropolysilazane ((H ₂ Si-NH)n, perhydropolysilazane) diluted in di-n-butyl ether was used to form a pattern using a flexographic printing method, and then dried for 5 minutes on a hot plate heated to 150°C. . Thereafter, it was dried for 60 minutes on a hot plate heated to 150°C in an environment of 70°C and 60% relative humidity. Thereafter, the sample was introduced into a vacuum chamber and subjected to oxygen plasma treatment (7 seconds, input power 50 W).

A silicon oxide film was formed on the substrate for measuring the hydrogen concentration under the same manufacturing conditions as the second gate insulating layer 22, and the hydrogen concentration was measured by hydrogen forward scattering spectrometry (HFS). As a result of measurement, the hydrogen concentration was 13.0 at%. Next, using the above substrate, carbon concentration was measured by Rutherford Backscattering Spectrometry (RBS), and as a result, the carbon concentration was 11.8 at%.

[Comparative example 6]
The thin film transistor of Comparative Example 6 was manufactured in the same manner as the thin film transistor of Example 1 except for the method of manufacturing the second gate insulating layer 22.

For the second gate insulating layer 22 of Comparative Example 6, a silicon oxide film with a thickness of 60 nm was used. A 15% solution of perhydropolysilazane ((H ₂ Si-NH)n, perhydropolysilazane) diluted in di-n-butyl ether was used to form a pattern using a flexographic printing method, and then dried for 5 minutes on a hot plate heated to 150°C. . Thereafter, it was dried for 40 minutes on a hot plate heated to 150°C in an environment of 80°C and 75% relative humidity. Thereafter, the sample was introduced into a vacuum chamber and subjected to oxygen plasma treatment (7 seconds, input power 50 W).

A silicon oxide film was formed on the substrate for measuring the hydrogen concentration under the same conditions as the method for manufacturing the second gate insulating layer 22 described above, and the hydrogen concentration was measured by hydrogen forward scattering spectrometry (HFS). As a result of measurement, the hydrogen concentration was 13.2 at%. Next, using the above substrate, carbon concentration was measured by Rutherford Backscattering Spectrometry (RBS), and as a result, the carbon concentration was 12.1 at%.

[Comparative Example 7]
The thin film transistor of Comparative Example 7 was manufactured in the same manner as the thin film transistor of Example 7 except that a 70 nm thick silicon oxide film was used as the second gate insulating layer 22.

[Example 8]
The thin film transistor of Example 8 was manufactured in the same manner as the thin film transistor of Example 7 except that a 1 nm thick silicon oxide film was used as the second gate insulating layer 22.

[evaluation]
<TFT characteristic evaluation before bending test>
The TFT characteristics of the thin film transistors of Examples 1 to 10 and Comparative Examples 1 to 8 were evaluated using a semiconductor parameter analyzer (B1500A: manufactured by Agilent Technologies, Inc.).

First, the voltage of the source electrode layer 14 was set to 0V, the source-drain voltage was set to 10V, and the transfer characteristic, which is the relationship between the gate voltage and the drain current, was obtained. The source-drain voltage is the voltage between the source electrode layer 14 and the drain electrode layer 15. The gate voltage is the voltage between the source electrode layer 14 and the gate electrode layer 12. The drain current is a current flowing through the drain electrode layer 15. At this time, the gate voltage was changed by changing the voltage of the gate electrode layer 12 from -20V to +20V.

Next, using the transfer characteristics between gate voltage and drain current, mutual conductance (A/V), which is the change in drain current with respect to change in gate voltage, was calculated. Then, the relative permittivity and thickness of the first gate insulating layer 21, the relative permittivity and thickness of the second gate insulating layer 22, the channel length, the channel The width and source-drain voltage were applied to calculate the threshold voltage and mobility.

<TFT characteristic evaluation after bending test>
Next, a static bending test of the thin film transistor was conducted. A static bending test was conducted by wrapping the flexible substrate 11 around a metal rod having a radius of 1 mm. After the static bending test, as described above, the transfer characteristic, which is the relationship between gate voltage and drain current, was obtained, and the mobility and threshold voltage before and after the static bending test were calculated.

<TFT characteristics evaluation after dynamic bending test>
Next, using a durability test system DLDMLH-FS (manufactured by Yuasa Corporation), a dynamic bending test was conducted 100,000 times with a radius of curvature of 1 mm in accordance with the test standard IEC62715-6-1. After the dynamic bending test, as described above, the transfer characteristic, which is the relationship between gate voltage and drain current, was obtained, and the threshold voltage and mobility were calculated. Then, the ratio of the difference between the mobility before the dynamic bending test and the mobility after the dynamic bending test was calculated as the rate of decrease in mobility before and after the dynamic bending test. . The amount of change in threshold voltage after the dynamic bending test with respect to the threshold voltage before the dynamic bending test was calculated as the amount of change in threshold voltage before and after the dynamic bending test.

Table 1 shows the structure and film formation method of the second gate insulating layer 22 in Examples 1 to 16 and Comparative Examples 1 to 8, TFT characteristics before bending test, TFT characteristics after static bending test, and dynamic bending test. The subsequent TFT characteristics are shown.

First, the thin film transistors of Examples 1 to 16 and the thin film transistors of Comparative Examples 1 and 2 will be compared. The mobilities before the bending test of the thin film transistors of Examples 1 to 16 and the thin film transistors of Comparative Examples 1 and 2 were all found to be 11.1 to 14.2 cm ² /Vs. However, in the thin film transistors of Examples 1 to 10, there was no abnormality in the source electrode layer 14 and drain electrode layer 15 after the static bending test, and the mobility after the static test was 11.1 to 14.2 cm ² /Vs or more. On the other hand, in the thin film transistors of Comparative Examples 1 and 2, peeling and disconnection of the source electrode layer 14 and drain electrode layer 15 on the first gate insulating layer 21 were confirmed by microscopic observation after the static bending test. Furthermore, it was found that the TFT characteristics could not be measured (current could not be applied). This indicates that when dry etching is used as a patterning method for the second gate insulating layer 22, the bending resistance of the thin film transistor decreases. This is because by using the dry etching method, the surface of the first gate insulating layer 21 becomes rough and the film quality of the source electrode layer 14 and drain electrode layer 15 deteriorates, resulting in poor adhesion of the first gate insulating layer 21. This is thought to be due to a decrease in

Next, the thin film transistors of Examples 1 to 16 and Comparative Example 3 will be compared. The thin film transistors of Examples 1 to 16 had a mobility of 11.1 to 14.2 cm ² /Vs before the bending test, and the thin film transistor of Comparative Example 3 had a mobility of 12.5 cm ² /Vs before the bending test. Ta. However, after the dynamic bending test, the thin film transistors of Examples 1 to 16 had a mobility of 11.0 to 14.2 cm ² /Vs, and a mobility decrease rate of -2 to 2%. On the other hand, the thin film transistor of Comparative Example 3 had a mobility of 6.0 cm ² /Vs after the test, and a mobility reduction rate of 52%. In the thin film transistor of Comparative Example 3, since the carbon concentration of the second gate insulating layer 22 is low, the flexibility of the second gate insulating layer 22 is reduced, and when the thin film transistor is repeatedly bent, the semiconductor layer 13 and the second gate insulating layer 22, and microcracks in the second gate insulating layer 22 are likely to occur, and the mobility after the dynamic bending test is likely to be reduced. Therefore, the thin film transistor of Comparative Example 3 was found to have inferior bending resistance than the thin film transistors of Examples 1 to 16. Further, from the results of Examples 1 to 16, it was found that when the carbon concentration was 0.5 at% or more, high bending resistance that could withstand the dynamic bending test was obtained.

Next, the thin film transistors of Examples 1 to 16 and Comparative Example 4 will be compared. The thin film transistors of Examples 1 to 16 had mobilities of 11.1 to 14.2 cm ² /Vs and threshold voltages of 0.5 to 1.3V before the bending test. The thin film transistor of Comparative Example 4 had a mobility of 14.0 cm ² /Vs and a threshold voltage of 0.5 V before the bending test. However, regarding the threshold voltage after the dynamic bending test, the thin film transistors of Examples 1 to 16 have a threshold voltage of 0.5 to 1.3V after the dynamic bending test, and The amount of change in threshold voltage is -0.1 to 0.2V, whereas the threshold voltage of the thin film transistor of Comparative Example 4 after the dynamic bending test was -6.0V; The amount of change in threshold voltage before and after was -6.5V. In the thin film transistor of Comparative Example 4, since the hydrogen concentration in the second gate insulating layer 22 is high, hydrogen diffuses from the second gate insulating layer 22 into the semiconductor layer 13 when the thin film transistor is repeatedly bent. Since the diffused hydrogen acts as a donor, the carrier concentration in the semiconductor layer 13 increases more than appropriate. Therefore, the threshold voltage of the thin film transistor of Comparative Example 4 after the dynamic bending test shifts negatively. From the above, it was found that the thin film transistor of Comparative Example 4 was inferior to the thin film transistors of Examples 1 to 16 in bending resistance. Furthermore, from the results of Examples 1 to 16, it was found that when the hydrogen concentration is 1 at% or more and 15 at% or less, the TFT characteristics remain as good even after the dynamic bending test as before the test.

Next, the thin film transistors of Examples 1 to 16 and Comparative Examples 5 and 6 will be compared. The thin film transistors of Examples 1 to 16 have mobilities of 11.1 to 14.2 cm ² /Vs before the bending test, while the thin film transistors of Comparative Examples 5 and 6 have mobilities of 6.0 to 7 before the bending test. .4 cm ² /Vs. In the thin film transistors of Comparative Examples 5 and 6, the second gate insulating layer 22 has a high carbon concentration, so the film quality of the second gate insulating layer 22 deteriorates, and the electron conductivity at the interface between the semiconductor layer 13 and the second gate insulating layer 22 decreases. decreases, and the mobility before the test decreases. Therefore, it was found that the thin film transistors of Comparative Examples 5 and 6 had poorer initial TFT characteristics than the thin film transistors of Examples 1 to 16. Further, from the results of Examples 1 to 16, it was found that high initial characteristics can be obtained when the carbon concentration is 10 at % or less.

Next, the thin film transistors of Examples 1 to 16 and Comparative Example 7 will be compared. The thin film transistors of Examples 1 to 16 had a mobility of 11.1 to 14.2 cm ² /Vs before the bending test, and the thin film transistor of Comparative Example 7 had a mobility of 13.3 cm ² /Vs before the bending test. Ta. However, after the dynamic bending test, the thin film transistors of Examples 1 to 16 had a mobility of 11.0 to 14.2 cm ² /Vs, and a mobility decrease rate of -2 to 2%. On the other hand, the thin film transistor of Comparative Example 7 had a mobility of 5.5 m ² /Vs after the test, and a mobility decrease rate of 59%. In the thin film transistor of Comparative Example 7, since the second gate insulating layer 22 is thick, the flexibility of the second gate insulating layer 22 is reduced, and when the thin film transistor is repeatedly bent, the semiconductor layer 13 and the second gate insulating layer 22, and microcracks in the second gate insulating layer 22 are likely to occur, and the mobility after the dynamic bending test is likely to be reduced. Therefore, the thin film transistor of Comparative Example 7 was found to have inferior bending resistance than the thin film transistors of Examples 1 to 16. Further, from the results of Examples 1 to 16, it was found that when the film thickness was 60 nm or less, high bending resistance that could withstand the dynamic bending test was obtained.

Next, the thin film transistors of Examples 1 to 16 and Comparative Example 8 will be compared. The thin film transistors of Examples 1 to 16 had a mobility of 11.1 to 14.2 cm ² /Vs before the bending test, while the thin film transistor of Comparative Example 8 had a mobility of 5.8 cm ² /Vs before the bending test. there were. In the thin film transistor of Comparative Example 8, the second gate insulating layer 22 is thin and has poor smoothness (island-like film). Therefore, the film quality of the second gate insulating layer 22 deteriorates, and the electron conductivity at the interface between the semiconductor layer 13 and the second gate insulating layer 22 decreases, so that the mobility before the test decreases. Therefore, it was found that the thin film transistor of Comparative Example 8 had poorer initial TFT characteristics than the thin film transistors of Examples 1 to 16. Further, from the results of Examples 1 to 16, it was found that high initial characteristics can be obtained when the film thickness is 2 nm or more.

As described above, according to the present invention, there is provided a thin film transistor having an insulating substrate, at least a gate electrode, a gate insulating layer, a semiconductor layer, a source electrode, and a drain electrode on the substrate, The gate insulating layer is formed of at least two or more layers, and includes a first gate insulating layer containing an organic material and a second gate insulating layer made of an inorganic compound formed by a coating method. In a thin film transistor characterized by having a region exposed from the second gate insulating layer, it is possible to provide a thin film transistor having high electrical durability against bending of the flexible substrate. Furthermore, compared to the manufacturing process of conventional organic/inorganic hybrid thin film transistors, it is possible to significantly reduce the number of steps, thereby making it possible to reduce costs.

The thin film transistor according to the present invention, which has high electrical durability against bending of a flexible substrate, can be used in flexible display devices and various sensors such as pressure sensors.

DESCRIPTION OF SYMBOLS 11... Flexible substrate 12... Gate electrode layer 13... Semiconductor layer 14... Source electrode layer 15... Drain electrode layer 21... First gate insulating layer 22... Second gate insulating layer

Claims (3)

A thin film transistor comprising an insulating substrate, and at least a gate electrode layer, a gate insulating layer, a semiconductor layer, a source electrode layer, and a drain electrode layer on the substrate,
The gate insulating layer is
a first gate insulating layer containing an organic material;
a second gate insulating layer made of an inorganic compound formed within the upper surface of the first gate insulating layer,
The second gate insulating layer has a carbon concentration of 0.5 at% to 10 at%, and a hydrogen concentration of 1 at% to 15 at%,
A thin film transistor, wherein the second gate insulating layer has a thickness of 2 to 60 nm. The thin film transistor according to claim 1, wherein the semiconductor layer is made of an oxide semiconductor. forming a gate electrode layer on a part of the flat surface of the flexible base material;
forming a first gate insulating layer containing an organic material so as to cover the gate electrode layer;
forming a second gate insulating layer made of an inorganic compound within the upper surface of the first gate insulating layer;
forming a semiconductor layer made of an oxide semiconductor within the upper surface of the second gate insulating layer;
forming a source electrode layer connected to the semiconductor layer;
comprising a step of forming a drain electrode layer connected to the semiconductor layer,
In the step of forming the second gate insulating layer, a precursor solution of an inorganic compound is formed into a film by a coating method, and the coated surface is irradiated with light and heat treated to generate an inorganic compound, so that the carbon concentration is reduced to 0.5 atoms. % to 10 atom %, a hydrogen concentration of 1 atom % to 15 atom %, and a film thickness of 2 to 60 nm.

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