JP2023113512A - Epitaxial wafer manufacturing method - Google Patents

Abstract

To provide an epitaxial wafer manufacturing method for efficiently performing epitaxial growth on a semiconductor substrate (especially a {110} plane orientation silicon single crystal wafer) while suppressing the deterioration of the haze level.SOLUTION: A method for manufacturing an epitaxial wafer 13 by vapor-phase epitaxial growth of an epitaxial layer on the surface of a semiconductor substrate includes a first growth step of growing a first epitaxial layer 11 of a semiconductor material on the surface of a semiconductor substrate W at a first growth temperature and a first growth rate, and a second growth step of growing a second epitaxial layer 12 of a semiconductor material on the first epitaxial layer at a second growth temperature equal to the first growth temperature and a second growth rate lower than the first growth rate.SELECTED DRAWING: Figure 1

Description

The present invention relates to an epitaxial wafer manufacturing method.

A silicon epitaxial wafer in which an epitaxial layer is formed on the surface of a silicon single crystal substrate by vapor phase epitaxy is widely used in electronic devices (Patent Documents 1 to 6). In recent years, due to miniaturization of electronic devices, demands for surface quality of epitaxial wafers have become stricter. One of these surface qualities is the haze level. Haze is minute unevenness generated on the surface of the epitaxial wafer, and when the surface of the epitaxial layer is observed in a dark room using a condensing lamp or the like, light is irregularly reflected and appears white and cloudy. The haze level can be evaluated by scattered light measurement of haze using, for example, KLA's particle counter SP3 (light scattering measuring device).

The haze level is closely related to epitaxial growth conditions (particularly growth temperature and growth rate). The haze level is also related to the plane orientation of the silicon single crystal substrate, and tends to deteriorate more easily in the (110) plane orientation than in the (100) plane orientation. In recent years, in order to improve the performance of electronic devices, there has been a movement to shift from the (100) plane orientation to the (110) plane orientation of single crystal substrates. Thus, it is necessary to improve the haze level (in particular, improve the (110) plane orientation).

Japanese Patent Publication No. 2003-505317 JP 2011-44692 A Japanese Patent Application Laid-Open No. 2015-213102 JP 2020-107729 A Japanese Patent Application Laid-Open No. 2020-107730 JP 2005-294711 A

The present invention has been made to solve the above-described problems, and efficiently performs epitaxial growth on a semiconductor substrate (especially a silicon single crystal wafer with a plane orientation of {110}) while suppressing the deterioration of the haze level. The purpose is to provide a method.

To achieve the above objects, the present invention provides a method for manufacturing an epitaxial wafer by vapor-phase epitaxial growth of an epitaxial layer on the surface of a semiconductor substrate, comprising:
a first growth step of growing a first epitaxial layer of semiconductor material on the surface of the semiconductor substrate at a first growth temperature and a first growth rate;
Growing a second epitaxial layer of semiconductor material on the first epitaxial layer at a second growth temperature equal to the first growth temperature and a second growth rate lower than the first growth rate. a second growth step;
A method for producing an epitaxial wafer is provided, comprising:

According to the epitaxial wafer manufacturing method of the present invention, it is possible to perform epitaxial growth on the surface of a semiconductor substrate while suppressing deterioration of the haze level, and to manufacture an epitaxial wafer with a reduced haze level efficiently and with high productivity. can be done. For example, it is particularly effective when vapor-phase growth of an epitaxial layer is performed on a semiconductor substrate such as a silicon single crystal wafer having a plane orientation of {110}, where the haze level tends to deteriorate.

At this time, when the total thickness of the first epitaxial layer and the second epitaxial layer is 100,
The film thickness of the second epitaxial layer grown in the second growth step can be 2.5 or more.

By growing the second epitaxial layer having such a film thickness on the first epitaxial layer, it is possible to more reliably improve the haze level in the first epitaxial layer and obtain a high-quality epitaxial wafer. can.

Furthermore, the film thickness of the second epitaxial layer grown in the second growth step can be 10 or more.

This makes it possible to further suppress the deterioration of the haze level.

A substrate having a plane orientation of {110} can be used as the semiconductor substrate.

Since the {110} plane orientation tends to deteriorate the haze level more easily than the {100} plane orientation, the present invention, which has the effect of suppressing the haze level, is more effective.

Moreover, a silicon single crystal wafer can be used as the semiconductor substrate.

Silicon single crystal wafers are often used as semiconductor substrates on which epitaxial layers are grown, and are in high demand.

According to the epitaxial wafer manufacturing method of the present invention, high-quality epitaxial wafers with a reduced haze level can be manufactured with high productivity. In particular, it is an effective method when forming an epitaxial layer on a silicon single crystal wafer with a plane orientation of {110}.

It is explanatory drawing which shows an example of the manufacturing method of the epitaxial wafer of this invention. 5 is a graph showing the temperature profile of a wafer during vapor phase epitaxy; 1 is a schematic diagram showing an example of the configuration of a single-wafer vapor phase growth apparatus; FIG. FIG. 4 is an explanatory diagram showing a method for manufacturing an epitaxial wafer in Comparative Example 1; 5 is a graph showing the temperature profile of a wafer in Comparative Example 1; 4 is a graph showing evaluation results of haze levels in Example 1-4 and Comparative Example 1-2.

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described with reference to the drawings, but the present invention is not limited thereto.
As described above, an epitaxial wafer having a reduced haze level is manufactured by forming an epitaxial layer on a semiconductor substrate (such as a silicon single crystal wafer having a plane orientation of {110}) that tends to deteriorate the haze level. I needed a way to do it. As a result of intensive research by the present inventors, a first growth step (growing a first epitaxial layer at a first growth temperature and a first growth rate) and a second growth step (second growth growing a second epitaxial layer at a temperature and a second growth rate), where the second growth temperature is equal to the first growth temperature and the second growth rate is lower than the first growth rate. The inventors have found that good epitaxial wafers with a low haze level can be obtained with high productivity by manufacturing epitaxial wafers, and have completed the present invention.

In the following, a silicon single crystal wafer (silicon single crystal substrate) with a plane orientation of {110} is taken as an example of a semiconductor substrate, and a silicon single crystal film is taken as an example of a first epitaxial layer and a second epitaxial layer of a semiconductor material. to explain. Demand for silicon single crystal wafers and silicon single crystal films is high. In addition, the haze level of the epitaxial layer surface tends to deteriorate in a substrate having a {110} principal surface, and the present invention, which can improve the haze level, is particularly effective. However, the present invention is not limited to this, and an epitaxial layer of a desired semiconductor material can be grown using a semiconductor substrate having a desired plane orientation.

First, the configuration of a single wafer type vapor phase growth apparatus will be described as a preferred example of the vapor phase growth apparatus used in the epitaxial wafer manufacturing method of the present invention. FIG. 3 is an example of a schematic of a single wafer type vapor phase growth apparatus.
As shown in FIG. 3, the vapor phase growth apparatus 1 includes a reaction vessel 2 and a susceptor 3 provided inside the reaction vessel 2 and supporting a silicon single crystal substrate W on its upper surface.
Then, in the reaction vessel 2, a vapor phase growth gas containing a raw material gas (for example, trichlorosilane) and a carrier gas (for example, hydrogen) is introduced into the reaction vessel 2 into the region above the susceptor 3, and the susceptor 3 is A vapor phase growth gas introduction pipe 4 is provided to supply the main surface of the upper silicon single crystal substrate W. As shown in FIG. In addition, a purge gas (for example, hydrogen) is introduced into the reaction vessel 2 into the region below the susceptor 3 on the same side of the reaction vessel 2 where the gas introduction pipe 4 for vapor phase growth is provided. A purge gas introduction pipe 5 is provided.
Further, the gas (vapor-phase growth gas and purge gas) in the reaction vessel 2 is exhausted from the side of the reaction vessel 2 opposite to the side on which the vapor-phase growth gas introduction pipe 4 and the purge gas introduction pipe 5 are provided. An exhaust pipe 6 is provided.

Heating devices 7a and 7b are provided outside the reaction vessel 2 to heat the reaction vessel 2 from above and below. Examples of the heating devices 7a and 7b include halogen lamps.
The susceptor 3 is made of graphite coated with silicon carbide, for example. The susceptor 3 is formed, for example, in the shape of a substantially disk, and has a counterbore 3a, which is a substantially circular recess in plan view, formed on the upper surface thereof for positioning the silicon single crystal substrate W on the upper surface. There is.
A susceptor support member 8 is provided on the lower surface of the susceptor 3 to support the susceptor 3 from the rear surface. The susceptor support member 8 is movable in the vertical direction indicated by arrow A and rotatable in the direction indicated by arrow B. As shown in FIG.

Next, a method for producing an epitaxial wafer according to the present invention will be described. FIG. 1 is an explanatory diagram of a method of manufacturing a silicon epitaxial wafer by chemical vapor deposition (CVD). Specifically, it shows a configuration example of a wafer in each step up to manufacturing a silicon epitaxial wafer.
Also, FIG. 2 shows the temperature profile of the wafer during vapor phase epitaxy.

<Preparation of semiconductor substrate>
As shown in the upper part of FIG. 1, a silicon single crystal substrate W (hereinafter sometimes simply referred to as a wafer) is prepared as an example of a semiconductor substrate. The characteristics (conductivity type, resistivity, plane orientation, diameter, etc.) of the semiconductor substrate W may be appropriately set according to the purpose of use of the silicon epitaxial wafer to be manufactured.
Here, a silicon single crystal substrate having a plane orientation of {110} is used. The main surface is not limited to the {110} plane, and may be inclined from the {110} plane by an off angle (for example, more than 0 degrees and less than 0.5 degrees). By doing so, it is possible to obtain a silicon epitaxial wafer with a higher carrier mobility than that with a plane orientation of {100}, and with a reduced haze level later.

First, a silicon single crystal ingot having a <110> principal axis orientation is manufactured by a known method such as the Floating Zone (FZ) method or the Czochralski (CZ) method. Then, the obtained silicon single crystal ingot is cut off at the head and the tail, and then the peripheral portion of the ingot is cut by rotation to accurately obtain the diameter and make the ingot into a complete cylindrical block.
The cylindrical block thus finished is sliced by a slicer such as an inner diameter cutting machine so that the main surface is just the {110} plane.

After slicing, the outer edges of both surfaces of the silicon single crystal substrate are chamfered by beveling.
The chamfered silicon single crystal substrate is subjected to double-sided lapping using free abrasive grains to obtain a lapped wafer. Alternatively, both sides are ground using a fixed abrasive to obtain a ground wafer.
Both surfaces are then chemically etched by immersing the lapped or ground wafer in an etchant. A chemical etching process is performed to remove a damaged layer generated on the surface of the silicon single crystal substrate by lapping or grinding.
After this chemical etching treatment, the front surface or front and back surfaces are mirror-polished by mechanochemical polishing, and then subjected to final cleaning.

In this way, a silicon single crystal substrate having a {110} main surface (that is, a plane orientation of {110}) having higher carrier mobility than a silicon single crystal substrate having a {100} main surface is prepared.

<Removal of native oxide film>
Next, in vapor-phase growing the first epitaxial layer 11 (silicon single crystal film here) on the surface of the prepared wafer W, the native oxide film on the surface of the wafer W is removed.
Specifically, the wafer W is put into a reaction vessel 2 of a single wafer type vapor phase growth apparatus 1 as shown in FIG.
After that, the heating devices 7a and 7b provided in the vapor phase growth apparatus 1 heat the wafer W to a predetermined heat treatment temperature T0 (here, the temperature T) for "Bake" as indicated by "Ramp" in FIG. _A ). In FIG. 2, this heat treatment temperature T0 shows the same example as the first growth temperature T1 (the temperature at "Depo1" in FIG. 2) in the first epitaxial layer 11 to be described later. It may be different from the temperature T1. This heat treatment temperature T0 can be, for example, a temperature in the vicinity of 1100°C, specifically, for example, 1100°C±60°C. Then, as indicated by "Bake", while maintaining the temperature of the wafer W at the heat treatment temperature T0 (temperature T _A ) for a predetermined time, reaction is performed through the vapor phase growth gas introduction pipe 4 and the purge gas introduction pipe 5, respectively. Hydrogen is introduced into the container 2, and a heat treatment (Bake) is performed in a hydrogen atmosphere to remove the natural oxide film formed on the surface of the wafer W. As shown in FIG. Alternatively, hydrogen may be introduced into the reaction vessel 2 before the wafers W are loaded, and the wafers W may be heated after the wafers W are loaded.

<Vapor Phase Growth of First Epitaxial Layer (First Growth Step)>
After that, as shown in the middle part of FIG. 1, the first epitaxial layer 11 is grown at a first growth temperature T1 and a first growth rate GR1 on the surface of the wafer W from which the native oxide film has been removed. As indicated by "Depo1" in FIG. 2, the temperature of the wafer W is set to the first growth temperature T1 (here, the temperature T _A which is the same as the heat treatment temperature T0 at the time of removing the native oxide film), and then the reaction is performed. In the container 2, a raw material gas (specifically, a silane gas such as trichlorosilane (TCS)) as a raw material for the silicon single crystal film, a carrier gas (for example, hydrogen) for diluting the raw material gas, and a conductive material for the silicon single crystal film are contained. A vapor deposition gas containing a dopant gas (for example, a gas containing boron or phosphorus) that imparts a mold is flowed. Then, the first epitaxial layer 11 (silicon single crystal film) of the semiconductor material is grown on the surface of the wafer W by this vapor phase growth gas.

The properties (thickness, resistivity, conductivity type, etc.) of the first epitaxial layer 11 may be appropriately set according to the purpose of use of the silicon epitaxial wafer to be manufactured. Then, the growth conditions of the first growth step (first growth temperature T1, first growth rate GR1, first growth time, etc.) are adjusted so as to obtain the first epitaxial layer 11 having desired characteristics. set.
Specifically, the first growth time may be set such that the first epitaxial layer 11 has a desired film thickness.
Further, the first growth temperature T1 and the first growth rate GR1 are preferably set to a growth temperature and a growth rate at which the film formation time can be shortened in consideration of the productivity of the first epitaxial layer 11, for example. preferable. For example, it can be around 1100° C. (range of 1100° C.±60° C.). Also, the first growth rate GR1 can be, for example, a region with a high growth rate (for example, a region of 2.5 μm/min or more). The growth rate can be adjusted by increasing the growth temperature, the flow rate of the raw material gas introduced into the reaction vessel, and the concentration of the raw material gas in the vapor phase growth gas (including the raw material gas and carrier gas).
After growing the first epitaxial layer in this manner, the introduction of the gas for vapor phase growth into the reaction vessel is stopped to temporarily stop the growth of the epitaxial layer.

<Vapor Phase Growth of Second Epitaxial Layer (Second Growth Step)>
Next, as shown in the lower part of FIG. 1, a second epitaxial layer 12 is formed on the first epitaxial layer 11 at a second growth temperature T2 and a second growth rate GR2 ("Depo2" in FIG. 2). (silicon single crystal film) is grown to manufacture an epitaxial wafer 13 (silicon epitaxial wafer). At this time, in order to reduce the haze level (surface unevenness) of the epitaxial layer, the growth conditions of the epitaxial layer are changed from the growth conditions of the first growth step to the predetermined growth conditions of the second growth step ( second growth temperature T2, second growth rate GR2, second growth time, etc.), and then, as shown in the lower part of FIG. 12 (silicon single crystal film) is vapor-grown.

At this time, the second growth temperature T2 is set equal to the first growth temperature T1, and the second growth rate GR2 is set lower than the first growth rate GR1. Perform phase growth.
That is, when the first growth temperature T1 (the temperature T _A in FIG. 2) is set at 1100° C., the second growth temperature T2 is similarly kept at 1100° C.
Further, when the first growth rate GR1 is set to, for example, 2.5 μm/min, the second growth rate GR2 is set to a growth rate lower than 2.5 μm/min (eg, 2.0 μm/min, 1.0 μm/min, 5 μm/min, 1.0 μm/min, etc.). The growth rate in this case can be adjusted by adjusting the flow rate and concentration of the raw material gas, as in the first growth step.

By performing vapor phase growth with the growth conditions of the first growth step and the growth conditions of the second growth step set so as to have the above relationship, a single layer can be obtained under the growth conditions of the first growth step. Reduce the haze level on the surface of the finally obtained epitaxial wafer 13 (surface of the second epitaxial layer 12) compared to the case of growing the epitaxial layer (only the first epitaxial layer) can do. For example, when evaluating the main surface with a DWO channel (Dark Field Wide Oblique) using a light scattering meter (SP3) manufactured by KLA, 2.0 ppm, or even less excellent Haze levels can be obtained.
In addition, by dividing the growth step into two steps of the first growth step and the second growth step with a lower growth rate, a single-layer epitaxial layer can be obtained under the growth conditions of the second growth step with a lower growth rate. Compared to growing layers (growing only the second epitaxial layer), epitaxial growth can be performed more efficiently, and productivity can be improved.

The second growth time should be set so that the second epitaxial layer 12 can have a desired film thickness.
However, in the relationship between the film thickness of the second epitaxial layer 12 and the film thickness of the first epitaxial layer 11, when the total film thickness of these layers is 100, the film thickness of the second epitaxial layer is, for example, It is preferably 2.5 or more (the ratio of the film thickness of the second epitaxial layer to the total film thickness: 2.5% or more). By doing so, the haze level can be improved more reliably. More preferably, the film thickness of the second epitaxial layer can be 10% or more (10% or more). The upper limit of the film thickness of the second epitaxial layer is not particularly limited as long as it is less than 100. For example, if it is 25 (25%), the haze level can be sufficiently improved and the productivity is greatly impaired. It is preferable because there is no

EXAMPLES The present invention will be described in more detail below with reference to Examples and Comparative Examples of the present invention, but the present invention is not limited to these.
(Example 1)
A plurality (three) of P-type silicon single crystal wafers having a diameter of 300 mm and a principal plane orientation of (110) were prepared, and a single-wafer type vapor deposition apparatus having the same configuration as the vapor phase growth apparatus 1 shown in FIG. After removing the natural oxide film on the surface of each silicon single crystal wafer using a phase growth apparatus (Applied Materials Inc. apparatus: Centura), two layers of silicon single crystal films are formed on the surface under different growth conditions. was performed to produce an epitaxial wafer. Specifically, the growth conditions were as follows.
<Conditions for removing native oxide film>
Heat treatment in a hydrogen atmosphere (heat treatment temperature: 1100°C)
<Growth conditions for the first epitaxial layer (first layer)>
Growth temperature: 1100°C
Growth rate: 2.5 μm/min
Film thickness: 1.95 μm
<Growth Conditions for Second Epitaxial Layer (Second Layer)>
Growth temperature: 1100°C
Growth rate: 1.5 μm/min
Film thickness: 0.05 μm
<Ratio of film thickness of second epitaxial layer to total film thickness>
2.5%

Note that trichlorosilane was used as a raw material gas and hydrogen was used as a carrier gas during vapor phase growth. The supply amount of the source gas was about 12 slm for the first layer and about 6 slm for the second layer. The amount of carrier gas supplied was 90 slm. Hydrogen was also selected as the purge gas, and the supply amount was 25 slm.

After that, the haze on the surface of the grown epitaxial layer was evaluated. Haze was evaluated for haze level in a DWO channel using a light scattering meter (SP3) manufactured by KLA. As a result of evaluation, it was 2.0 ppm. This evaluation value is an average value of haze levels obtained by manufacturing a plurality of epitaxial wafers (the above three sheets) under the same conditions as described above and evaluating these epitaxial wafers.

(Comparative example 1)
After preparing the same number of silicon single crystal wafers as in Example 1 and using the same apparatus as in Example 1 to remove the native oxide film in the same manner as in Example 1, one layer of Example 1 was obtained. An epitaxial wafer was manufactured by growing a single epitaxial layer (silicon single crystal film) with a film thickness of 2 μm at the same growth temperature and growth rate (1100° C., 2.5 μm/min). Since this epitaxial layer is composed only of the first epitaxial layer as referred to in Example 1, <the ratio of the thickness of the second epitaxial layer to the total thickness> is 0%.
FIG. 4 shows an explanatory diagram of the method for manufacturing an epitaxial wafer of Comparative Example 1, and FIG. 5 shows the temperature profile of the wafer during vapor phase epitaxy.
After that, when the haze level of the grown epitaxial layer surface was evaluated in the same manner as in Example 1, it was 2.4 ppm.

(Comparative Example 2, Examples 2 to 4)
When the total film thickness was 2 μm, <the ratio of the thickness of the second epitaxial layer to the total film thickness> was 0% in Comparative Example 1 and 2.5% in Example 1. %, 25% and 100% to form an epitaxial layer (Examples 2 to 4 and Comparative Example 2 in order). The epitaxial layer in Comparative Example 2 has a structure of only the second epitaxial layer referred to in Example 1. FIG.

As a result of measuring the haze level in the same manner as in Example 1, the haze levels were improved to 1.8 ppm, 1.6 ppm, 1.5 ppm and 1.4 ppm, respectively.
FIG. 6 shows the haze level evaluation results of Example 1-4 and Comparative Example 1-2. As shown in FIG. 6, the haze level could be improved to 2.0 ppm or less when <the ratio of the thickness of the second epitaxial layer to the total thickness> was 2.5% or more. However, in Comparative Example 2, although the suppression of the haze level became more reliable, the growth rate was low, and the productivity deteriorated by 33% compared to Example 4. Therefore, it cannot be said to be an effective manufacturing method. do not have. In consideration of productivity, the thickness of the second epitaxial layer is more preferably 2.5% or more and 25% or less, more preferably 10% or more and 25% or less.

It should be noted that the present invention is not limited to the above embodiments. The above embodiment is an example, and any device that has substantially the same configuration as the technical idea described in the claims of the present invention and produces similar effects is the present invention. It is included in the technical scope of the invention.

DESCRIPTION OF SYMBOLS 1... Single wafer type vapor phase growth apparatus, 2... Reaction container, 3... Susceptor,
3a... spot facing, 4... gas phase growth gas introduction pipe, 5... purge gas introduction pipe,
6 Exhaust pipe 7a, 7b Heating device 8 Susceptor support member
W ... silicon single crystal substrate,
11... First epitaxial layer (silicon single crystal film),
12... Second epitaxial layer (silicon single crystal film),
13... Epitaxial wafer (silicon epitaxial wafer).

Claims (5)

A method for manufacturing an epitaxial wafer by vapor-phase epitaxial growth of an epitaxial layer on a surface of a semiconductor substrate, comprising:
a first growth step of growing a first epitaxial layer of semiconductor material on the surface of the semiconductor substrate at a first growth temperature and a first growth rate;
Growing a second epitaxial layer of semiconductor material on the first epitaxial layer at a second growth temperature equal to the first growth temperature and a second growth rate lower than the first growth rate. a second growth step;
A method for producing an epitaxial wafer, comprising: When the total thickness of the first epitaxial layer and the second epitaxial layer is 100,
2. The method of manufacturing an epitaxial wafer according to claim 1, wherein the film thickness of said second epitaxial layer grown in said second growth step is 2.5 or more. 3. The method of manufacturing an epitaxial wafer according to claim 2, wherein the thickness of said second epitaxial layer grown in said second growth step is 10 or more. 4. The method of manufacturing an epitaxial wafer according to claim 1, wherein a substrate having a plane orientation of {110} is used as the semiconductor substrate. 5. The method for producing an epitaxial wafer according to claim 1, wherein a silicon single crystal wafer is used as the semiconductor substrate.

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