JP2023080425A - Electronic module and electronic apparatus - Google Patents

Abstract

To reduce interference noise.SOLUTION: An electronic module includes a first wiring board, a second wiring board disposed on the first wiring board, a first semiconductor component disposed on the second wiring board and having a first power source terminal and a first ground terminal, and a first capacitor element disposed between the first wiring board and the second wiring board and having a first electrode and a second electrode. The first wiring board includes a first power source line and a first ground line. The second wiring board includes a second power source line and a second ground line. The first power source terminal is electrically connected to the first power source line through the second power source line. The first ground terminal is electrically connected to the first ground line through the second ground line. The first electrode is not coupled to the first power source line and is coupled with the second power source line. The second electrode is coupled to both the first ground line and the second ground line.SELECTED DRAWING: Figure 2

Description

The present invention relates to noise countermeasure technology.

An electronic module mounted on an electronic device has a printed wiring board and a semiconductor device mounted on the printed wiring board. A semiconductor package is an example of a semiconductor device. A semiconductor package has a semiconductor component and a package substrate on which the semiconductor component is mounted. When the semiconductor component operates, a current due to the operation of the semiconductor component flows through the power supply path of the package substrate and the printed wiring board. The impedance of the power supply path is called the power supply impedance. Potential fluctuation occurs due to the product of the current flowing through the power supply path and the power supply impedance. As one method for reducing such potential fluctuations, Patent Literature 1 discloses disposing a capacitor in a power supply path. Potential fluctuations caused by the operation of semiconductor components can be reduced by charge supply from capacitors.

JP-A-5-13909

However, as the speed of operation of semiconductor components increases, the generation of minute noise in power supply paths has become a problem. This noise affects the operation of other semiconductor components or other circuits by propagating to other semiconductor components or other circuits inside the semiconductor components along power supply paths. Of the noise generated by the operation of semiconductor components, noise that propagates to other semiconductor components and other circuits is called interference noise.

An object of the present invention is to reduce interference noise.

An electronic module of the present invention comprises a first wiring board, a second wiring board arranged on the first wiring board, and a first power supply terminal and a first ground terminal arranged on the second wiring board. and a first capacitive element having a first electrode and a second electrode disposed between the first wiring board and the second wiring board, wherein the first wiring board has , a first power supply line and a first ground line, the second wiring board has a second power supply line and a second ground line, and the first power supply terminal is connected to the second power supply line. electrically connected to the first power line through a power line, the first ground terminal is electrically connected to the first ground line through the second ground line, and the first electrode is: characterized in that the second electrode is not joined to the first power line but joined to the second power line, and the second electrode is joined to both the first ground line and the second ground line. do.

Further, the electronic module of the present invention comprises: a first wiring board; a second wiring board arranged on the first wiring board; and a first power supply terminal and a first ground arranged on the second wiring board. a first semiconductor component having a terminal; and a first capacitive element having a first electrode and a second electrode disposed between the first wiring board and the second wiring board; The board has a first power line and a first ground line, the second wiring board has a second power line and a second ground line, and the first power terminal is connected to the electrically connected to the first power line through a second power line, the first ground terminal is electrically connected to the first ground line through the second ground line, and the first electrode is connected to both the first power supply line and the second power supply line, and the second electrode is not connected to the first ground line but is connected to the second ground line. Characterized by

According to the present invention, interference noise can be reduced.

1 is an explanatory diagram of a digital camera that is an imaging device as an example of an electronic device according to a first embodiment; FIG. 1 is a schematic cross-sectional view of a main part of an image processing module that is an example of an electronic module according to a first embodiment; FIG. 4A is an enlarged view of the periphery of the first capacitative element in the image processing module according to the first embodiment; FIG. 4B is an enlarged view of the periphery of the second capacitive element in the image processing module according to the first embodiment; FIG. FIG. 10 is a schematic cross-sectional view of a main part of an image processing module, which is an example of an electronic module according to a second embodiment; (a) is an enlarged view of the periphery of the first capacitive element in the image processing module according to the second embodiment. (b) is an enlarged view of the periphery of the second capacitive element in the image processing module according to the second embodiment. FIG. 11 is a schematic cross-sectional view of a main part of an image processing module that is an example of an electronic module according to a third embodiment; (a) is an enlarged view of the periphery of the first capacitive element in the image processing module according to the third embodiment. (b) is an enlarged view of the periphery of the second capacitive element in the image processing module according to the third embodiment. FIG. 11 is a schematic cross-sectional view of a main part of an image processing module, which is an example of an electronic module according to a fourth embodiment; FIG. 11 is a schematic cross-sectional view of a main part of an image processing module, which is an example of an electronic module according to a fifth embodiment; (a) is an enlarged view of the periphery of the first capacitive element in the image processing module according to the fifth embodiment. (b) is an enlarged view of the periphery of the second capacitive element in the image processing module according to the fifth embodiment; FIG. 11 is a schematic cross-sectional view of a main part of an image processing module, which is an example of an electronic module according to a sixth embodiment;

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments for carrying out the present invention will be described in detail with reference to the drawings.

[First embodiment]
FIG. 1 is an explanatory diagram of a digital camera 600, which is an imaging device as an example of electronic equipment according to the first embodiment. A digital camera 600 as an imaging device is a lens-interchangeable digital camera and includes a camera body 651 . A lens unit (lens barrel) 602 including lenses is detachable from the camera body 651 . The camera body 651 includes a housing 660 and a sensor module 900 and an image processing module 1000 arranged inside the housing 660 .

Sensor module 900 and image processing module 1000 are electrically connected by flexible printed wiring board 800 . A power source (not shown) is provided inside the housing 660 . The power supply is, for example, a DC power supply. A DC power supply is, for example, a battery.

A sensor module 900 has an image sensor 901 and a printed wiring board 902 . Image sensor 901 is mounted on printed wiring board 902 . The image sensor 901 is, for example, a CMOS (Complementary Metal Oxide Semiconductor) image sensor or a CCD (Charge Coupled Device) image sensor. The image sensor 901 has a function of converting light incident through the lens unit 652 into an electrical signal.

The image processing module 1000 is an example of an electronic module and is made up of a printed circuit board. The image processing module 1000 includes a printed wiring board 101 , and a power supply device 700 and a semiconductor device 150 mounted on the printed wiring board 101 . Printed wiring board 101 is an example of a first wiring board, and is a rigid printed wiring board.

The power supply device 700 is a device that supplies power from a battery (not shown) to the semiconductor device 150 . The power supply device 700 is an IC having a power supply element. The power supply device 700 applies an operating voltage, such as a DC voltage, to the semiconductor device 150 via the printed wiring board 101, and supplies the semiconductor device 150 with electric power required for the operation of the semiconductor device 150, that is, current. . The printed wiring board 101 is formed with a part of a power supply path for supplying power, that is, current from the power supply device 700 to the semiconductor device 150 .

FIG. 2 is a schematic cross-sectional view of a main part of an image processing module 1000, which is an example of the electronic module according to the first embodiment. A semiconductor device 150 includes a printed wiring board 102 that is an example of a second wiring board, a semiconductor component 151 that is an example of a first semiconductor component, and a semiconductor component 152 that is an example of a second semiconductor component. The printed wiring board 102 is a rigid printed wiring board. Printed wiring board 102 is arranged on printed wiring board 101 . Semiconductor components 151 and 152 are arranged on printed wiring board 102 . That is, the printed wiring board 102 is mounted on the printed wiring board 101 and the semiconductor components 151 and 152 are mounted on the printed wiring board 102 .

Each semiconductor component 151, 152 is a semiconductor chip. Each semiconductor component 151, 152 has a die (not shown) sealed with resin. The semiconductor component 151 is an element capable of image processing, that is, a digital signal processor. The semiconductor component 151 has a function of acquiring a digital signal, which is an electrical signal, from the image sensor 901 and generating image data based on the acquired digital signal. The semiconductor component 152 is a memory element that is connected to the semiconductor component 151 so as to be capable of data communication and that can store image data generated by the semiconductor component 151 .

The printed wiring board 101 is, for example, a motherboard. The printed wiring board 101 has a flat insulating substrate 11 made of an insulating material, and a power supply line 110V and a ground line 110G held by the insulating substrate 11 . The insulating material of the insulating substrate 11 is, for example, glass epoxy resin. The power line 110V is an example of a first power line, and the ground line 110G is an example of a first ground line. In printed wiring board 101, power supply line 110V and ground line 110G are not in contact with each other, that is, they are independent of each other. These lines 110V and 110G are made of a conductive material, such as copper. In addition to these lines 110V and 110G, the printed wiring board 101 may have signal lines (not shown) serving as signal transmission paths.

The direction perpendicular to the main surface of the printed wiring board 101, that is, the main surface 1011 of the insulating substrate 11 is defined as the Z direction. The two directions that intersect (perpendicularly) the Z direction and intersect (perpendicularly) with each other are defined as the X direction and the Y direction.

A plurality of pads 104 are arranged in an array on the main surface 1011 of the insulating substrate 11 . The multiple pads 104 are spaced apart from each other in the X and Y directions. An insulating layer such as a solder resist layer (not shown) may be formed on the main surface 1011 .

The printed wiring board 102 is, for example, a package substrate, that is, an interposer. The printed wiring board 102 has a flat insulating substrate 12 made of an insulating material, and power lines 120V and 130V and ground lines 120G and 130G held on the insulating substrate 12 . The insulating material of the insulating substrate 12 is, for example, glass epoxy resin. The power line 120V is an example of a second power line. The power line 130V is an example of a third power line. Ground line 120G is an example of a second ground line. Ground line 130G is an example of a third ground line. In printed wiring board 102, power supply line 120V, power supply line 130V, ground line 120G and ground line 130G are not in contact with each other, that is, are independent of each other. These lines 120V, 120G, 130V, 130G are made of a conductive material, for example copper. In addition to these lines 120V, 120G, 130V, and 130G, the printed wiring board 102 may have signal lines (not shown) serving as signal transmission paths. The semiconductor component 151 and the semiconductor component 152 are capable of data communication with each other through the signal line.

A main surface 1021 of the insulating substrate 12 faces the main surface 1011 with a gap therebetween. A plurality of pads 105 are arranged in an array on main surface 1021 . The multiple pads 105 are spaced apart from each other in the X and Y directions. In the first embodiment, the number of pads 105 is the same as the number of pads 104 and each pad 105 faces each pad 104 . An insulating layer (not shown) such as a solder resist layer may be formed on main surface 1021 .

A portion of the plurality of pads 104 and a portion of the plurality of pads 105 are bonded to each other by conductive bonding portions 160, respectively. In the first embodiment, each joint 160 is made of a conductive member. A conductive member forming each joint 160 is, for example, solder.

Semiconductor components 151 and 152 are spaced apart from each other on a main surface 1022 opposite to the main surface 1021 of the insulating substrate 12 . The semiconductor component 151 has a plurality of terminals 153 arranged in an array at intervals in the X and Y directions. Each of the plurality of terminals 153 includes solder bumps and pads. The semiconductor component 152 has a plurality of terminals 154 arranged in an array at intervals in the X and Y directions. Each of the plurality of terminals 154 includes solder bumps and pads. Each of a plurality of terminals 153 of semiconductor component 151 is mechanically and electrically connected to a pad (not shown) on main surface 1022 . Also, each of the plurality of terminals 154 of the semiconductor component 152 is mechanically and electrically connected to a pad (not shown) on the principal surface 1022 . An insulating layer (not shown) such as a solder resist layer may be formed on main surface 1022 .

The plurality of terminals 153 includes power terminals 153V and ground terminals 153G. The power terminal 153V is an example of a first power terminal, and the ground terminal 153G is an example of a first ground terminal. The plurality of terminals 154 includes power terminals 154V and ground terminals 154G. The power terminal 154V is an example of a second power terminal, and the ground terminal 154G is an example of a second ground terminal.

The semiconductor component 151 becomes operable when an operating voltage, that is, a DC voltage is applied between the power terminal 153V and the ground terminal 153G. The semiconductor component 152 becomes operable when an operating voltage, that is, a DC voltage is applied between the power terminal 154V and the ground terminal 154G. In the first embodiment, the rated voltage of the semiconductor component 151 required for operation of the semiconductor component 151 is the same as the rated voltage of the semiconductor component 152 required for operation of the semiconductor component 152 . Accordingly, operating voltages are applied to the semiconductor components 151 and 152 from the power supply device 700 shown in FIG. 1 via the common lines 110V and 110G.

A power terminal 153V of the semiconductor component 151 is electrically connected to the power line 120V by being joined to a pad of the power line 120V. A ground terminal 153G of the semiconductor component 151 is electrically connected to the ground line 120G by being joined to a pad of the ground line 120G. Also, the power terminal 154V of the semiconductor component 152 is electrically connected to the power line 130V by being joined to the pad of the power line 130V. A ground terminal 154G of the semiconductor component 152 is electrically connected to the ground line 130G by being joined to a pad of the ground line 130G.

The power supply line 110V and the ground line 110G are electrically connected to the power supply device 700 shown in FIG. The power supply line 110V is joined to the power supply line 120V at a joint 161V among the plurality of joints 160 . Ground line 110G is joined to ground line 120G at joint 161G among the plurality of joints 160 . Also, the power supply line 110V is joined to the power supply line 130V at a joint 162V among the plurality of joints 160 . Ground line 110G is joined to ground line 130G at joint 162G of the plurality of joints 160 .

Therefore, the power terminal 153V of the semiconductor component 151 is electrically connected to the power line 110V through the power line 120V. A ground terminal 153G of the semiconductor component 151 is electrically connected to the ground line 110G through the ground line 120G. A power terminal 154V of the semiconductor component 152 is electrically connected to the power line 110V through the power line 130V. Ground terminal 154G of semiconductor component 152 is electrically connected to ground line 110G via ground line 130G.

A DC voltage, which is an operating voltage, is applied by power supply device 700 between power supply line 110V and ground line 110G. Therefore, a DC voltage, which is an operating voltage, is applied between power supply terminal 153V and ground terminal 153G of semiconductor component 151 via power supply lines 110V and 120V and ground lines 110G and 120G. A DC voltage, which is an operating voltage, is applied between power supply terminal 154V and ground terminal 154G of semiconductor component 152 via power supply lines 110V and 130V and ground lines 110G and 130G. In this manner, the operating voltage is applied to semiconductor component 151 by power supply device 700 via power supply line 110V and ground line 110G of printed wiring board 101 and power supply line 120V and ground line 120G of printed wiring board 102 . An operating voltage is applied to semiconductor component 152 by power supply device 700 via power supply line 110V and ground line 110G of printed wiring board 101 and power supply line 130V and ground line 130G of printed wiring board 102 .

The power line 110V has at least one power pattern 117V arranged on the conductor layer of the printed wiring board 101 and a plurality of power vias 118V extending in the Z direction. The power supply pattern 117V is a flat conductor pattern extending in the X direction and the Y direction. Each power via 118V is a via conductor. The ground line 110G has at least one ground pattern 117G arranged on the conductor layer of the printed wiring board 101 and a plurality of ground vias 118G extending in the Z direction. The ground pattern 117G is a flat conductor pattern extending in the X and Y directions. Each ground via 118G is a via conductor.

The power line 120V has at least one power pattern 127V arranged on the conductor layer of the printed wiring board 102 and a plurality of power vias 128V extending in the Z direction. The power supply pattern 127V is a flat conductor pattern extending in the X direction and the Y direction. Each power via 128V is a via conductor. The ground line 120G has at least one ground pattern 127G arranged on the conductor layer of the printed wiring board 102 and a plurality of ground vias 128G extending in the Z direction. The ground pattern 127G is a flat conductor pattern extending in the X and Y directions. Each ground via 128G is a via conductor.

The power line 130V has at least one power pattern 137V arranged on the conductor layer of the printed wiring board 102 and a plurality of power vias 138V extending in the Z direction. The power supply pattern 137V is a flat conductor pattern extending in the X direction and the Y direction. Each power via 138V is a via conductor. The ground line 130G has at least one ground pattern 137G arranged on the conductor layer of the printed wiring board 102 and a plurality of ground vias 138G extending in the Z direction. The ground pattern 137G is a flat conductor pattern extending in the X and Y directions. Each ground via 138G is a via conductor.

With the above configuration, a power feeding path P1 from the power supply device 700 to the semiconductor component 151 is formed. The power supply path P1 includes a power supply path P1V and a ground path P1G. Power path P1V includes power line 110V, junction 161V, and power line 120V. Ground path P1G includes ground line 110G, junction 161G, and ground line 120G.

Also, a power feeding path P2 from the power supply device 700 to the semiconductor component 152 is formed. The feed path P2 includes a power path P2V and a ground path P2G. Power path P2V includes power line 110V, junction 162V, and power line 130V. Ground path P2G includes ground line 110G, junction 162G, and ground line 130G.

Here, when the semiconductor component 151 operates, current flows through the semiconductor component 151 through the power supply path P1V. Also, a return current flows through the ground path P1G. In the first embodiment, the image processing module 1000 includes a capacitor, which is an example of a first capacitive element, in order to suppress potential fluctuation of the power supply path P1 due to the operation of the semiconductor component 151, that is, potential fluctuation of the power supply terminal 153V and the ground terminal 153G. 171. Capacitor 171 is a chip capacitor. The capacitor 171 has an electrode 1711 that is an example of a first electrode and an electrode 1712 that is an example of a second electrode.

The electrode 1711 is joined to the power supply line 120V with a conductive member, and the electrode 1712 is joined to the ground line 120G with a conductive member. Thereby, the electrode 1711 is electrically connected to the power supply line 120V, and the electrode 1712 is electrically connected to the ground line 120G.

When the semiconductor component 151 operates, the electric charge charged in the capacitor 171 is supplied to the power supply line 120V, thereby suppressing the potential fluctuation of the power supply path P1, that is, the potential fluctuation of the power supply terminal 153V and the ground terminal 153G. Further, when the semiconductor component 151 is not operating, the capacitor 171 is charged through the power supply path P1.

The capacitor 171 is preferably arranged near the power supply terminal 153V and the ground terminal 153G in order to effectively suppress the potential fluctuation of the power supply path P1, that is, the potential fluctuation of the power supply terminal 153V and the ground terminal 153G. Therefore, in the first embodiment, capacitor 171 is arranged between printed wiring board 101 and printed wiring board 102 . Thereby, the path from the semiconductor component 151 to the capacitor 171 can be shortened, and the potential fluctuation of the power supply path P1, that is, the potential fluctuation of the power supply terminal 153V and the ground terminal 153G can be effectively suppressed.

Further, in order to effectively suppress the potential fluctuation of the power supply path P1 due to the operation of the semiconductor component 151, that is, the potential fluctuation of the power supply terminal 153V and the ground terminal 153G, the capacitor 171 is positioned so as to overlap the semiconductor component 151 when viewed in the Z direction. are placed in Thereby, the path from the semiconductor component 151 to the capacitor 171 can be shortened, and the potential fluctuation of the power supply path P1, that is, the potential fluctuation of the power supply terminal 153V and the ground terminal 153G can be effectively suppressed.

Here, as the processing speed of the semiconductor component 151 is increased, noise is observed when the capacitor 171 is charged or discharged. When this noise propagates to the power supply line 110V, it propagates to the power supply terminal 154V of the semiconductor component 152 via the power supply line 130V. Of the noise observed at the capacitor 171 due to the operation of the semiconductor component 151, the noise that propagates to the other semiconductor component 152 is called interference noise.

In the first embodiment, the electrode 1711 is joined to the power line 120V with a conductive member, but is not joined to the power line 110V. Also, the electrode 1712 is joined to both the ground lines 110G and 120G with a conductive member. As a result, the interference noise observed at the electrode 1711 of the capacitor 171 does not propagate directly to the power line 110V, but propagates to the power line 110V via the power line 120V. Therefore, the path from the electrode 1711 of the capacitor 171 to the power supply terminal 154V of the semiconductor component 152 becomes long, and the impedance of the path reduces the interference noise.

FIG. 3A is an enlarged view of the vicinity of the capacitor 171 in the image processing module 1000 according to the first embodiment.

The power line 110V has a power pad 111V. The power pad 111V is an example of a first power pad. A power supply pad 111V is included in the plurality of pads 104 . The power line 120V has power pads 121V and 122V. The power pad 121V is an example of a second power pad. The power pad 122V is an example of a third power pad. Power pads 121V and 122V are included in the plurality of pads 105 .

The power pad 111V and the power pad 121V are joined to each other at the junction 161V. The joint 161V is an example of a first joint. The power supply pad 122V and the electrode 1711 of the capacitor 171 are joined together at a conductive joint S1, which is an example of a second joint. The joint S1 is made of a conductive material such as solder.

The ground line 110G has ground pads 111G and 112G. Ground pad 111G is an example of a first ground pad. Ground pad 112G is an example of a second ground pad. Ground pads 111G and 112G are included in the plurality of pads 104. FIG. The ground line 120G has ground pads 121G and 122G. Ground pad 121G is an example of a third ground pad. Ground pad 122G is an example of a fourth ground pad. Ground pads 121 G and 122 G are included in the plurality of pads 105 .

Ground pad 111G and ground pad 121G are joined together at joint 161G. The joint portion 161G is an example of a third joint portion. The ground pad 112G and the electrode 1712 of the capacitor 171 are joined together at a conductive joint S3, which is an example of a fourth joint. The ground pad 122G and the electrode 1712 of the capacitor 171 are joined together at a conductive joint S4, which is an example of a fifth joint. The joints S3 and S4 are made of a conductive material such as solder.

With the above configuration, the interference noise observed by the capacitor 171 propagates along the path PN indicated by the dashed arrow in FIG. Path PN includes power pad 122V, power via 128V ₁ , power pattern 127V, power via 128V ₂ , power pad 121V, and junction 161V. Each power supply via 128V ₁ , 128V ₂ is one of a plurality of power supply vias 128 . The power via _128V1 is in contact with the power pad 122V and the power pattern 127V, and the power via _128V2 is in contact with the power pad 121V and the power pattern 127V. Also, the path PN includes a power pad 111V of the power line 110V, a power via 118V ₁ , a power pattern 117V, and the like. Power via _118V1 is one of a plurality of power vias 118V. The power via _118V1 contacts the power pad 111V and the power pattern 117V. As described above, the interference noise observed at the capacitor 171 passes through the power supply line 120V of the printed wiring board 102 and propagates to the semiconductor component 152 through the power supply lines 110V and 130V. As a result, the path PN becomes longer than the path through which the interference noise observed at the capacitor 171 directly propagates to the power supply line 110V because the interference noise bypasses the power supply line 120V. Therefore, the interference noise propagating from the capacitor 171 to the semiconductor component 152 is reduced by the impedance of the path PN including the detoured path.

Also, in the first embodiment, an inductor such as a ferrite bead can be omitted as a noise filter. By omitting the inductor, it is possible to suppress an increase in the wiring area, and it is possible to realize miniaturization and high-density mounting of the image processing module 1000 . Furthermore, it is possible to reduce costs by reducing the number of parts.

Further, the ground line 110G of the printed wiring board 101 and the ground line 120G of the printed wiring board 102 are preferably connected in parallel not at one point but at a plurality of points in order to reduce the impedance of the ground path P1G. preferable. In the first embodiment, ground pads 112G and 122G to which electrodes 1712 of capacitors 171 are joined at joints S3 and S4 are used to connect ground lines 110G and 120G in parallel. As a result, it is possible to reduce the size of the printed wiring board 102 and increase the density of the signal lines while securing the number of ground pads for each of the ground lines 110G and 120G necessary for connecting the ground lines 110G and 120G in parallel. be able to.

Further, in the first embodiment, the power supply line 120V and the power supply line 130V on the printed wiring board 102 are non-contact, that is, independent. The power line 120 V and the power line 130 V are electrically connected via the power line 110 V of the printed wiring board 101 . Also, the ground line 120G and the ground line 130G on the printed wiring board 102 are non-contact, that is, independent. Ground line 120 G and ground line 130 G are electrically connected via ground line 110 G of printed wiring board 101 .

That is, the power terminal 153V of the semiconductor component 151 is electrically connected to the power terminal 154V of the semiconductor component 152 via the power line 120V, the power line 110V, and the power line 130V. Also, the ground terminal 153G of the semiconductor component 151 is electrically connected to the ground terminal 154G of the semiconductor component 152 via the ground line 120G, the ground line 110G, and the ground line 130G. In this way, on the printed wiring board 102, the power supply line 120V and the power supply line 130V are electrically connected by bypassing the power supply line 110V. length becomes longer. In addition, since the ground line 120G and the ground line 130G in the printed wiring board 102 are electrically connected by detouring the ground line 110G, the path length between the ground terminals 153G and 154G is longer than in the case of direct connection. become longer. Interference noise can be reduced by these configurations.

Further, in the first embodiment, when the semiconductor component 152 shown in FIG. 2 operates, current flows through the semiconductor component 152 through the power supply path P2V. A return current flows through the ground path P2G. The image processing module 1000 includes a capacitor 172, which is an example of a second capacitive element, in order to suppress potential fluctuation of the power supply path P2 due to the operation of the semiconductor component 152, that is, potential fluctuation of the power supply terminal 154V and the ground terminal 154G. Capacitor 172 is a chip capacitor. The capacitor 172 has an electrode 1721 that is an example of a third electrode and an electrode 1722 that is an example of a fourth electrode.

Electrode 1721 is joined to power supply line 130V with a conductive member, and electrode 1722 is joined to ground line 130G with a conductive member. Thereby, the electrode 1721 is electrically connected to the power supply line 130V, and the electrode 1722 is electrically connected to the ground line 130G.

When the semiconductor component 152 operates, the charge stored in the capacitor 172 is supplied to the power supply line 130V, thereby suppressing the potential fluctuation of the power supply path P2, that is, the potential fluctuation of the power supply terminal 154V and the ground terminal 154G. Further, when the semiconductor component 152 is not in operation, the capacitor 172 is charged through the power supply path P2.

Capacitor 172 is preferably arranged near power supply terminal 154V and ground terminal 154G in order to effectively suppress potential fluctuation of power supply path P2, that is, potential fluctuation of power supply terminal 154V and ground terminal 154G. Therefore, in the first embodiment, capacitor 172 is arranged between printed wiring board 101 and printed wiring board 102 . Thereby, the path from the semiconductor component 152 to the capacitor 172 can be shortened, and the potential fluctuation of the power supply path P2, that is, the potential fluctuation of the power supply terminal 154V and the ground terminal 154G can be effectively suppressed.

Further, in order to effectively suppress the potential fluctuation of the power supply path P2 due to the operation of the semiconductor component 152, that is, the potential fluctuation of the power supply terminal 154V and the ground terminal 154G, the capacitor 172 is located at a position overlapping the semiconductor component 152 when viewed in the Z direction. are placed in Thereby, the path from the semiconductor component 152 to the capacitor 172 can be shortened, and the potential fluctuation of the power supply path P2, that is, the potential fluctuation of the power supply terminal 154V and the ground terminal 154G can be effectively suppressed.

In the first embodiment, the electrode 1721 is joined to the power line 130V with a conductive member, but is not joined to the power line 110V. Also, the electrode 1722 is joined to both the ground lines 110G and 130G with a conductive member. As a result, the interference noise observed at the electrode 1721 of the capacitor 172 does not propagate directly to the power line 110V, but propagates to the power line 110V via the power line 130V. Therefore, the path from the electrode 1721 of the capacitor 172 to the power supply terminal 153V of the semiconductor component 151 becomes long, and the impedance of the path reduces the interference noise.

FIG. 3B is an enlarged view of the vicinity of the capacitor 172 in the image processing module 1000 according to the first embodiment.

The power line 110V has a power pad 113V. A power supply pad 113V is included in the plurality of pads 104 . The power line 130V has power pads 131V and 132V. Power supply pads 131 V and 132 V are included in the plurality of pads 105 .

Power supply pad 113V and power supply pad 131V are joined together at joint 162V. The power supply pad 132V and the electrode 1721 of the capacitor 172 are joined together at a conductive joint S5. The joint S5 is made of a conductive material such as solder.

Ground line 110G has ground pads 113G and 114G. Ground pads 113G and 114G are included in the plurality of pads 104. FIG. The ground line 130G has ground pads 131G and 132G. Ground pads 131 G and 132 G are included in the plurality of pads 105 .

Ground pad 113G and ground pad 131G are joined together at joint 162G. Ground pad 114G and electrode 1722 of capacitor 172 are bonded together at conductive junction S7. Ground pad 132G and electrode 1722 of capacitor 172 are bonded together at conductive junction S8. The joints S7 and S8 are made of a conductive member such as solder.

With the above configuration, interference noise observed at capacitor 172 passes through power supply line 130V of printed wiring board 102 and propagates to semiconductor component 151 through power supply lines 110V and 120V. Therefore, interference noise propagating from the capacitor 172 to the semiconductor component 151 is reduced.

Further, in order to reduce the impedance of the ground path P2G, the ground line 110G of the printed wiring board 101 and the ground line 130G of the printed wiring board 102 should be connected in parallel not only at one point but at a plurality of points. preferable. In the first embodiment, ground pads 114G and 132G to which electrodes 1722 of capacitors 172 are joined at joints S7 and S8 are used to connect ground lines 110G and 130G in parallel. As a result, it is possible to reduce the size of the printed wiring board 102 and increase the density of the signal lines while securing the number of ground pads for each of the ground lines 110G and 130G necessary for connecting the ground lines 110G and 130G in parallel. be able to.

The image processing module 1000 also includes a capacitor 173 that is an example of a third capacitive element arranged on the printed wiring board 101 . Capacitor 173 is a chip capacitor. Also, capacitor 173 is larger in size than capacitor 171 . The capacitor 173 has an electrode 1731 that is an example of a fifth electrode and an electrode 1732 that is an example of a sixth electrode. Capacitor 173 is arranged on main surface 1012 opposite main surface 1011 of insulating substrate 11 . Note that an insulating layer (not shown) such as a solder resist layer may be formed on the main surface 1012 . Electrode 1731 of capacitor 173 is connected to pad 115V of power supply line 110V, and electrode 1732 of capacitor 173 is connected to pad 115G of ground line 110G. Thereby, potential fluctuations of the power supply line 110V and the ground line 110G due to the operation of the semiconductor component 151, that is, potential fluctuations of the power supply terminal 153V and the ground terminal 153G of the semiconductor part 151 can be reduced.

Also, the capacitor 173 is arranged at a position overlapping the semiconductor component 151 when viewed in the Z direction. As a result, the path from the semiconductor component 151 to the capacitor 173 can be shortened, and the potential fluctuation of the power supply path P1, that is, the potential fluctuation of the power supply terminal 153V and the ground terminal 153G of the semiconductor component 151 can be effectively suppressed. can be done.

In the first embodiment, capacitance C3 of capacitor 173 is greater than capacitance C1 of capacitor 171 . A plurality of charge supply sources such as the power supply device 700, the capacitors 171 and 173, the on-die capacitor included in the semiconductor component 151, and the on-die capacitor included in the semiconductor component 152 are present in the power supply path P1 of the semiconductor component 151. These multiple charge supply sources are branched and connected to the power supply path P1. Noise is observed in the capacitor 171 when the semiconductor component 151 operates at a predetermined frequency. The noise observed in the capacitor 171 is more likely to be propagated to the path when the impedance of the path leading to each charge supply source connected to the power supply path P1 by the branch path is relatively low. The higher the impedance of the path from the capacitor 171 to the on-die capacitor included in the semiconductor component 152 relative to the impedance of the paths from the capacitor 171 to each of the other charge supply sources, the more the load from the capacitor 171 to the semiconductor component 152 increases. Propagating noise is reduced. Since the capacitor 173 is mounted on the printed wiring board 101 , the path from the capacitor 171 to the capacitor 173 has relatively lower impedance than the path from the capacitor 171 to the on-die capacitor included in the semiconductor component 152 . In other words, noise observed at capacitor 171 during operation of semiconductor component 151 propagates more easily to capacitor 173 than to semiconductor component 152 . Therefore, interference noise propagating from the capacitor 171 to the semiconductor component 152 can be further suppressed.

The image processing module 1000 also includes a capacitor 174 that is an example of a fourth capacitive element arranged on the printed wiring board 101 . Capacitor 174 is a chip capacitor. Capacitor 174 is also larger in size than capacitor 172 . The capacitor 174 has an electrode 1741 that is an example of a seventh electrode and an electrode 1742 that is an example of an eighth electrode. Capacitor 174 is arranged on main surface 1012 opposite main surface 1011 of insulating substrate 11 . Electrode 1741 of capacitor 174 is connected to pad 116V of power supply line 110V, and electrode 1742 of capacitor 174 is connected to pad 116G of ground line 110G. As a result, potential fluctuations of the power supply line 110V and the ground line 110G due to the operation of the semiconductor component 152, that is, potential fluctuations of the power supply terminal 154V and the ground terminal 154G of the semiconductor part 152 can be reduced.

In addition, the capacitor 174 is arranged at a position overlapping the semiconductor component 152 when viewed in the Z direction. As a result, the path from the semiconductor component 152 to the capacitor 174 can be shortened, and the potential fluctuation of the power supply path P2, that is, the potential fluctuation of the power supply terminal 154V and the ground terminal 154G of the semiconductor component 152 can be effectively suppressed. can be done.

In the first embodiment, capacitance C4 of capacitor 174 is greater than capacitance C2 of capacitor 172 . A plurality of charge supply sources such as the power supply device 700 , the capacitors 172 and 174 , the on-die capacitors included in the semiconductor component 151 and the on-die capacitors included in the semiconductor component 152 are present in the power supply path P<b>2 of the semiconductor component 152 . Since the capacitor 174 is mounted on the printed wiring board 101 , the path from the capacitor 172 to the capacitor 174 has relatively lower impedance than the path from the capacitor 172 to the on-die capacitor included in the semiconductor component 151 . In other words, noise observed at capacitor 172 during operation of semiconductor component 152 propagates more easily to capacitor 174 than to semiconductor component 151 . Thereby, interference noise propagating from the capacitor 172 to the semiconductor component 151 can be further suppressed.

Furthermore, in the first embodiment, as shown in FIG. 3A, the plurality of pads 104 includes dummy pads 112D arranged at positions facing the electrodes 1711 of the capacitor 171. As shown in FIG. The dummy pad 112D is not in contact with the power supply line 110V and the ground line 110G on the printed wiring board 101, that is, is independent. The electrode 1711 of the capacitor 171 and the dummy pad 112D are joined to each other at a conductive joint S2, which is an example of a sixth joint. The joint S2 is made of a conductive material such as solder. The dummy pad 112D is electrically connected to the power supply line 120V via the electrode 1711 and the joints S1 and S2.

When mounting printed wiring board 102 on printed wiring board 101 , the solder placed between printed wiring boards 101 and 102 is melted by heat treatment. At that time, printed wiring board 102 sinks into printed wiring board 101 . When the printed wiring board 102 sinks, the electrode 1711 of the capacitor 171 is brought into contact with the dummy pad 112D. Therefore, it is possible to prevent the capacitor 171 from losing its balance and tilting. As a result, it is possible to prevent an open failure from occurring between the electrode 1711 and the power supply pad 122V, and to mount the capacitor 171 between the printed wiring boards 101 and 102 stably. Although it is preferable that the dummy pad 112D exists, it can be omitted.

Furthermore, in the first embodiment, as shown in FIG. 3B, the plurality of pads 104 includes dummy pads 114D arranged at positions facing the electrodes 1721 of the capacitor 172. As shown in FIG. The dummy pad 114D is not in contact with the power supply line 110V and the ground line 110G on the printed wiring board 101, that is, is independent. The electrode 1721 of the capacitor 172 and the dummy pad 114D are joined together at a conductive joint S6. The joint S6 is made of a conductive material such as solder. The dummy pad 114D is electrically connected to the power supply line 130V via the electrode 1721 and the joints S5 and S6.

When printed wiring board 102 is mounted on printed wiring board 101, electrode 1721 of capacitor 172 is brought into contact with dummy pad 114D. Therefore, it is possible to prevent the capacitor 172 from losing its balance and tilting. As a result, it is possible to prevent an open defect from occurring between the electrode 1721 and the power supply pad 132V, and to mount the capacitor 172 between the printed wiring boards 101 and 102 stably. Although it is preferable that the dummy pad 114D exists, it can be omitted.

In the above description, the number of each of the capacitors 171 to 174 is one, but the number of capacitors 171 to 174 is not limited to this, and each of the capacitors 171 to 174 may be plural in number. Moreover, since the semiconductor component 151 is configured to perform image processing, it operates more frequently than the semiconductor component 152 . Therefore, among the capacitors 171 and 172, the capacitor 172 can be omitted as required. Capacitors 173 and 174 are also preferably present, although capacitors 173 and/or 174 may be omitted if desired.

[Second embodiment]
Next, an electronic module according to a second embodiment will be described. FIG. 4 is a schematic cross-sectional view of a main part of an image processing module 2000, which is an example of an electronic module according to the second embodiment. In the second embodiment, the image processing module 1000 is changed to an image processing module 2000 in the digital camera 600, which is an imaging device that is an example of electronic equipment, described in the first embodiment. In the second embodiment, the same reference numerals are used for the same configurations as in the first embodiment, and detailed descriptions thereof are omitted.

The image processing module 2000 includes a printed wiring board 201 that is an example of a first wiring board, and a semiconductor device 250 arranged on the printed wiring board 201 . A semiconductor device 250 has a printed wiring board 202 that is an example of a second wiring board and a printed wiring board 203 that is an example of a third wiring board. The semiconductor device 250 also includes a semiconductor component 151 that is an example of a first semiconductor component and a semiconductor component 152 that is an example of a second semiconductor component.

Each printed wiring board 201, 202, 203 is a rigid printed wiring board. The printed wiring board 202 is arranged on the printed wiring board 201 . The printed wiring board 203 is arranged on the printed wiring board 202 . Semiconductor component 151 is arranged on printed wiring board 202 , and semiconductor component 152 is arranged on printed wiring board 203 . Semiconductor component 151 is arranged between printed wiring board 202 and printed wiring board 203 . That is, the printed wiring board 202 is mounted on the printed wiring board 201 . Semiconductor component 151 and printed wiring board 203 are mounted on printed wiring board 202 . Semiconductor component 152 is mounted on printed wiring board 203 .

The printed wiring board 201 is, for example, a motherboard. The printed wiring board 201 has a flat insulating substrate 21 made of an insulating material, and a power supply line 210V and a ground line 210G held by the insulating substrate 21 . The insulating material of the insulating substrate 21 is, for example, glass epoxy resin. The power line 210V is an example of a first power line, and the ground line 210G is an example of a first ground line. In printed wiring board 201, power supply line 210V and ground line 210G are not in contact with each other, that is, they are independent of each other. These lines 210V, 210G are made of a conductive material, for example copper. In addition to these lines 210V and 210G, the printed wiring board 201 may have signal lines (not shown) serving as signal transmission paths.

The direction perpendicular to the main surface of the printed wiring board 201, that is, the main surface 2011 of the insulating substrate 21 is defined as the Z direction. The two directions that intersect (perpendicularly) the Z direction and intersect (perpendicularly) with each other are defined as the X direction and the Y direction.

A plurality of pads 204 are arranged in an array on the main surface 2011 of the insulating substrate 21 . The multiple pads 204 are spaced apart from each other in the X and Y directions. An insulating layer such as a solder resist layer (not shown) may be formed on the main surface 2011 .

The printed wiring board 202 is, for example, a package substrate, that is, an interposer. The printed wiring board 202 has a flat insulating substrate 22 made of an insulating material, and power lines 220V and 230V and ground lines 220G and 230G held by the insulating substrate 22 . The insulating material of the insulating substrate 22 is, for example, glass epoxy resin. The power line 220V is an example of a second power line. The power line 230V is an example of a third power line. Ground line 220G is an example of a second ground line. Ground line 230G is an example of a third ground line. In the printed wiring board 202, the power line 220V, the power line 230V, the ground line 220G and the ground line 230G are not in contact with each other, that is, they are independent of each other. These lines 220V, 220G, 230V, 230G are made of a conductive material, for example copper. In addition to these lines 220V, 220G, 230V, and 230G, the printed wiring board 202 may have signal lines (not shown) serving as signal transmission paths.

A main surface 2021 of the insulating substrate 22 faces the main surface 2011 with a gap therebetween. A plurality of pads 205 are arranged in an array on main surface 2021 . The multiple pads 205 are spaced apart from each other in the X and Y directions. In the second embodiment, the number of pads 205 is the same as the number of pads 204 and each pad 205 faces each pad 204 . Note that an insulating layer (not shown) such as a solder resist layer may be formed on the main surface 2021 .

A portion of the plurality of pads 204 and a portion of the plurality of pads 205 are joined together by conductive joints 260, respectively. In the second embodiment, each joint 260 is made of a conductive member. A conductive member forming each joint 260 is, for example, solder.

A semiconductor component 151 is arranged on a main surface 2022 opposite to the main surface 2021 of the insulating substrate 22 . The semiconductor component 151 has a plurality of terminals 153 arranged in an array at intervals in the X and Y directions. Each of the plurality of terminals 153 includes solder bumps and pads. Each of a plurality of terminals 153 of semiconductor component 151 is mechanically and electrically connected to a pad (not shown) on main surface 2022 . The multiple terminals 153 include a power terminal 153V, which is an example of a first power terminal, and a ground terminal 153G, which is an example of a first ground terminal.

A plurality of pads 206 are arranged in an array on the main surface 2022 of the insulating substrate 22 . A plurality of pads 206 are spaced apart from each other in the X and Y directions. Note that an insulating layer (not shown) such as a solder resist layer may be formed on the main surface 2022 .

The printed wiring board 203 is, for example, a package substrate, that is, an interposer. The printed wiring board 203 has a flat insulating substrate 23 made of an insulating material, and a power supply line 240V and a ground line 240G held by the insulating substrate 23 . The insulating material of the insulating substrate 23 is, for example, glass epoxy resin. The power line 240V is an example of a fourth power line. Ground line 240G is an example of a fourth ground line. In the printed wiring board 203, the power line 240V and the ground line 240G are not in contact with each other, that is, they are independent of each other. These lines 240V, 240G are made of a conductive material, for example copper. In addition to these lines 240V and 240G, the printed wiring board 203 may have signal lines (not shown) serving as signal transmission paths.

A main surface 2031 of the insulating substrate 23 faces the main surface 2022 with a gap therebetween. A plurality of pads 207 are arranged in an array on main surface 2031 . The multiple pads 207 are spaced apart from each other in the X and Y directions. In the second embodiment, the number of pads 207 is the same as the number of pads 206 and each pad 207 faces each pad 206 . An insulating layer (not shown) such as a solder resist layer may be formed on main surface 2031 .

A portion of the plurality of pads 206 and a portion of the plurality of pads 207 are joined together by conductive joints 270, respectively. In the second embodiment, each joint 270 is made of a conductive member. A conductive member forming each joint 270 is, for example, solder.

A semiconductor component 152 is arranged on a main surface 2032 opposite to the main surface 2031 of the insulating substrate 23 . The semiconductor component 152 has a plurality of terminals 154 arranged in an array at intervals in the X and Y directions. Each of the plurality of terminals 154 includes solder bumps and pads. Each of a plurality of terminals 154 of semiconductor component 152 is mechanically and electrically connected to a pad (not shown) on main surface 2032 . The multiple terminals 154 include a power terminal 154V, which is an example of a second power terminal, and a ground terminal 154G, which is an example of a second ground terminal. Note that an insulating layer (not shown) such as a solder resist layer may be formed on the main surface 2032 .

The semiconductor component 151 becomes operable when an operating voltage, that is, a DC voltage is applied between the power terminal 153V and the ground terminal 153G. The semiconductor component 152 becomes operable when an operating voltage, that is, a DC voltage is applied between the power terminal 154V and the ground terminal 154G. In the second embodiment, the rated voltage of the semiconductor component 151 required for operation of the semiconductor component 151 is the same as the rated voltage of the semiconductor component 152 required for operation of the semiconductor component 152 . Accordingly, operating voltages are applied to the semiconductor components 151 and 152 from the power supply device 700 shown in FIG. 1 via the common lines 210V and 210G.

A power terminal 153V of the semiconductor component 151 is electrically connected to the power line 220V by being joined to a pad of the power line 220V. A ground terminal 153G of the semiconductor component 151 is electrically connected to the ground line 220G by being joined to a pad of the ground line 220G. Also, the power terminal 154V of the semiconductor component 152 is electrically connected to the power line 240V by being joined to the pad of the power line 240V. A ground terminal 154G of the semiconductor component 152 is electrically connected to the ground line 240G by being joined to a pad of the ground line 240G.

The power line 210V and the ground line 210G are electrically connected to the power supply device 700 shown in FIG. The power line 210V is joined to the power line 220V at a joint 261V among the plurality of joints 260 . Ground line 210G is joined to ground line 220G at joint 261G among a plurality of joints 260 .

Also, the power line 210V is joined to the power line 230V at a joint portion 262V among the plurality of joint portions 260 . The ground line 210G is joined to the ground line 230G at a joint 262G of the plurality of joints 260. As shown in FIG. Furthermore, the power line 230V is joined to the power line 240V at a joint 272V among the plurality of joints 270 . The ground line 230G is joined to the ground line 240G at a joint 272G among the plurality of joints 270. As shown in FIG.

Therefore, the power terminal 153V of the semiconductor component 151 is electrically connected to the power line 210V through the power line 220V. Ground terminal 153G of semiconductor component 151 is electrically connected to ground line 210G via ground line 220G. A power terminal 154V of the semiconductor component 152 is electrically connected to the power line 210V through power lines 240V and 230V. Ground terminal 154G of semiconductor component 152 is electrically connected to ground line 210G via ground lines 240G and 230G.

A DC voltage, which is an operating voltage, is applied between the power supply line 210V and the ground line 210G by the power supply device 700 . Therefore, a DC voltage, which is an operating voltage, is applied between power supply terminal 153V and ground terminal 153G of semiconductor component 151 via power supply lines 210V, 220V and ground lines 210G, 220G. A DC voltage, which is an operating voltage, is applied between power supply terminal 154V and ground terminal 154G of semiconductor component 152 via power supply lines 210V, 230V, 240V and ground lines 210G, 230G, 240G.

The power line 210V has at least one power pattern 217V arranged on the conductor layer of the printed wiring board 201 and a plurality of power vias 218V extending in the Z direction. The power supply pattern 217V is a flat conductor pattern extending in the X direction and the Y direction. Each power via 218V is a via conductor. The ground line 210G has at least one ground pattern 217G arranged on the conductor layer of the printed wiring board 201 and a plurality of ground vias 218G extending in the Z direction. The ground pattern 217G is a flat conductor pattern extending in the X and Y directions. Each ground via 218G is a via conductor.

The power line 220V has at least one power pattern 227V arranged on the conductor layer of the printed wiring board 202 and a plurality of power vias 228V extending in the Z direction. The power supply pattern 227V is a flat conductor pattern extending in the X and Y directions. Each power via 228V is a via conductor. The ground line 220G has at least one ground pattern 227G arranged on the conductor layer of the printed wiring board 202 and a plurality of ground vias 228G extending in the Z direction. The ground pattern 227G is a flat conductor pattern extending in the X and Y directions. Each ground via 228G is a via conductor.

Power line 230V has at least one power via 238V extending in the Z direction. Power via 238V is a via conductor. Ground line 230G has a plurality of ground vias 238G extending in the Z direction. Each ground via 238G is a via conductor.

The power line 240V has at least one power pattern 247V arranged on the conductor layer of the printed wiring board 203 and a plurality of power vias 248V extending in the Z direction. The power supply pattern 247V is a flat conductor pattern extending in the X and Y directions. Each power via 248V is a via conductor. The ground line 240G has at least one ground pattern 247G arranged on the conductor layer of the printed wiring board 203 and a plurality of ground vias 248G extending in the Z direction. The ground pattern 247G is a flat conductor pattern extending in the X and Y directions. Each ground via 248G is a via conductor.

In the second embodiment, the image processing module 2000 includes a capacitor 171, which is an example of a first capacitive element, in order to suppress potential fluctuations of the power terminal 153V and the ground terminal 153G due to the operation of the semiconductor component 151. FIG. The capacitor 171 has an electrode 1711 that is an example of a first electrode and an electrode 1712 that is an example of a second electrode.

The electrode 1711 is joined to the power line 220V with a conductive member, and the electrode 1712 is joined to the ground line 220G with a conductive member. Thereby, the electrode 1711 is electrically connected to the power supply line 220V, and the electrode 1712 is electrically connected to the ground line 220G.

When the semiconductor component 151 operates, electric charges charged in the capacitor 171 are supplied to the power supply line 220V, thereby suppressing potential fluctuations of the power supply terminal 153V and the ground terminal 153G. Also, when the semiconductor component 151 is not operating, the capacitor 171 is charged through the power supply path.

The capacitor 171 is preferably arranged near the power terminal 153V and the ground terminal 153G in order to effectively suppress potential fluctuations of the power terminal 153V and the ground terminal 153G. Therefore, in the second embodiment, capacitor 171 is arranged between printed wiring board 201 and printed wiring board 202 . As a result, the path from the semiconductor component 151 to the capacitor 171 can be shortened, and potential fluctuations at the power supply terminal 153V and the ground terminal 153G can be effectively suppressed.

In order to effectively suppress potential fluctuations of the power supply terminal 153V and the ground terminal 153G due to the operation of the semiconductor component 151, the capacitor 171 is arranged at a position overlapping the semiconductor component 151 when viewed in the Z direction. As a result, the path from the semiconductor component 151 to the capacitor 171 can be shortened, and potential fluctuations at the power supply terminal 153V and the ground terminal 153G can be effectively suppressed.

Here, as the processing speed of the semiconductor component 151 is increased, interference noise is observed when the capacitor 171 is charged or discharged.

In the second embodiment, the electrode 1711 is joined to the power line 220V with a conductive member, but is not joined to the power line 210V. Also, the electrode 1712 is joined to both the ground lines 210G and 220G with a conductive member. As a result, the interference noise observed at the electrode 1711 of the capacitor 171 does not propagate directly to the power line 210V, but propagates to the power line 210V via the power line 220V. Therefore, the path from the electrode 1711 of the capacitor 171 to the power supply terminal 154V of the semiconductor component 152 becomes long, and the impedance of the path reduces the interference noise.

FIG. 5A is an enlarged view of the vicinity of the capacitor 171 in the image processing module 2000 according to the second embodiment.

The power line 210V has a power pad 211V. The power pad 211V is an example of a first power pad. A power supply pad 211V is included in the plurality of pads 204 . The power line 220V has power pads 221V and 222V. The power pad 221V is an example of a second power pad. The power pad 222V is an example of a third power pad. Power supply pads 221 V and 222 V are included in the plurality of pads 205 .

The power pad 211V and the power pad 221V are joined to each other at the junction 261V. The joint 261V is an example of a first joint. The power supply pad 222V and the electrode 1711 of the capacitor 171 are joined together at a conductive joint S21, which is an example of a second joint. The joint S21 is made of a conductive member such as solder.

The ground line 210G has ground pads 211G and 212G. Ground pad 211G is an example of a first ground pad. Ground pad 212G is an example of a second ground pad. Ground pads 211 G and 212 G are included in the plurality of pads 204 . The ground line 220G has ground pads 221G and 222G. Ground pad 221G is an example of a third ground pad. Ground pad 222G is an example of a fourth ground pad. Ground pads 221 G and 222 G are included in the plurality of pads 205 .

Ground pad 211G and ground pad 221G are joined together at joint 261G. The joint 261G is an example of a third joint. The ground pad 212G and the electrode 1712 of the capacitor 171 are joined together at a conductive joint S23, which is an example of a fourth joint. The ground pad 222G and the electrode 1712 of the capacitor 171 are joined together at a conductive joint S24, which is an example of a fifth joint. The joints S23 and S24 are made of a conductive material such as solder.

With the above configuration, the interference noise observed at the capacitor 171 passes through the power line 220V of the printed wiring board 202 and propagates to the semiconductor component 152 through the power lines 210V, 230V and 240V. As a result, the path from the electrode 1711 of the capacitor 171 to the power supply terminal 154V of the semiconductor component 152 passes through the power supply line 220V of the printed wiring board 202, so it is longer than the case where the power supply line 220V is not passed. Therefore, interference noise propagating from the capacitor 171 to the semiconductor component 152 is reduced. In addition, the path from the electrode 1711 of the capacitor 171 to the power terminal 154V of the semiconductor component 152 passes through the power line 230V of the printed wiring board 202, making it longer than in the first embodiment. Therefore, interference noise propagating from the capacitor 171 to the semiconductor component 152 is effectively reduced.

Also, in the second embodiment, an inductor such as a ferrite bead can be omitted as a noise filter. By omitting the inductor, it is possible to suppress the expansion of the wiring area, and it is possible to realize the miniaturization and high-density mounting of the image processing module 2000 . Furthermore, it is possible to reduce costs by reducing the number of parts.

In the second embodiment, the ground pads 212G and 222G to which the electrodes 1712 of the capacitor 171 are joined at the junctions S23 and S24 are used to connect the ground lines 210G and 220G in parallel. As a result, it is possible to reduce the size of the printed wiring board 202 and increase the density of the signal lines while securing the number of ground pads for each of the ground lines 210G and 220G necessary for connecting the ground lines 210G and 220G in parallel. be able to.

In the second embodiment, the power line 220V and the power line 230V on the printed wiring board 202 are non-contact, that is, independent. The power line 220 V and the power line 240 V are electrically connected through the power line 210 V of the printed wiring board 201 and the power line 230 V of the printed wiring board 202 . Also, on the printed wiring board 202, the ground line 220G and the ground line 230G are non-contact, that is, independent. The ground line 220G and the ground line 240G are electrically connected via the ground line 210G of the printed wiring board 201 and the ground line 230G of the printed wiring board 202, respectively.

That is, the power terminal 153V of the semiconductor component 151 is electrically connected to the power terminal 154V of the semiconductor component 152 via the power line 220V, the power line 210V, the power line 230V, and the power line 240V. Ground terminal 153G of semiconductor component 151 is electrically connected to ground terminal 154G of semiconductor component 152 via ground line 220G, ground line 210G, ground line 230G, and ground line 240G. Thus, the power supply line 220V and the power supply line 240V are electrically connected while bypassing the power supply lines 210V and 230V. Become. In addition, since ground line 220G and ground line 240G in printed wiring board 202 are electrically connected by bypassing ground lines 210G and 230G, the path length between ground terminals 153G and 154G is reduced compared to the case of direct connection. becomes longer. Interference noise can be reduced by these configurations.

Further, in the second embodiment, the image processing module 2000 includes a capacitor 172, which is an example of a second capacitive element, in order to suppress potential fluctuations of the power terminal 154V and the ground terminal 154G. The capacitor 172 has an electrode 1721 that is an example of a third electrode and an electrode 1722 that is an example of a fourth electrode.

The electrode 1721 is joined to the power supply line 240V with a conductive member, and the electrode 1722 is joined to the ground line 240G with a conductive member. Thereby, the electrode 1721 is electrically connected to the power supply line 240V, and the electrode 1722 is electrically connected to the ground line 240G.

When the semiconductor component 152 operates, electric charges charged in the capacitor 172 are supplied to the power supply line 240V, thereby suppressing potential fluctuations of the power supply terminal 154V and the ground terminal 154G. Also, when the semiconductor component 152 is not in operation, the capacitor 172 is charged through the power supply path.

Capacitor 172 is preferably arranged near power supply terminal 154V and ground terminal 154G in order to effectively suppress potential fluctuations of power supply terminal 154V and ground terminal 154G. Therefore, in the second embodiment, capacitor 172 is arranged between printed wiring board 202 and printed wiring board 203 . As a result, the path from the semiconductor component 152 to the capacitor 172 can be shortened, and potential fluctuations at the power supply terminal 154V and the ground terminal 154G can be effectively suppressed.

As shown in FIG. 4 , the capacitor 172 is arranged at a position not overlapping the semiconductor component 152 when viewed in the Z direction, but may be arranged at a position overlapping the semiconductor component 152 .

In the second embodiment, the electrode 1721 is joined to the power line 240V with a conductive member, but is not joined to the power line 230V. Also, the electrode 1722 is joined to both the ground lines 230G and 240G with a conductive member. As a result, the interference noise observed at the electrode 1721 of the capacitor 172 does not propagate directly to the power line 230V, but propagates to the power line 230V via the power line 240V. Therefore, the path from the electrode 1721 of the capacitor 172 to the power supply terminal 153V of the semiconductor component 151 becomes long, and the impedance of the path reduces the interference noise.

FIG. 5B is an enlarged view of the vicinity of the capacitor 172 in the image processing module 2000 according to the second embodiment.

The power line 230V has a power pad 233V. A power supply pad 233 V is included in the plurality of pads 206 . The power line 240V has power pads 241V and 242V. Power supply pads 241 V and 242 V are included in the plurality of pads 207 .

Power supply pad 233V and power supply pad 241V are joined together at junction 272V. The power supply pad 242V and the electrode 1721 of the capacitor 172 are joined together at a conductive joint S25. The joint S25 is made of a conductive material such as solder.

The ground line 230G has ground pads 233G and 234G. Ground pads 233 G and 234 G are included in the plurality of pads 206 . The ground line 240G has ground pads 241G and 242G. Ground pads 241 G and 242 G are included in the plurality of pads 207 .

Ground pad 233G and ground pad 241G are joined together at joint 272G. Ground pad 234G and electrode 1722 of capacitor 172 are bonded together at conductive junction S27. Ground pad 242G and electrode 1722 of capacitor 172 are bonded together at conductive junction S28. The joints S27 and S28 are made of a conductive material such as solder.

With the above configuration, the interference noise observed at the capacitor 172 passes through the power supply line 240V of the printed wiring board 203 and propagates to the semiconductor component 151 through the power supply lines 230V, 210V and 220V. Therefore, interference noise propagating from the capacitor 172 to the semiconductor component 151 is reduced.

In the second embodiment, the ground pads 234G and 242G to which the electrodes 1722 of the capacitor 172 are joined at the joints S27 and S28 are used to connect the ground lines 230G and 240G in parallel. As a result, it is possible to reduce the size of the printed wiring board 202 and increase the density of the signal lines while securing the number of ground pads for each of the ground lines 230G and 240G necessary for connecting the ground lines 230G and 240G in parallel. be able to.

The image processing module 2000 also includes a capacitor 173 that is an example of a third capacitive element arranged on the printed wiring board 201 . The capacitor 173 has an electrode 1731 that is an example of a fifth electrode and an electrode 1732 that is an example of a sixth electrode. Capacitor 173 is arranged on main surface 2012 opposite main surface 2011 of insulating substrate 21 . Note that an insulating layer (not shown) such as a solder resist layer may be formed on the main surface 2012 . Electrode 1731 of capacitor 173 is connected to pad 215V of power supply line 210V, and electrode 1732 of capacitor 173 is connected to pad 215G of ground line 210G. As a result, potential fluctuations of the power supply line 210V and the ground line 210G due to the operation of the semiconductor component 151, that is, potential fluctuations of the power supply terminal 153V and the ground terminal 153G of the semiconductor part 151 can be reduced.

Also, the capacitor 173 is arranged at a position overlapping the semiconductor component 151 when viewed in the Z direction. As a result, the path from the semiconductor component 151 to the capacitor 173 can be shortened, and potential fluctuations at the power terminal 153V and the ground terminal 153G of the semiconductor component 151 can be effectively suppressed.

In the second embodiment, the capacitance C3 of capacitor 173 is greater than the capacitance C1 of capacitor 171 . Since the capacitor 173 is mounted on the printed wiring board 201 , the path from the capacitor 171 to the capacitor 173 has relatively lower impedance than the path from the capacitor 171 to the on-die capacitor included in the semiconductor component 152 . In other words, noise observed at capacitor 171 propagates more easily to capacitor 173 than to semiconductor component 152 . Thereby, interference noise propagating from the capacitor 171 to the semiconductor component 152 can be further suppressed.

The image processing module 2000 also includes a capacitor 174 that is an example of a fourth capacitive element arranged on the printed wiring board 201 . The capacitor 174 has an electrode 1741 that is an example of a seventh electrode and an electrode 1742 that is an example of an eighth electrode. Capacitor 174 is arranged on main surface 2012 opposite main surface 2011 of insulating substrate 21 . Electrode 1741 of capacitor 174 is joined to pad 216V of power supply line 210V, and electrode 1742 of capacitor 174 is joined to pad 216G of ground line 210G. As a result, potential fluctuations of the power supply line 210V and the ground line 210G due to the operation of the semiconductor component 152, that is, potential fluctuations of the power supply terminal 154V and the ground terminal 154G of the semiconductor part 152 can be reduced.

Note that the capacitor 174 may be arranged at a position overlapping the semiconductor component 152 when viewed in the Z direction.

In the second embodiment, capacitance C4 of capacitor 174 is greater than capacitance C2 of capacitor 172 . Since the capacitor 174 is mounted on the printed wiring board 201, the path from the capacitor 172 to the capacitor 174 has relatively lower impedance than the path from the capacitor 172 to the on-die capacitor included in the semiconductor component 151. Become. In other words, the noise observed at capacitor 172 propagates more easily to capacitor 174 than to semiconductor component 151 . Thereby, interference noise propagating from the capacitor 172 to the semiconductor component 151 can be further suppressed.

Furthermore, in the second embodiment, as shown in FIG. 5A, the plurality of pads 204 includes dummy pads 212D arranged at positions facing the electrodes 1711 of the capacitor 171. As shown in FIG. The dummy pad 212D is not in contact with the power supply line 210V and the ground line 210G on the printed wiring board 201, that is, is independent. The electrode 1711 of the capacitor 171 and the dummy pad 212D are joined together at a conductive joint S22, which is an example of a sixth joint. The joint S22 is made of a conductive member such as solder. The dummy pad 212D is electrically connected to the power supply line 220V via the electrode 1711 and the joints S21 and S22.

Since electrode 1711 of capacitor 171 is joined to dummy pad 212D, when printed wiring board 202 is mounted on printed wiring board 201, it is possible to prevent capacitor 171 from being unbalanced and inclined. As a result, it is possible to prevent an open defect from occurring between the electrode 1711 and the power supply pad 222V, and to stably mount the capacitor 171 between the printed wiring boards 201 and 202. FIG. Although it is preferable that the dummy pad 212D exists, it can be omitted.

Furthermore, in the second embodiment, as shown in FIG. 5B, the plurality of pads 206 includes dummy pads 234D arranged at positions facing the electrodes 1721 of the capacitor 172. As shown in FIG. The dummy pads 234D are not in contact with the power lines 220V, 230V and the ground lines 220G, 230G on the printed wiring board 202, that is, they are independent. The electrode 1721 of the capacitor 172 and the dummy pad 234D are joined together at a conductive joint S26. The joint S26 is made of a conductive member such as solder. The dummy pad 234D is electrically connected to the power supply line 240V through the electrode 1721 and the joints S25 and S26.

Since electrode 1712 of capacitor 172 is joined to dummy pad 234D, when printed wiring board 203 is mounted on printed wiring board 202, it is possible to prevent capacitor 172 from losing its balance and tilting. As a result, it is possible to prevent an open failure from occurring between the electrode 1721 and the power supply pad 242V, and to stably mount the capacitor 172 between the printed wiring boards 202 and 203. FIG. Although it is preferable that the dummy pad 234D exists, it can be omitted.

In addition, in the second embodiment, the semiconductor component 152 is arranged so as to overlap the semiconductor component 151 when viewed in the Z direction. As a result, in the printed wiring boards 202 and 203, the wiring area of the power supply lines 230V and 240V and the signal lines (not shown), which are power supply paths to the semiconductor component 152, can be reduced. Therefore, the printed wiring board 202 and the printed wiring board 203 can be miniaturized. Also, the wiring area of the power supply line 210V on the printed wiring board 201 can be reduced.

In the above description, the number of each of the capacitors 171 to 174 is one, but the number of capacitors 171 to 174 is not limited to this, and each of the capacitors 171 to 174 may be plural in number. Moreover, since the semiconductor component 151 is configured to perform image processing, it operates more frequently than the semiconductor component 152 . Therefore, among the capacitors 171 and 172, the capacitor 172 can be omitted as required. Capacitors 173 and 174 are also preferably present, although capacitors 173 and/or 174 may be omitted if desired. Moreover, although the case where the capacitor 172 is disposed between the printed wiring board 202 and the printed wiring board 203 has been described, the present invention is not limited to this. For example, capacitor 172 may be placed between printed wiring board 201 and printed wiring board 202 .

[Third Embodiment]
Next, an electronic module according to a third embodiment will be described. FIG. 6 is a schematic cross-sectional view of a main part of an image processing module 3000, which is an example of an electronic module according to the third embodiment. In the third embodiment, the image processing module 1000 is changed to an image processing module 3000 in the digital camera 600, which is an imaging device that is an example of electronic equipment, described in the first embodiment. In the third embodiment, the same reference numerals are used for the same configurations as in the first embodiment, and detailed description thereof is omitted.

The image processing module 3000 includes a printed wiring board 301 that is an example of a first wiring board, and a semiconductor device 350 arranged on the printed wiring board 301 . A semiconductor device 350 includes a semiconductor component 151 that is an example of a first semiconductor component and a semiconductor component 152 that is an example of a second semiconductor component.

In the first embodiment described above, the case where the semiconductor components 151 and 152 are both mounted on the same printed wiring board 102 has been described. In the third embodiment, semiconductor components 151 and 152 are mounted on separate printed wiring boards.

Specifically, the semiconductor device 350 has a printed wiring board 302 as an example of a second wiring board and a printed wiring board 303 as an example of a third wiring board. Each printed wiring board 301, 302, 303 is a rigid printed wiring board. Printed wiring boards 302 and 303 are arranged on printed wiring board 301 . Semiconductor component 151 is arranged on printed wiring board 302 , and semiconductor component 152 is arranged on printed wiring board 303 . That is, printed wiring boards 302 and 303 are mounted on printed wiring board 301 . Semiconductor component 151 is mounted on printed wiring board 302 , and semiconductor component 152 is mounted on printed wiring board 303 .

The printed wiring board 301 is, for example, a motherboard. The printed wiring board 301 has an insulating substrate 11 and a power supply line 110V and a ground line 110G held by the insulating substrate 11 . The power line 110V is an example of a first power line, and the ground line 110G is an example of a first ground line.

A plurality of pads 304 and a plurality of pads 306 are arranged in an array on the main surface 1011 of the insulating substrate 11 . The multiple pads 304 are spaced apart from each other in the X and Y directions. The multiple pads 306 are spaced apart from each other in the X and Y directions. An insulating layer such as a solder resist layer (not shown) may be formed on the main surface 1011 .

The printed wiring board 302 is, for example, a package substrate, that is, an interposer. The printed wiring board 302 has a flat insulating substrate 32 made of an insulating material, and a power supply line 120V and a ground line 120G held by the insulating substrate 32 . The insulating material of the insulating substrate 32 is, for example, glass epoxy resin. The power line 120V is an example of a second power line. Ground line 120G is an example of a second ground line.

A main surface 3021 of the insulating substrate 32 faces the main surface 1011 with a gap therebetween. A plurality of pads 305 are arranged in an array on the main surface 3021 . The multiple pads 305 are spaced apart from each other in the X and Y directions. In the third embodiment, the number of pads 305 is the same as the number of pads 304 and each pad 305 faces each pad 304 . Note that an insulating layer (not shown) such as a solder resist layer may be formed on the main surface 3021 .

A portion of the plurality of pads 304 and a portion of the plurality of pads 305 are joined together by conductive joints 360, respectively. In the third embodiment, each joint 360 is made of a conductive member. A conductive member forming each joint 360 is, for example, solder.

A semiconductor component 151 is arranged on a main surface 3022 opposite to the main surface 3021 of the insulating substrate 32 . A semiconductor component 151 has a plurality of terminals 153 . Each of a plurality of terminals 153 of semiconductor component 151 is mechanically and electrically connected to a pad (not shown) on main surface 3022 . An insulating layer (not shown) such as a solder resist layer may be formed on the principal surface 3022 .

The plurality of terminals 153 includes power terminals 153V and ground terminals 153G. The power terminal 153V is an example of a first power terminal, and the ground terminal 153G is an example of a first ground terminal.

The printed wiring board 303 is, for example, a package substrate, that is, an interposer. The printed wiring board 303 has a flat insulating substrate 33 made of an insulating material, and a power supply line 130V and a ground line 130G held by the insulating substrate 33 . The insulating material of the insulating substrate 33 is, for example, glass epoxy resin. The power line 130V is an example of a third power line. Ground line 130G is an example of a third ground line.

A main surface 3031 of the insulating substrate 33 faces the main surface 1011 with a gap therebetween. A plurality of pads 307 are arranged in an array on the main surface 3031 . The multiple pads 307 are spaced apart from each other in the X and Y directions. In the third embodiment, the number of pads 307 is the same as the number of pads 306 and each pad 307 faces each pad 306 . Note that an insulating layer (not shown) such as a solder resist layer may be formed on the main surface 3031 .

A portion of the plurality of pads 306 and a portion of the plurality of pads 307 are joined together by conductive joints 370, respectively. In the third embodiment, each joint 370 is made of a conductive member. A conductive member forming each joint 370 is, for example, solder.

A semiconductor component 152 is arranged on a main surface 3032 opposite to the main surface 3031 of the insulating substrate 33 . A semiconductor component 152 has a plurality of terminals 154 . Each of a plurality of terminals 154 of semiconductor component 152 is mechanically and electrically connected to a pad (not shown) on main surface 3032 . Note that an insulating layer (not shown) such as a solder resist layer may be formed on the main surface 3032 .

The plurality of terminals 154 includes power terminals 154V and ground terminals 154G. The power terminal 154V is an example of a second power terminal, and the ground terminal 154G is an example of a second ground terminal.

The power supply line 110V is joined to the power supply line 120V at a joint 161V among the plurality of joints 360 . The ground line 110G is joined to the ground line 120G at a joint portion 161G among the plurality of joint portions 360. As shown in FIG. Also, the power supply line 110V is joined to the power supply line 130V at a joint 162V among the plurality of joints 370 . Ground line 110G is joined to ground line 130G at joint 162G among a plurality of joints 370 .

Therefore, the power terminal 153V of the semiconductor component 151 is electrically connected to the power line 110V through the power line 120V. A ground terminal 153G of the semiconductor component 151 is electrically connected to the ground line 110G through the ground line 120G. A power terminal 154V of the semiconductor component 152 is electrically connected to the power line 110V through the power line 130V. Ground terminal 154G of semiconductor component 152 is electrically connected to ground line 110G via ground line 130G.

In the third embodiment, in order to suppress potential fluctuations of the power supply terminal 153V and the ground terminal 153G due to the operation of the semiconductor component 151, the image processing module 3000 includes the capacitor 171, which is an example of the first capacitive element, as in the first embodiment. Prepare. The capacitor 171 has an electrode 1711 that is an example of a first electrode and an electrode 1712 that is an example of a second electrode.

The electrode 1711 is joined to the power supply line 120V with a conductive member, and the electrode 1712 is joined to the ground line 120G with a conductive member. Capacitor 171 is arranged between printed wiring board 301 and printed wiring board 302 . As a result, the path from the semiconductor component 151 to the capacitor 171 can be shortened, and potential fluctuations at the power supply terminal 153V and the ground terminal 153G can be effectively suppressed.

Also, the capacitor 171 is arranged at a position overlapping the semiconductor component 151 when viewed in the Z direction. As a result, the path from the semiconductor component 151 to the capacitor 171 can be shortened, and potential fluctuations at the power supply terminal 153V and the ground terminal 153G can be effectively suppressed.

As in the first embodiment, the electrode 1711 is joined to the power line 120V with a conductive member, but is not joined to the power line 110V. Also, the electrode 1712 is joined to both the ground lines 110G and 120G with a conductive member. As a result, the path from the electrode 1711 of the capacitor 171 to the power supply terminal 154V of the semiconductor component 152 is lengthened, and the impedance of the path reduces interference noise.

FIG. 7A is an enlarged view of the vicinity of the capacitor 171 in the image processing module 3000 according to the third embodiment.

The power line 110V has a power pad 111V. The power pad 111V is an example of a first power pad. Power supply pad 111V is included in plurality of pads 304 . The power line 120V has power pads 121V and 122V. The power pad 121V is an example of a second power pad. The power pad 122V is an example of a third power pad. Power pads 121V and 122V are included in the plurality of pads 305 .

The power pad 111V and the power pad 121V are joined to each other at the junction 161V. The joint 161V is an example of a first joint. The power supply pad 122V and the electrode 1711 of the capacitor 171 are joined together at a conductive joint S1, which is an example of a second joint.

The ground line 110G has ground pads 111G and 112G. Ground pad 111G is an example of a first ground pad. Ground pad 112G is an example of a second ground pad. Ground pads 111 G and 112 G are included in the plurality of pads 304 . The ground line 120G has ground pads 121G and 122G. Ground pad 121G is an example of a third ground pad. Ground pad 122G is an example of a fourth ground pad. Ground pads 121 G and 122 G are included in a plurality of pads 305 .

Ground pad 111G and ground pad 121G are joined together at joint 161G. The joint portion 161G is an example of a third joint portion. The ground pad 112G and the electrode 1712 of the capacitor 171 are joined together at a conductive joint S3, which is an example of a fourth joint. The ground pad 122G and the electrode 1712 of the capacitor 171 are joined together at a conductive joint S4, which is an example of a fifth joint.

With the above configuration, interference noise observed at capacitor 171 passes through power supply line 120V of printed wiring board 302 and propagates to semiconductor component 152 through power supply lines 110V and 130V. This reduces interference noise propagating from the capacitor 171 to the semiconductor component 152 .

Also, in the third embodiment, an inductor such as a ferrite bead can be omitted as a noise filter. By omitting the inductor, it is possible to suppress an increase in the wiring area, and it is possible to realize miniaturization and high-density mounting of the image processing module 3000 . Furthermore, it is possible to reduce costs by reducing the number of parts.

In the third embodiment, the ground pads 112G and 122G to which the electrodes 1712 of the capacitor 171 are joined at the joints S3 and S4 are used to connect the ground lines 110G and 120G in parallel. As a result, it is possible to reduce the size of the printed wiring board 302 and increase the density of the signal lines while securing the number of ground pads for each of the ground lines 110G and 120G necessary for connecting the ground lines 110G and 120G in parallel. be able to.

Also, the power terminal 153V of the semiconductor component 151 is electrically connected to the power terminal 154V of the semiconductor component 152 via the power line 120V, the power line 110V, and the power line 130V. Also, the ground terminal 153G of the semiconductor component 151 is electrically connected to the ground terminal 154G of the semiconductor component 152 via the ground line 120G, the ground line 110G, and the ground line 130G. In this way, the power supply line 120V and the power supply line 130V are electrically connected on the printed wiring board 302 bypassing the power supply line 110V. length becomes longer. In addition, since the ground line 120G and the ground line 130G are electrically connected to each other on the printed wiring board 302 while bypassing the ground line 110G, the path length between the ground terminals 153G and 154G is reduced compared to the case of direct connection. become longer. Interference noise can be reduced by these configurations.

Further, in the third embodiment, the image processing module 3000 is an example of a second capacitive element, as in the first embodiment, in order to suppress potential fluctuations of the power supply terminal 154V and the ground terminal 154G due to the operation of the semiconductor component 152. A capacitor 172 is provided. The capacitor 172 has an electrode 1721 that is an example of a third electrode and an electrode 1722 that is an example of a fourth electrode.

Electrode 1721 is joined to power supply line 130V with a conductive member, and electrode 1722 is joined to ground line 130G with a conductive member. Capacitor 172 is arranged between printed wiring board 301 and printed wiring board 303 . As a result, the path from the semiconductor component 152 to the capacitor 172 can be shortened, and potential fluctuations at the power supply terminal 154V and the ground terminal 154G can be effectively suppressed.

In addition, the capacitor 172 is arranged at a position overlapping the semiconductor component 152 when viewed in the Z direction. As a result, the path from the semiconductor component 152 to the capacitor 172 can be shortened, and potential fluctuations at the power supply terminal 154V and the ground terminal 154G can be effectively suppressed.

As in the first embodiment, the electrode 1721 is joined to the power line 130V with a conductive member, but is not joined to the power line 110V. Also, the electrode 1722 is joined to both the ground lines 110G and 130G with a conductive member. As a result, the path from the electrode 1721 of the capacitor 172 to the power supply terminal 153V of the semiconductor component 151 is lengthened, and the impedance of the path reduces interference noise.

FIG. 7B is an enlarged view of the vicinity of the capacitor 172 in the image processing module 3000 according to the third embodiment.

The power line 110V has a power pad 113V. Power supply pad 113V is included in plurality of pads 306 . The power line 130V has power pads 131V and 132V. Power pads 131V and 132V are included in the plurality of pads 307 .

Power supply pad 113V and power supply pad 131V are joined together at joint 162V. The power supply pad 132V and the electrode 1721 of the capacitor 172 are joined together at a conductive joint S5.

Ground line 110G has ground pads 113G and 114G. Ground pads 113G and 114G are included in the plurality of pads 306. FIG. The ground line 130G has ground pads 131G and 132G. Ground pads 131G and 132G are included in a plurality of pads 307. FIG.

Ground pad 113G and ground pad 131G are joined together at joint 162G. Ground pad 114G and electrode 1722 of capacitor 172 are bonded together at conductive junction S7. Ground pad 132G and electrode 1722 of capacitor 172 are bonded together at conductive junction S8.

With the above configuration, the interference noise observed at the capacitor 172 passes through the power supply line 130V of the printed wiring board 303 and propagates to the semiconductor component 151 through the power supply lines 110V and 120V. Therefore, interference noise propagating from the capacitor 172 to the semiconductor component 151 is reduced.

In the third embodiment, ground pads 114G and 132G to which electrodes 1722 of capacitors 172 are joined at joints S7 and S8 are used to connect ground lines 110G and 130G in parallel. As a result, it is possible to reduce the size of the printed wiring board 303 and increase the density of the signal lines while securing the number of ground pads for each of the ground lines 110G and 130G necessary for connecting the ground lines 110G and 130G in parallel. be able to.

Further, the image processing module 3000 includes a capacitor 173, which is an example of a third capacitive element arranged on the printed wiring board 301, as in the first embodiment. The capacitor 173 has an electrode 1731 that is an example of a fifth electrode and an electrode 1732 that is an example of a sixth electrode. The capacity, arrangement and connection structure of the capacitor 173 are the same as those of the first embodiment. Therefore, as in the first embodiment, interference noise propagating from the capacitor 171 to the semiconductor component 152 can be further suppressed.

The image processing module 3000 also includes a capacitor 174, which is an example of a fourth capacitive element, arranged on the printed wiring board 301, as in the first embodiment. The capacitor 174 has an electrode 1741 that is an example of a seventh electrode and an electrode 1742 that is an example of an eighth electrode. The capacitance, arrangement and wiring structure of the capacitor 174 are the same as in the first embodiment. Therefore, as in the first embodiment, interference noise propagating from the capacitor 172 to the semiconductor component 151 can be further suppressed.

Furthermore, in the third embodiment, as shown in FIG. 7A, the plurality of pads 304 includes dummy pads 112D arranged at positions facing the electrodes 1711 of the capacitor 171. As shown in FIG. The electrode 1711 of the capacitor 171 and the dummy pad 112D are joined to each other at a conductive joint S2, which is an example of a sixth joint.

Since electrode 1711 of capacitor 171 is joined to dummy pad 112D, when printed wiring board 302 is mounted on printed wiring board 301, it is possible to prevent capacitor 171 from being unbalanced and inclined. As a result, it is possible to prevent an open failure from occurring between the electrode 1711 and the power supply pad 122V, and to stably mount the capacitor 171 between the printed wiring boards 301 and 302. FIG. Although it is preferable that the dummy pad 112D exists, it can be omitted.

Furthermore, in the third embodiment, as shown in FIG. 7B, the plurality of pads 306 includes dummy pads 114D arranged at positions facing the electrodes 1721 of the capacitor 172. As shown in FIG. The electrode 1721 of the capacitor 172 and the dummy pad 114D are joined together at a conductive joint S6.

Since electrode 1712 of capacitor 172 is joined to dummy pad 114D, when printed wiring board 303 is mounted on printed wiring board 301, it is possible to prevent capacitor 172 from being unbalanced and inclined. As a result, it is possible to prevent an open failure from occurring between the electrode 1721 and the power supply pad 132V, and to stably mount the capacitor 172 between the printed wiring boards 301 and 303. FIG. Although it is preferable that the dummy pad 114D exists, it can be omitted.

In the above description, the number of each of the capacitors 171 to 174 is one, but the number of capacitors 171 to 174 is not limited to this, and each of the capacitors 171 to 174 may be plural in number. Moreover, since the semiconductor component 151 is configured to perform image processing, it operates more frequently than the semiconductor component 152 . Therefore, among the capacitors 171 and 172, the capacitor 172 can be omitted as required. Capacitors 173 and 174 are also preferably present, although capacitors 173 and/or 174 may be omitted if desired.

[Fourth Embodiment]
Next, an electronic module according to a fourth embodiment will be described. FIG. 8 is a schematic cross-sectional view of a main part of an image processing module 4000, which is an example of an electronic module according to the fourth embodiment. In the fourth embodiment, the image processing module 1000 is changed to an image processing module 4000 in the digital camera 600, which is an imaging device as an example of electronic equipment, described in the first embodiment. In the fourth embodiment, the same reference numerals are used for the same configuration as in the first embodiment, and detailed description thereof is omitted.

The image processing module 4000 includes a printed wiring board 101 and capacitors 171 to 174 as in the first embodiment. The image processing module 4000 also includes a semiconductor device 450 arranged on the printed wiring board 101 . A semiconductor device 450 has a printed wiring board 102 as in the first embodiment.

In the first embodiment, the case where the same operating voltage is applied to the two semiconductor components 151 and 152 has been described. In the third embodiment, one semiconductor component has two circuit units, and the same operating voltage is applied to the two circuit units.

Specifically, the semiconductor device 450 has a semiconductor component 451 that is an example of a first semiconductor component. The semiconductor component 451 includes a circuit unit 4511, which is an example of a first circuit unit, and a circuit unit 4512, which is an example of a second circuit unit. Circuit unit 4511 is, for example, a digital signal processor, and circuit unit 4512 is, for example, a memory unit. Inside the semiconductor component 451, the circuit unit 4511 and the circuit unit 4512 are connected to each other by a signal line so as to enable data communication, but the power supply line is independent. In the fourth embodiment, the rated voltage of the circuit unit 4511 required for the operation of the circuit unit 4511 is the same as the rated voltage of the circuit unit 4512 required for the operation of the circuit unit 4512 .

Semiconductor component 451 is mounted on printed wiring board 102 . Semiconductor component 451 is arranged on main surface 1022 of insulating substrate 12 . A semiconductor component 451 has a plurality of terminals 453 arranged in an array at intervals in the X and Y directions. Each of the plurality of terminals 453 includes solder bumps and pads, and is mechanically and electrically connected to pads (not shown) on main surface 1022 .

The plurality of terminals 453 includes a power terminal 153V, a ground terminal 153G, a power terminal 154V, and a ground terminal 154G. The power terminal 153V is an example of a first power terminal, and the ground terminal 153G is an example of a first ground terminal. The power terminal 154V is an example of a second power terminal, and the ground terminal 154G is an example of a second ground terminal.

The circuit unit 4511 becomes operable when an operating voltage, that is, a DC voltage is applied between the power terminal 153V and the ground terminal 153G. The circuit unit 4512 becomes operable when an operating voltage, that is, a DC voltage is applied between the power terminal 154V and the ground terminal 154G.

As in the first embodiment, the power terminal 153V is electrically connected to the power line 120V by being joined to the pad of the power line 120V. Further, similarly to the first embodiment, the ground terminal 153G is electrically connected to the ground line 120G by being joined to the pad of the ground line 120G. Further, similarly to the first embodiment, the power terminal 154V is electrically connected to the power line 130V by being joined to the pad of the power line 130V. Further, similarly to the first embodiment, the ground terminal 154G is electrically connected to the ground line 130G by being joined to the pad of the ground line 130G.

The capacity, arrangement and connection structure of each capacitor 171 to 174 are the same as in the first embodiment. Therefore, also in the fourth embodiment, like the first embodiment, it is possible to suppress potential fluctuations and reduce interference noise.

As in the first embodiment, the power terminal 153V of the semiconductor component 151 is electrically connected to the power terminal 154V of the semiconductor component 152 via the power line 120V, the power line 110V, and the power line 130V. Also, the ground terminal 153G of the semiconductor component 151 is electrically connected to the ground terminal 154G of the semiconductor component 152 via the ground line 120G, the ground line 110G and the ground line 130G. These configurations increase the path length between the semiconductor component 151 and the semiconductor component 152, so that interference noise can be reduced.

Also in the fourth embodiment, the number of each of the capacitors 171 to 174 is not limited to one, and the number of each of the capacitors 171 to 174 may be plural. Also, the capacitor 172 can be omitted if necessary. Capacitors 173 and/or 174 can also be omitted if desired.

Also, the printed wiring board 102 may be replaced with the two printed wiring boards 302 and 303 described in the third embodiment, and the semiconductor component 451 may be arranged across the two printed wiring boards 302 and 303 .

[Fifth embodiment]
Next, an electronic module according to a fifth embodiment will be described. FIG. 9 is a schematic cross-sectional view of a main part of an image processing module 5000, which is an example of an electronic module according to the fifth embodiment. In the fifth embodiment, the image processing module 1000 is changed to an image processing module 5000 in the digital camera 600, which is an imaging device that is an example of electronic equipment, described in the fifth embodiment. In the fifth embodiment, the same reference numerals are used for the same configurations as in the first embodiment, and detailed description thereof is omitted.

The image processing module 5000 includes a printed wiring board 101, a semiconductor device 150, and capacitors 171-174, as in the first embodiment. In the fifth embodiment, the bonding structure in capacitors 171 and 172 is different from that in the first embodiment.

In the fifth embodiment, the plurality of pads 104 on the printed wiring board 101 and the plurality of pads 105 on the printed wiring board 102 are joined at a plurality of joining portions 560 . Each joint 560 is made of a conductive material such as solder.

FIG. 10A is an enlarged view of the vicinity of the capacitor 171 in the image processing module 5000 according to the fifth embodiment. FIG. 10(b) is an enlarged view of the vicinity of the capacitor 172 in the image processing module 5000 according to the fifth embodiment.

As shown in FIG. 10A, a power supply pad 111V of the power supply line 110V and a power supply pad 121V of the power supply line 120V are joined to each other at a joint portion 161V. The power pad 111V is an example of a first power pad. The power pad 121V is an example of a second power pad. The joint 161V is an example of a first joint. Joint 161 V is included in a plurality of joints 560 .

Also, the power supply pad 122V of the power supply line 120V, the dummy pad 112D, and the electrode 1711 of the capacitor 171 are connected to each other at the joint portion 561V. The power pad 122V is an example of a third power pad. The joint 561V is an example of a second joint. Joint 561 V is included in the plurality of joints 560 .

Also, the ground pad 111G of the ground line 110G and the ground pad 121G of the ground line 120G are joined together at the joint portion 161G. Ground pad 111G is an example of a first ground pad. Ground pad 121G is an example of a third ground pad. The joint portion 161G is an example of a third joint portion. Joint 161 G is included in a plurality of joints 560 .

Also, the ground pad 112G of the ground line 110G, the ground pad 122G of the ground line 120G, and the electrode 1712 of the capacitor 171 are joined together at the joint portion 561G. Ground pad 112G is an example of a second ground pad. Ground pad 122G is an example of a fourth ground pad. The joint portion 561G is an example of a fourth joint portion. Joint portion 561G is included in the plurality of joint portions 560 .

As shown in FIG. 10B, a power supply pad 113V of the power supply line 110V and a power supply pad 131V of the power supply line 130V are joined to each other at a joint portion 162V. Joint 162V is included in multiple joints 560 .

Also, the power supply pad 132V of the power supply line 130V, the dummy pad 114D, and the electrode 1721 of the capacitor 172 are joined to each other at the junction 562V. Joint 562V is included in multiple joints 560 .

Also, the ground pad 113G of the ground line 110G and the ground pad 131G of the ground line 130G are joined together at the joining portion 162G. Joint 162</b>G is included in a plurality of joints 560 .

Also, the ground pad 114G of the ground line 110G, the ground pad 132G of the ground line 130G, and the electrode 1722 of the capacitor 172 are joined together at the joint portion 562G. Joint 562G is included in the plurality of joints 560 .

As described above, even with the junction structure of the fifth embodiment, it is possible to suppress potential fluctuations and reduce interference noise, as in the first embodiment.

Also in the fifth embodiment, the number of each of the capacitors 171 to 174 is not limited to one, and the number of each of the capacitors 171 to 174 may be plural. Also, the capacitor 172 can be omitted if necessary. Capacitors 173 and/or 174 can also be omitted if desired.

[Sixth Embodiment]
Next, an electronic module according to the sixth embodiment will be described. FIG. 11 is a schematic cross-sectional view of a main part of an image processing module 6000, which is an example of an electronic module according to the sixth embodiment. In the sixth embodiment, the image processing module 1000 is changed to an image processing module 6000 in the digital camera 600, which is an imaging device that is an example of electronic equipment, described in the sixth embodiment. In the sixth embodiment, the same reference numerals are used for the same configuration as in the first embodiment, and detailed description thereof is omitted.

In the first to fifth embodiments, cases where the interference noise observed in the first capacitative element is configured to bypass the second power supply line have been described. In the sixth embodiment, interference noise observed in the first capacitive element is configured to bypass the second ground line.

The image processing module 6000 includes a printed wiring board 601 , which is an example of a first printed wiring board and has a configuration different from that of the printed wiring board 101 . The image processing module 6000 also includes a semiconductor device 150 and capacitors 171 to 174 having the same configuration as in the first embodiment. Printed wiring board 601 and printed wiring board 102 are joined at a plurality of joints 160 . Capacitors 171 and 172 are arranged between printed wiring board 601 and printed wiring board 102 . A semiconductor device 150 has a printed wiring board 102 and semiconductor components 151 and 152 as described in the first embodiment.

The printed wiring board 601 has an insulating substrate 11 and a power supply line 610V and a ground line 610G held on the insulating substrate 11 . The power line 610V is an example of a first power line, and the ground line 610G is an example of a first ground line.

The power line 610V includes a power pattern 117V, a plurality of power vias 118V, and power pads 111V to 116V. Ground line 610G includes ground pattern 117G and a plurality of ground vias 118G. Ground line 610G also includes ground pads 111G, 113G, 115G, and 116G.

A power terminal 153V of the semiconductor component 151 is electrically connected to a power line 610V through a power line 120V. A ground terminal 153G of the semiconductor component 151 is electrically connected to the ground line 610G through the ground line 120G.

The power terminal 154V of the semiconductor component 152 is electrically connected to the power line 610V through the power line 130V. Ground terminal 154G of semiconductor component 152 is electrically connected to ground line 610G via ground line 130G.

In the sixth embodiment, electrodes 1711 of capacitor 171 are connected to both power supply lines 610V and 120V with conductive members. Electrode 1712 of capacitor 171 is joined to ground line 120G by a conductive member, but not joined to ground line 610G. As a result, interference noise observed at electrode 1712 of capacitor 171 does not propagate directly to ground line 610G, but propagates to ground line 610G via ground line 120G. Therefore, the path from the electrode 1712 of the capacitor 171 to the ground terminal 154G of the semiconductor component 152 becomes long, and the impedance of the path reduces the interference noise.

A junction structure of the capacitor 171 will be specifically described. The power pad 111V and the power pad 121V are joined to each other at the junction 161V. The power supply pad 112V and the electrode 1711 of the capacitor 171 are joined together with a conductive joint. The power supply pad 122V and the electrode 1711 of the capacitor 171 are joined together with a conductive joint. Ground pad 111G and ground pad 121G are joined together at joint 161G. Joints 161V and 161G are included in the plurality of joints 160 . Ground pad 122G and electrode 1712 of capacitor 171 are joined together at a conductive joint. A conductive member forming each joint is, for example, solder.

With the above configuration, the interference noise observed at the capacitor 171 passes through the ground line 120G and propagates to the semiconductor component 152 through the ground lines 610G and 130G. Therefore, interference noise propagating from the capacitor 171 to the semiconductor component 152 is reduced.

In the sixth embodiment, the power supply pads 112V and 122V to which the electrodes 1711 of the capacitor 171 are connected are used to connect the power supply lines 610V and 120V in parallel. As a result, the printed wiring board 102 can be miniaturized and the signal lines can be arranged at a high density while securing the number of power supply pads for each of the power supply lines 610V and 120V required for connecting the power supply lines 610V and 120V in parallel. be able to.

The junction structure of capacitor 172 is also similar to the junction structure of capacitor 171 . Power supply pad 113V and power supply pad 131V are joined together at joint 162V. The power pad 114V and the electrode 1721 of the capacitor 172 are bonded together with a conductive junction. The power pad 132V and the electrode 1721 of the capacitor 172 are bonded together with a conductive junction. Ground pad 113G and ground pad 131G are joined together at joint 162G. Ground pad 132G and electrode 1722 of capacitor 172 are bonded together at a conductive junction. A conductive member forming each joint is, for example, solder.

With the above configuration, the interference noise observed at capacitor 172 propagates to semiconductor component 151 via ground line 130G and ground lines 610G and 120G. Therefore, interference noise propagating from the capacitor 172 to the semiconductor component 151 is reduced.

In the sixth embodiment, the power supply pads 114V and 132V to which the electrodes 1721 of the capacitor 172 are connected are used to connect the power supply lines 610V and 130V in parallel. As a result, the printed wiring board 102 can be miniaturized and the signal lines can be arranged at a high density while securing the number of power supply pads for each of the power supply lines 610V and 130V required for connecting the power supply lines 610V and 130V in parallel. be able to.

Furthermore, in the sixth embodiment, the printed wiring board 601 includes dummy pads 612</b>D arranged at positions facing the electrodes 1712 of the capacitors 171 . The dummy pad 612D is not in contact with the power supply line 610V and the ground line 610G on the printed wiring board 601, that is, is independent. The electrode 1712 of the capacitor 171 and the dummy pad 612D are joined together at a conductive joint. Since electrode 1712 of capacitor 171 is joined to dummy pad 612D, when printed wiring board 102 is mounted on printed wiring board 601, it is possible to prevent capacitor 171 from losing its balance and tilting. As a result, it is possible to prevent an open defect from occurring between the electrode 1712 and the ground pad 122G, and to stably mount the capacitor 171 between the printed wiring boards 601 and . Although it is preferable that the dummy pad 212D exists, it can be omitted.

Furthermore, in the sixth embodiment, printed wiring board 601 includes dummy pads 614D arranged at positions facing electrodes 1722 of capacitor 172 . The dummy pad 614D is not in contact with the power supply line 610V and the ground line 610G on the printed wiring board 601, that is, is independent. Electrode 1722 of capacitor 172 and dummy pad 614D are joined to each other at a conductive junction. Since electrode 1722 of capacitor 172 is joined to dummy pad 614D, when printed wiring board 102 is mounted on printed wiring board 601, it is possible to prevent capacitor 172 from losing its balance and tilting. As a result, it is possible to prevent an open defect from occurring between the electrode 1722 and the ground pad 132G, and to stably mount the capacitor 172 between the printed wiring boards 601,102. Although it is preferable that the dummy pad 614D exists, it can be omitted.

The junction structure of the capacitors 171 and 172 in the sixth embodiment may be applied to the junction structure of the capacitors 171 and 172 in the second to fifth embodiments.

The present invention is not limited to the embodiments described above, and many modifications are possible within the technical concept of the present invention. Moreover, the effects described in the embodiments are merely enumerations of the most suitable effects produced by the present invention, and the effects of the present invention are not limited to those described in the embodiments.

In the above-described embodiments, the case where the electronic module of the present invention is applied to an imaging device such as a digital camera has been described, but the present invention is not limited to this. The electronic module of the present invention can also be applied to electronic devices such as mobile communication devices such as smartphones, tablet PCs, and game machines, and electronic devices such as wearable devices. Further, the electronic module of the present invention can also be applied to image forming apparatuses such as printers, copiers, facsimiles, and multifunction machines having these functions as electronic equipment.

DESCRIPTION OF SYMBOLS 101... Printed wiring board (1st wiring board), 102... Printed wiring board (2nd wiring board), 110G... Ground line (1st ground line), 110V... Power supply line (1st power supply line), 120G... Ground line (second ground line), 120V... power supply line (second power supply line), 151... semiconductor component (first semiconductor component), 153G... ground terminal (first ground terminal), 153V... power supply terminal (first power supply terminal) , 171...capacitor (first capacitive element), 1711...electrode (first electrode), 1712...electrode (second electrode)

Claims (20)

a first wiring board;
a second wiring board arranged on the first wiring board;
a first semiconductor component disposed on the second wiring board and having a first power supply terminal and a first ground terminal;
a first capacitive element having a first electrode and a second electrode arranged between the first wiring board and the second wiring board;
The first wiring board has a first power supply line and a first ground line,
The second wiring board has a second power supply line and a second ground line,
the first power supply terminal is electrically connected to the first power supply line via the second power supply line;
the first ground terminal is electrically connected to the first ground line through the second ground line;
the first electrode is not joined to the first power supply line but is joined to the second power supply line;
the second electrode is joined to both the first ground line and the second ground line;
An electronic module characterized by: The first power supply line has a first power supply pad,
the second power supply line has a second power supply pad and a third power supply pad;
the first power supply pad and the second power supply pad are joined to each other at a first joint;
wherein the third power supply pad and the first electrode are joined to each other at a second joint;
The electronic module according to claim 1, characterized in that: the first ground line has a first ground pad and a second ground pad;
the second ground line has a third ground pad and a fourth ground pad;
the first ground pad and the third ground pad are joined together at a third joint;
the second ground pad and the second electrode are joined together at a fourth joint;
the fourth ground pad and the second electrode are joined together at a fifth joint;
3. The electronic module according to claim 2, characterized in that: the first ground line has a first ground pad and a second ground pad;
the second ground line has a third ground pad and a fourth ground pad;
the first ground pad and the third ground pad are joined together at a third joint;
the second ground pad, the fourth ground pad, and the second electrode are joined together at a fourth joint;
3. The electronic module according to claim 2, characterized in that: further comprising a second semiconductor component having a second power supply terminal and a second ground terminal disposed on the second wiring board;
the second wiring board has a third power line that is not in contact with the second power line and a third ground line that is not in contact with the second ground line;
the first power terminal is electrically connected to the second power terminal via the second power line, the first power line, and the third power line;
The first ground terminal is electrically connected to the second ground terminal via the second ground line, the first ground line, and the third ground line,
The electronic module according to any one of claims 1 to 4, characterized in that: further comprising a second capacitive element having a third electrode and a fourth electrode arranged between the first wiring board and the second wiring board;
the third electrode is not joined to the first power supply line but is joined to the third power supply line;
the fourth electrode is joined to both the first ground line and the third ground line;
6. The electronic module according to claim 5, characterized in that: a third wiring board arranged on the second wiring board;
a second semiconductor component having a second power terminal and a second ground terminal disposed on the third wiring board;
the second wiring board has a third power line that is not in contact with the second power line and a third ground line that is not in contact with the second ground line;
the third wiring board has a fourth power supply line and a fourth ground line,
the first power terminal is electrically connected to the second power terminal via the second power line, the first power line, the third power line, and the fourth power line;
The first ground terminal is electrically connected to the second ground terminal via the second ground line, the first ground line, the third ground line, and the fourth ground line,
The electronic module according to any one of claims 1 to 4, characterized in that: further comprising a second capacitive element having a third electrode and a fourth electrode arranged between the second wiring board and the third wiring board;
the third electrode is not joined to the third power supply line but is joined to the fourth power supply line;
the fourth electrode is joined to both the third ground line and the fourth ground line;
8. Electronic module according to claim 7, characterized in that: a third wiring board disposed on the first wiring board;
a second semiconductor component having a second power terminal and a second ground terminal disposed on the third wiring board;
The third wiring board has a third power supply line and a third ground line,
the first power terminal is electrically connected to the second power terminal via the second power line, the first power line, and the third power line;
The first ground terminal is electrically connected to the second ground terminal via the second ground line, the first ground line, and the third ground line,
The electronic module according to any one of claims 1 to 4, characterized in that: further comprising a second capacitive element having a third electrode and a fourth electrode arranged between the first wiring board and the third wiring board;
the third electrode is not joined to the first power supply line but is joined to the third power supply line;
the fourth electrode is joined to both the first ground line and the third ground line;
10. Electronic module according to claim 9, characterized in that: the first semiconductor component includes a second power supply terminal and a second ground terminal;
the second wiring board has a third power line that is not in contact with the second power line and a third ground line that is not in contact with the second ground line;
the first power terminal is electrically connected to the second power terminal via the second power line, the first power line, and the third power line;
The first ground terminal is electrically connected to the second ground terminal via the second ground line, the first ground line, and the third ground line,
The electronic module according to any one of claims 1 to 4, characterized in that: further comprising a second capacitive element having a third electrode and a fourth electrode arranged between the first wiring board and the second wiring board;
the third electrode is not joined to the first power supply line but is joined to the third power supply line;
the fourth electrode is joined to both the first ground line and the third ground line;
12. Electronic module according to claim 11, characterized in that: When viewed in a direction perpendicular to the main surface of the first wiring board, the first capacitive element is arranged at a position overlapping the first semiconductor component,
13. The electronic module according to any one of claims 1 to 12, characterized in that: further comprising a third capacitive element having a fifth electrode and a sixth electrode arranged on the first wiring board;
the fifth electrode is joined to the first power supply line,
The sixth electrode is joined to the first ground line,
14. The electronic module according to any one of claims 1 to 13, characterized in that: The capacitance of the third capacitive element is larger than the capacitance of the first capacitive element,
15. Electronic module according to claim 14, characterized in that: When viewed in a direction perpendicular to the main surface of the first wiring board, the third capacitive element is arranged at a position overlapping the first semiconductor component,
16. Electronic module according to claim 14 or 15, characterized in that: the first wiring board has a dummy pad that is not in contact with the first power supply line and the first ground line;
The dummy pad and the first electrode are joined to each other at a sixth joint,
17. The electronic module according to any one of claims 1 to 16, characterized in that: a first wiring board;
a second wiring board arranged on the first wiring board;
a first semiconductor component disposed on the second wiring board and having a first power supply terminal and a first ground terminal;
a first capacitive element having a first electrode and a second electrode arranged between the first wiring board and the second wiring board;
The first wiring board has a first power supply line and a first ground line,
The second wiring board has a second power supply line and a second ground line,
the first power supply terminal is electrically connected to the first power supply line via the second power supply line;
the first ground terminal is electrically connected to the first ground line through the second ground line;
the first electrode is joined to both the first power supply line and the second power supply line;
the second electrode is not joined to the first ground line but is joined to the second ground line;
An electronic module characterized by: a housing;
an electronic module according to any one of claims 1 to 18, arranged inside the housing;
An electronic device characterized by: The electronic device is an imaging device,
wherein the first semiconductor component of the electronic module is configured to perform image processing;
20. The electronic device according to claim 19, characterized by:

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