JP2023042764A - Capacitor and manufacturing method of capacitor - Google Patents

Abstract

To provide a capacitor in novel configuration.SOLUTION: A capacitor includes: a substrate including a first principal surface on one side and a second principal surface on the other side; a plurality of first internal electrode forming penetration holes formed in a first region of the first principal surface and penetrating the substrate in a thickness direction; a plurality of second internal electrode forming penetration holes formed in a second region, which is different from the first region, of the first principal surface and penetrating the substrate in the thickness direction; a plurality of third internal electrode forming penetration holes formed at least in the first region and in the second region and penetrating the substrate in the thickness direction; a plurality of first internal electrodes consisting of conductors embedded in the plurality of first internal electrode forming penetration holes; a plurality of second internal electrodes consisting of conductors embedded in the plurality of second internal electrode forming penetration holes; and a plurality of third internal electrodes consisting of conductors embedded in the plurality of third internal electrode forming penetration holes.SELECTED DRAWING: Figure 1

Description

The present disclosure relates to capacitors and methods of manufacturing capacitors.

1 and 2 of Patent Document 1 show a first embedded electrode embedded in a first opening formed on one surface (upper surface) of a substrate, and a first embedded electrode formed on the other surface (lower surface) of the substrate. and a second embedded electrode embedded in the second opening. The base consists of a silicon substrate and a silicon oxide layer (BOX layer) laminated on the silicon substrate. The first opening is a top opening recess that does not penetrate the base. Also, the second opening is a recess of a lower opening that does not penetrate the base.

As shown in FIG. 2 of Patent Literature 1, the first embedded electrode and the second embedded electrode are arranged in a comb-teeth shape in which both are interdigitated in plan view. In Patent Document 1, as shown in FIG. 3 of Patent Document 1, the first embedded electrode and the second embedded electrode are circular first embedded electrodes arranged in the center in plan view. It is disclosed that it may consist of an electrode, and annular second embedded electrodes and annular first electrodes alternately arranged concentrically with the circular first embedded electrode.

Japanese Patent No. 6555084

An object of the present disclosure is to provide a capacitor of novel configuration.

Another object of the present disclosure is to provide a novel capacitor manufacturing method.

An embodiment of the present disclosure includes a substrate having a first principal surface on one side and a second principal surface on the other side, and a polarizer formed in a first region of the first principal surface and penetrating the substrate in a thickness direction. and a plurality of second internal electrode forming through holes formed in a second region different from the first region of the first main surface and penetrating the substrate in the thickness direction. a plurality of third internal electrode forming through holes formed at least in the first region and the second region and penetrating the substrate in a thickness direction; and the plurality of first internal electrode forming through holes. a plurality of first internal electrodes made of a conductor embedded in the plurality of through-holes for forming the second internal electrodes; a plurality of second internal electrodes made of a conductor embedded in the plurality of through-holes for forming the second internal electrodes; a plurality of third internal electrodes made of a conductor embedded in the third internal electrode forming through-holes, and the plurality of first internal electrodes disposed on the first main surface and electrically connected to each other a first external electrode; a second external electrode arranged on the first main surface and spaced apart from the first external electrode; the plurality of second internal electrodes being electrically connected; a third outer electrode disposed thereon and electrically connected to the plurality of third inner electrodes.

This configuration provides a capacitor with a novel configuration.

In one embodiment of the present disclosure, a substrate having a first main surface on one side and a second main surface on the other side has a plurality of second main surfaces penetrating the substrate in a thickness direction in a first region of the first main surface. One internal electrode forming through-hole is formed, and a plurality of second internal electrode forming through-holes penetrating the substrate in the thickness direction are formed in a second region different from the first region of the first main surface. a through-hole forming step of forming a plurality of through-holes for forming third internal electrodes formed at least in the first region and in the second region and penetrating the substrate in a thickness direction; By embedding a conductor in the formation through-hole, the second internal electrode-forming through-hole, and the third internal electrode-forming through-hole, the first internal electrode is formed in the first internal electrode-forming through-hole. forming a second internal electrode in the second internal electrode forming through hole and forming a third internal electrode in the third internal electrode forming through hole; a first external electrode electrically connected to the plurality of first internal electrodes; and a second external electrode spaced apart from the first external electrode and electrically connected to the plurality of second internal electrodes. a first and second external electrode forming step for arranging external electrodes; and a third external electrode for arranging a third external electrode electrically connected to the plurality of third internal electrodes on the second main surface. and a forming step.

With this manufacturing method, a capacitor with a novel configuration can be manufactured.

1 is a schematic plan view of a capacitor according to a first embodiment of the present disclosure; FIG. FIG. 2 is a schematic cross-sectional view taken along line II-II of FIG. 3 is a schematic cross-sectional view taken along line III-III in FIG. 2. FIG. 4 is a schematic cross-sectional view taken along line IV-IV of FIG. 2. FIG. FIG. 5 is a schematic cross-sectional view along line V-V in FIG. 6A is a cross-sectional view showing part of the manufacturing process of the capacitor shown in FIGS. 1 to 5, and is a cross-sectional view corresponding to the cross-sectional view of FIG. FIG. 6B is a cross-sectional view showing the next step of FIG. 6A. FIG. 6C is a cross-sectional view showing the next step of FIG. 6B. FIG. 6D is a cross-sectional view showing the next step of FIG. 6C. FIG. 6E is a cross-sectional view showing the next step of FIG. 6D. FIG. 6F is a cross-sectional view showing the next step of FIG. 6E. FIG. 6G is a cross-sectional view showing the next step of FIG. 6F. FIG. 6H is a cross-sectional view showing the next step of FIG. 6G. FIG. 6I is a cross-sectional view showing the next step after FIG. 6H. FIG. 6J is a cross-sectional view showing the next step of FIG. 6I. FIG. 7 is a schematic cross-sectional view of the capacitor according to the second embodiment of the present disclosure, and is a cross-sectional view corresponding to the cross-sectional plane of FIG. 2 . 8A is a cross-sectional view showing a part of the manufacturing process of the capacitor shown in FIG. 7. FIG. FIG. 8B is a cross-sectional view showing the next step of FIG. 8A. FIG. 8C is a cross-sectional view showing the next step of FIG. 8B. FIG. 9 is a schematic plan view showing a modification of the arrangement of the first internal electrode-forming through-holes, the second internal electrode-forming through-holes, and the third internal electrode-forming through-holes. FIG. 10 is a schematic plan view showing still another modification of the arrangement of the first internal electrode-forming through-holes, the second internal electrode-forming through-holes, and the third internal electrode-forming through-holes. FIG. 11 is an electric circuit diagram for explaining the structure of another embodiment.

[Description of Embodiments of the Present Disclosure]
An embodiment of the present disclosure includes a substrate having a first principal surface on one side and a second principal surface on the other side, and a polarizer formed in a first region of the first principal surface and penetrating the substrate in a thickness direction. and a plurality of second internal electrode forming through holes formed in a second region different from the first region of the first main surface and penetrating the substrate in the thickness direction. a plurality of third internal electrode forming through holes formed at least in the first region and the second region and penetrating the substrate in a thickness direction; and the plurality of first internal electrode forming through holes. a plurality of first internal electrodes made of a conductor embedded in the plurality of through-holes for forming the second internal electrodes; a plurality of second internal electrodes made of a conductor embedded in the plurality of through-holes for forming the second internal electrodes; a plurality of third internal electrodes made of a conductor embedded in the third internal electrode forming through-holes, and the plurality of first internal electrodes disposed on the first main surface and electrically connected to each other a first external electrode; a second external electrode arranged on the first main surface and spaced apart from the first external electrode; the plurality of second internal electrodes being electrically connected; a third outer electrode disposed thereon and electrically connected to the plurality of third inner electrodes.

This configuration provides a capacitor with a novel configuration.

In one embodiment of the present disclosure, the plurality of through holes for forming the third internal electrodes are the plurality of through holes for forming the third internal electrodes formed in a region between the first region and the second region in plan view. Includes through holes.

In one embodiment of the present disclosure, in the first region, the plurality of internal electrode forming through holes, including the plurality of first internal electrode forming through holes and the plurality of third internal electrode forming through holes, are flat. a plurality of internal electrode forming through holes arranged in a matrix when viewed, and in the second region, the plurality of internal electrode forming through holes comprising the plurality of second internal electrode forming through holes and the plurality of third internal electrode forming through holes , are arranged in a matrix in plan view.

In one embodiment of the present disclosure, in the first region, the plurality of first internal electrode forming through-holes and the plurality of third internal electrode forming holes are arranged along the first main surface in plan view. alternately arranged in one direction and alternately arranged in a second direction along the first main surface and orthogonal to the first direction, and in the second region, the plurality of second The two internal electrode forming through holes and the plurality of third internal electrode forming through holes are alternately arranged in the first direction and alternately in the second direction.

In one embodiment of the present disclosure, the plurality of third internal electrode forming through holes formed in the intermediate region are arranged at intervals in a direction in which the intermediate region extends in plan view.

In one embodiment of the present disclosure, a plurality of first surface electrodes formed on the first main surface for each of the first internal electrodes and in contact with ends of the first internal electrodes on the first main surface side; a plurality of second surface electrodes formed on the first main surface for each of the second internal electrodes and in contact with ends of the second internal electrodes on the first main surface side; a plurality of third surface electrodes formed for each third internal electrode and in contact with the second main surface side end portion of the third internal electrode; the plurality of first surface electrodes; the plurality of second surface electrodes; a first contact hole formed on the first main surface so as to cover the first main surface side end portion of the third internal electrode and exposing at least part of the surface of the first surface electrode; a first insulating film having second contact holes exposing at least part of the surfaces of the surface electrodes; the plurality of third surface electrodes; a second insulating film formed on the second main surface so as to cover the end portion of the internal electrode on the second main surface side, and having a third contact hole exposing at least part of the surface of the third surface electrode; wherein the first external electrode is formed on the first insulating film in the first region so as to cover the plurality of first surface electrodes in plan view, and the second external electrode is formed on the first insulating film in the second region so as to cover the plurality of second surface electrodes in plan view, and the third external electrode is formed on the plurality of third electrodes in bottom view. The first external electrode is formed on the second insulating film so as to cover the surface electrode, and the first external electrode enters the first contact hole and is connected to the first surface electrode within the first contact hole. The second external electrode is inserted into the second contact hole and connected to the second surface electrode within the second contact hole, and the third external electrode is located within the third contact hole. and is connected to the third surface electrode within the third contact hole.

In one embodiment of the present disclosure, the first internal electrode, the second internal electrode, and the third internal electrode are formed on the first main surface so as to cover end portions of the first internal electrode, the third internal electrode, and the third internal electrode. a first insulating film having a first contact hole exposing the first main surface side end of one internal electrode and a second contact hole exposing the first main surface side end of the second internal electrode; The second main surface of the third internal electrode is formed on the second main surface so as to cover the second main surface side end portions of the first internal electrode, the second internal electrode and the third internal electrode. a second insulating film having a third contact hole exposing a surface-side end portion, wherein the first external electrode is located within the first region and is located in the first region of the plurality of first internal electrodes in a plan view; The second external electrode is formed on the first insulating film so as to cover the end portion on the main surface side, and the second external electrode is the first electrode of the plurality of second internal electrodes in the second region in a plan view. The third external electrode is formed on the first insulating film so as to cover the ends on the main surface side, and the third external electrodes cover the ends on the second main surface side of the plurality of third internal electrodes in a bottom view. the first external electrode is formed on the second insulating film, the first external electrode enters the first contact hole, is connected to the first internal electrode in the first contact hole, and the The second external electrode enters the second contact hole and is connected to the second internal electrode inside the second contact hole, and the third external electrode enters the third contact hole and connects the It is connected to the third internal electrode within the third contact hole.

In one embodiment of the present disclosure, the aspect ratio of the first internal electrode forming through hole, the second internal electrode forming through hole, and the third internal electrode forming through hole is 10 or more.

In one embodiment of the present disclosure, the depth of the first internal electrode forming through hole, the second internal electrode forming through hole, and the third internal electrode forming through hole is 100 μm or more.

In one embodiment of the present disclosure, the maximum width or maximum diameter of the cross section of the first internal electrode forming through hole, the second internal electrode forming through hole, and the third internal electrode forming through hole is 1 μm or more. 10 μm or less.

In one embodiment of the present disclosure, the inter-electrode distance of the plurality of internal electrodes including the first internal electrode, the second internal electrode and the third internal electrode is 0.3 μm or more and 10 μm or less.

In one embodiment of the present disclosure, the conductor comprises Ni or Cu.

In one embodiment of the present disclosure, a substrate having a first main surface on one side and a second main surface on the other side has a plurality of second main surfaces penetrating the substrate in a thickness direction in a first region of the first main surface. One internal electrode forming through-hole is formed, and a plurality of second internal electrode forming through-holes penetrating the substrate in the thickness direction are formed in a second region different from the first region of the first main surface. a through-hole forming step of forming a plurality of through-holes for forming third internal electrodes formed at least in the first region and in the second region and penetrating the substrate in a thickness direction; By embedding a conductor in the formation through-hole, the second internal electrode-forming through-hole, and the third internal electrode-forming through-hole, the first internal electrode is formed in the first internal electrode-forming through-hole. forming a second internal electrode in the second internal electrode forming through hole and forming a third internal electrode in the third internal electrode forming through hole; a first external electrode electrically connected to the plurality of first internal electrodes; and a second external electrode spaced apart from the first external electrode and electrically connected to the plurality of second internal electrodes. a first and second external electrode forming step for arranging external electrodes; and a third external electrode for arranging a third external electrode electrically connected to the plurality of third internal electrodes on the second main surface. and a forming step.

With this manufacturing method, a capacitor with a novel configuration can be manufactured.

In one embodiment of the present disclosure, in the through hole forming step, the plurality of third internal electrode forming through holes are formed in the first region and the second region, and in plan view, the first region and the third internal electrode forming through holes. It is formed in the region between the two regions.

In one embodiment of the present disclosure, in the through-hole forming step, in the first region, a plurality of internal electrodes including the plurality of first internal electrode-forming through holes and the plurality of third internal electrode-forming through holes Formation through-holes are formed in the substrate so as to be arranged in a matrix in plan view, and the plurality of second internal electrode-forming through-holes and the plurality of third internal electrode-forming through-holes are formed in the second region. A plurality of through-holes for forming internal electrodes are formed in the substrate so as to be arranged in a matrix in plan view.

In one embodiment of the present disclosure, the step of forming the first and second external electrodes is performed on the first main surface by forming each of the first internal electrodes on the first main surface side of the first internal electrode. A plurality of first surface electrodes contacting end portions and a plurality of second surface electrodes formed for each of the second internal electrodes and contacting the end portions of the second internal electrodes on the first main surface side are formed. forming a first insulating layer on the first main surface so as to cover the first surface electrode, the second surface electrode, and the end portion of the third internal electrode on the first main surface side; forming a first contact hole exposing at least part of the surface of the first surface electrode and a second contact hole exposing at least part of the surface of the second surface electrode in the first insulating layer forming on the first insulating film a first external electrode connected to the first surface electrode through the first contact hole, and forming the second surface electrode through the second contact hole; forming on the first insulating film a second external electrode connected to the second main surface, wherein the step of forming the third external electrode is formed on the second main surface for each of the third internal electrodes, and forming a plurality of third surface electrodes contacting the second main surface side end portions of the third internal electrodes; and forming the third surface electrode and the second main surface side end portions of the first internal electrodes. forming a second insulating layer on the second main surface so as to cover the ends of the second internal electrodes on the second main surface; and at least part of the surface of the third surface electrode. forming a third contact hole in the second insulating layer to expose a third external electrode connected to the third surface electrode through the third contact hole on the second insulating film and the step of

In one embodiment of the present disclosure, the step of forming the first and second external electrodes is performed so as to cover ends of the first internal electrode, the second internal electrode and the third internal electrode on the first main surface side. a step of forming a first insulating layer on the first main surface; a first contact hole exposing at least a portion of an end portion of the first internal electrode on the first main surface side; and the second internal electrode. forming, in the first insulating layer, a second contact hole exposing at least a part of the end portion of the first main surface of the first insulating layer connected to the first internal electrode through the first contact hole forming a first external electrode on the first insulating film, and forming a second external electrode on the first insulating film to be connected to the second internal electrode through the second contact hole. , the step of forming the third external electrode includes forming a second electrode on the second main surface so as to cover end portions of the first internal electrode, the second internal electrode, and the third internal electrode on the side of the second main surface. forming an insulating layer; forming, in the second insulating layer, a third contact hole exposing at least a part of the end of the third internal electrode on the second main surface side; and the third contact. and forming, on the second insulating film, a third external electrode connected to the third internal electrode through a hole.
[Detailed Description of Embodiments of the Present Disclosure]
Embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.

1 is a schematic plan view of a capacitor according to a first embodiment of the present disclosure; FIG. FIG. 2 is a schematic cross-sectional view taken along line II-II of FIG. FIG. 3 is a schematic cross-sectional view along line III-III in FIG. 4 is a schematic cross-sectional view taken along line IV-IV of FIG. 2. FIG. FIG. 5 is a schematic cross-sectional view taken along line IV-IV in FIG. 2. However, in FIG. The two surface electrodes 9 and 10 are omitted. In FIG. 1, the first internal electrode 6 is indicated by diagonal hatching, and the second internal electrode 7 is indicated by hatching in order to facilitate identification of the first internal electrode 6, the second internal electrode 7, and the third internal electrode 8. It is indicated by cross-hatching, and the third internal electrodes 8 are indicated by dot-like hatching.

Hereinafter, the up-down direction in FIG. 1 is called the vertical direction, and the left-right direction in FIG. 1 is called the horizontal direction. Also, the left side of FIG. 1 may be referred to as "left" and the right side of FIG. 1 may be referred to as "right".

1 and 2, capacitor 1 has a rectangular parallelepiped shape. Capacitor 1 includes substrate 2 .

The substrate 2 has a rectangular parallelepiped shape and includes a pair of main surfaces 2a and 2b and four side surfaces 2c. Of the pair of main surfaces 2a and 2b, the main surface 2a on the upper surface side in FIG. .

In a plan view viewed from the normal direction perpendicular to the first main surface 2a, the substrate 2 has a rectangular shape elongated in the horizontal direction, and the length in the vertical direction is, for example, about 5 mm, and the length in the horizontal direction is , for example, about 10 mm. The planar view shape of the substrate 2 may be a shape other than a rectangular shape, such as a square shape, a circular shape, an elliptical shape, or the like.

Further, the thickness of the substrate 2 is, for example, 100 μm or more, and is, for example, about 400 μm in this embodiment. In this embodiment, the substrate 2 is made of silicon oxide (SiO ₂ ) obtained by thermally oxidizing a silicon substrate. Note that the substrate 2 may be a silicon substrate.

The substrate 2 is formed with a plurality of first internal electrode forming through holes 3 penetrating through the substrate 2 in the thickness direction in the first region E1 of the first main surface 2a. Further, in the substrate 2, a plurality of through holes 4 for forming second internal electrodes are formed through the substrate 2 in the thickness direction in the second region E2 of the first main surface 2a.

In this embodiment, the first area E1 is set to the area from the left edge of the first main surface 2a to the left side of the center in the left-right direction. The second area E2 is set in a substantially right half area of the first main surface 2a. A region between the first region E1 and the second region E2 is called a third region E3.

The substrate 2 has a plurality of third internal electrode forming through-holes 5 penetrating through the substrate 2 in the thickness direction in each of the first area E1, the second area E2 and the third area E3 of the first main surface 2a. formed.

In the first region E1 of the first main surface 2a, the plurality of internal electrode forming through holes 3, 5 each including the plurality of first internal electrode forming through holes 3 and the plurality of third internal electrode forming through holes 5 are , are arranged in a matrix in plan view. In this embodiment, the plurality of internal electrode forming through holes 3 and 5 are arranged side by side at predetermined intervals in the vertical and horizontal directions in a plan view. The first internal electrode forming through holes 3 and the third internal electrode forming through holes 5 are arranged alternately in the vertical direction and the horizontal direction.

In the second region E2 of the first main surface 2a, a plurality of internal electrode forming through holes 4, 5 each composed of a plurality of second internal electrode forming through holes 4 and a plurality of third internal electrode forming through holes 5 are , are arranged in a matrix in plan view. In this embodiment, the plurality of internal electrode forming through-holes 4 and 5 are arranged side by side at the predetermined intervals in the vertical and horizontal directions in a plan view. The second internal electrode forming through-holes 4 and the third internal electrode forming through-holes 5 are arranged alternately in the vertical and horizontal directions.

In the third region E3 of the first main surface 2a, the plurality of through holes 5 for forming the third internal electrodes are arranged in a line at the predetermined intervals in the vertical direction (the direction in which the third region E3 extends). It is

In this embodiment, the cross-sectional shape of each of the internal electrode forming through holes 3, 4, and 5 is square, and the length of one side thereof is, for example, about 1 μm or more and 10 μm or less. In this embodiment, the length of one side is, for example, about 5 μm. The depth of each internal electrode forming through hole 3 , 4 , 5 is the same as the thickness of the substrate 2 . It is preferable that the aspect ratio of each internal electrode forming through hole 3, 4, 5 is 10 or more.

The vertical position of each row of the plurality of internal electrode forming through holes 3 and 5 formed in the first region E1 and the vertical position of each row of the plurality of internal electrode forming through holes 4 and 5 formed in the second region E2 The directional position and the vertical position of each third internal electrode forming through hole 5 formed in the third region E3 are aligned with each other.

Further, the distance between each third internal electrode forming through-hole 5 formed in the third region E3 and the internal electrode forming through-holes 3, 5 in the first region E1 on the left side thereof, and in the third region E3 The distance between each of the formed third internal electrode forming through holes 5 and the internal electrode forming through holes 4, 5 in the second region E2 on the right thereof is the predetermined distance.

Therefore, a plurality of internal electrode forming through holes 3 each including all first internal electrode forming through holes 3, all second internal electrode forming through holes 4, and all third internal electrode forming through holes 5 , 4 and 5 are arranged in a matrix in plan view. In this embodiment, the plurality of through-holes 3, 4, 5 for forming internal electrodes are arranged side by side at predetermined intervals in the vertical and horizontal directions in a plan view.

A first internal electrode 6 made of a conductor is embedded in each first internal electrode forming through hole 3 . A second internal electrode 7 made of a conductor is embedded in each second internal electrode forming through hole 4 . A third internal electrode 8 made of a conductor is embedded in each third internal electrode forming through hole 5 . The inter-electrode distance of the plurality of internal electrodes 6, 7, 8 including the first internal electrode 6, the second internal electrode 7 and the third internal electrode 8 is about 0.3 μm or more and 10 μm or less.

A barrier/seed layer 61 is formed on the inner surface of the through hole 3 for forming the first internal electrode, and the first internal electrode 6 is formed in the through hole 3 for forming the first internal electrode while being surrounded by the barrier/seed layer 61 . and an embedded internal electrode layer 62 . The barrier/seed layer 61 is composed of a barrier layer formed on the inner surface of the first internal electrode forming through hole 3 and a seed layer formed on the barrier layer.

A barrier/seed layer 71 is formed on the inner surface of the through hole 4 for forming the second internal electrode, and the second internal electrode 7 is formed in the through hole 4 for forming the second internal electrode while being surrounded by the barrier/seed layer 71 . and an embedded internal electrode layer 72 . The barrier/seed layer 71 is composed of a barrier layer formed on the inner surface of the second internal electrode forming through hole 4 and a seed layer formed on the barrier layer.

The third internal electrode 8 is surrounded by a barrier/seed layer 81 formed on the inner surface of the third internal electrode-forming through-hole 5 and the barrier/seed layer 81 in the third internal electrode-forming through-hole 5 . and an embedded internal electrode layer 82 . The barrier/seed layer 81 is composed of a barrier layer formed on the inner surface of the third internal electrode forming through hole 5 and a seed layer formed on the barrier layer.

The barrier layers in the barrier/seed layers 61, 71, 81 are made of, for example, TiN, Mn, Mn oxide, Ni, or the like. The seed layer is composed of Ni, NiCr, Cu, Co, Au, or the like, for example. The internal electrode layers 62, 72, 82 are made of Ni, Cu, or the like, for example.

1 to 4, on the first main surface 2a of the substrate 2, each first internal electrode 6 is in contact with the upper end surface (first main surface side end portion) of the first internal electrode 6. A first surface electrode 9 is formed to cover the upper end surface of the first internal electrode 6 . Further, on the first main surface 2a of the substrate 2, a second surface electrode 10, which is in contact with the upper end surface of the second internal electrode 7 (end portion on the side of the first main surface) for each second internal electrode 7, is provided on the first main surface 2a. 2 are formed so as to cover the upper end surfaces of the internal electrodes 7 .

The planar shape of the first surface electrode 9 is, for example, a square shape that is substantially equal to the size of the upper end surface of the first internal electrode 6 or a square shape that is slightly larger than the size of the upper end surface of the first internal electrode 6 . In this embodiment, the planar shape of the first surface electrode 9 is a square shape slightly larger than the size of the upper end surface of the first internal electrode 6 .

The shape of the second surface electrode 10 in a plan view is, for example, a square shape substantially equal to the size of the upper end surface of the second internal electrode 7 or a square shape slightly larger than the size of the upper end surface of the second internal electrode 7 . In this embodiment, the planar shape of the second surface electrode 10 is a square shape slightly larger than the size of the upper end face of the second internal electrode 7 . The planar shape of the first surface electrode 9 and the second surface electrode 10 may be a shape other than a square such as a rectangular shape or a circular shape.

On the first main surface 2a of the substrate 2, the exposed surface of the first main surface 2a, the first surface electrode 9, the second surface electrode 10, and the upper end surface (first main surface side) of the third internal electrode 8 are provided. A first insulating film 11 is formed so as to cover the edge). The first insulating film 11 is formed with a first contact hole 11a that exposes at least a portion of the upper surface of the first surface electrode 9, and a second contact hole 11a that exposes at least a portion of the upper surface of the second surface electrode 10. A contact hole 11b is formed.

The first insulating film 11 is made of, for example, a _SiO2 film. The first insulating film 11 may be composed of a SiN film, a SiON film, or the like. The planar shape of the first contact hole 11 a is, for example, a square shape that is substantially equal to the size of the upper surface of the first surface electrode 9 or a square shape that is slightly smaller than the size of the upper surface of the first surface electrode 9 . In this embodiment, the planar shape of the first contact hole 11 a is a square shape slightly smaller than the size of the upper surface of the first surface electrode 9 .

The shape of the second contact hole 12 a in a plan view is a square shape substantially equal to the size of the upper surface of the second surface electrode 10 or a square shape slightly smaller than the size of the upper surface of the second surface electrode 10 . In this embodiment, the planar shape of the second contact hole 12a is a square shape slightly smaller than the size of the upper surface of the second surface electrode 10 . The planar shape of the first contact hole 11a and the second contact hole 12a may be a shape other than a square, such as a rectangular shape or a circular shape.

On the first insulating film 11, a first external electrode 12 is formed in the first region E1 and a second external electrode 13 is formed in the second region E2. The first external electrodes 12 are arranged to cover all the first surface electrodes 9 in the first region E1 and all the third internal electrodes 8 in the first region E1 in plan view. The first external electrode 12 has a vertically elongated rectangular shape in plan view.

The first external electrode 12 enters the first contact hole 11a of the first insulating film 11 and is connected to the upper surface of the first surface electrode 9 within the first contact hole 11a. Thereby, the first external electrode 12 is electrically connected to the first internal electrode 6 .

The second external electrodes 13 are arranged to cover all the second surface electrodes 10 in the second region E2 and all the third internal electrodes 8 in the second region E2 in plan view. The second external electrode 13 has a vertically elongated rectangular shape in plan view.

The second external electrode 13 enters the second contact hole 11b of the first insulating film 11 and is connected to the upper surface of the second surface electrode 10 in the second contact hole 11b. Thereby, the second external electrode 13 is electrically connected to the second internal electrode 7 . The first external electrode 12 and the second external electrode 13 are made of, for example, Ti, Cu, Ni, Ag, Au, or the like.

1 to 3 and 5, on the second main surface 2b of the substrate 2, for each third internal electrode 8, the lower end surface (second main surface side end portion) of the third internal electrode 8 is provided. A third surface electrode 15 in contact with is formed to cover the lower end surface of the third internal electrode 8 . The shape of the third surface electrode 15 in a plan view is a square shape substantially equal to the size of the lower end surface of the third internal electrode 8 or a square shape slightly larger than the size of the lower end surface of the third internal electrode 8 . In this embodiment, the planar view shape of the third surface electrode 15 is a square shape slightly larger than the size of the lower end surface of the third internal electrode 8 . The planar view shape of the third surface electrode 15 may be a shape other than a square shape, such as a rectangular shape or a circular shape.

On the second main surface 2b of the substrate 2, the exposed surface of the second main surface 2b, the third surface electrode 15, the lower end surface (second main surface side end portion) of the first internal electrode 6, and the second inner A second insulating film 16 is formed so as to cover the lower end surface of the electrode 7 (end portion on the side of the second main surface). A third contact hole 16 a is formed in the second insulating film 16 to expose at least part of the upper surface of the third surface electrode 15 .

The second insulating film 16 is made of, for example, a _SiO2 film. The second insulating film 16 may be composed of a SiN film, a SiON film, or the like. The shape of the third contact hole 16a in a plan view is a square shape substantially equal to the size of the upper surface of the third surface electrode 15 or a square shape slightly smaller than the size of the upper surface of the third surface electrode 15 . In this embodiment, the planar shape of the third contact hole 16 a is a square shape slightly smaller than the size of the upper surface of the third surface electrode 15 . The planar view shape of the third contact hole 16a may be a shape other than a square shape, such as a rectangular shape or a circular shape.

A third external electrode 17 is formed on the second insulating film 16 . The third external electrodes 17 are arranged so as to cover all the third surface electrodes 15, all the first internal electrodes 6 and all the second internal electrodes 7 in bottom view. The third external electrode 17 is formed over substantially the entire area of the second main surface 2b excluding the peripheral portion of the second main surface 2b. The third external electrode 17 enters the third contact hole 16a of the second insulating film 16 and is connected to the upper surface of the third surface electrode 15 within the third contact hole 16a. Thereby, the third external electrode 17 is electrically connected to the third internal electrode 8 . The third external electrode 17 is made of, for example, Ti, Cu, Ni, Ag, Au, or the like.

In the configuration as described above, in the first region E1, the first internal electrode 6 and the third internal electrode 8, which are vertically adjacent to each other, have opposing surfaces facing each other in the vertical direction. A wall of the substrate 2 sandwiched between the facing surfaces of the first internal electrode 6 and the third internal electrode 8 adjacent in the vertical direction constitutes a capacitor film (dielectric film). A pair of vertically adjacent first internal electrodes 6 and third internal electrodes 8 and a capacitive film therebetween constitute one first capacitor element.

Similarly, in the first region E1, the first internal electrode 6 and the third internal electrode 8, which are laterally adjacent to each other, have opposing surfaces facing each other in the lateral direction. A wall of the substrate 2 sandwiched between the facing surfaces of the first internal electrode 6 and the third internal electrode 8, which are laterally adjacent to each other, constitutes a capacitor film (dielectric film). A pair of laterally adjacent first internal electrodes 6 and third internal electrodes 8 and a capacitive film therebetween constitute one first capacitor element.

In addition, between the first internal electrode 6 in the rightmost column of the plurality of internal electrodes 6 and 8 in the first region E1 and the third internal electrode 8 in the third region E3, laterally adjacent The first internal electrode 6 and the third internal electrode 8 have opposing surfaces facing each other in the lateral direction. A wall of the substrate 2 sandwiched between the facing surfaces of the first internal electrode 6 and the third internal electrode 8, which are laterally adjacent to each other, constitutes a capacitor film (dielectric film). A pair of laterally adjacent first internal electrodes 6 and third internal electrodes 8 and a capacitive film therebetween constitute one first capacitor element.

Since the plurality of first internal electrodes 6 are electrically connected to the first external electrode 12 and the plurality of third internal electrodes 8 are electrically connected to the third external electrode 17, all these A first capacitor is obtained with one capacitor element connected in parallel.

On the other hand, in the second region E2, the second internal electrode 7 and the third internal electrode 8, which are vertically adjacent to each other, have opposing surfaces facing each other in the vertical direction. A wall of the substrate 2 sandwiched between the facing surfaces of the second internal electrode 7 and the third internal electrode 8, which are vertically adjacent to each other, constitutes a capacitor film (dielectric film). A pair of vertically adjacent second internal electrodes 7 and third internal electrodes 8 and a capacitive film therebetween constitute one second capacitor element.

Similarly, in the second region E2, the laterally adjacent second internal electrode 7 and third internal electrode 8 have opposing surfaces facing each other in the lateral direction. A wall of the substrate 2 sandwiched between the facing surfaces of the second internal electrode 7 and the third internal electrode 8, which are laterally adjacent to each other, constitutes a capacitor film (dielectric film). A pair of laterally adjacent second internal electrodes 7 and third internal electrodes 8 and a capacitive film therebetween constitute one second capacitor element.

In addition, between the second internal electrode 7 in the leftmost row of the plurality of internal electrodes 7 and 8 in the second region E2 and the third internal electrode 8 in the third region E3, laterally adjacent The second internal electrode 7 and the third internal electrode 8 have opposing surfaces facing each other in the lateral direction. A wall of the substrate 2 sandwiched between the facing surfaces of the second internal electrode 7 and the third internal electrode 8, which are laterally adjacent to each other, constitutes a capacitor film (dielectric film). A pair of laterally adjacent second internal electrodes 7 and third internal electrodes 8 and a capacitive film therebetween constitute one second capacitor element.

Since the plurality of second internal electrodes 7 are electrically connected to the second external electrode 13 and the plurality of third internal electrodes 8 are electrically connected to the third external electrode 17, all these A second capacitor is obtained with two capacitor elements connected in parallel. As a result, it is possible to provide a capacitor in which the first capacitor and the second capacitor are built in, and which can be reduced in size and increased in capacity.

Further, the substrate 2 is formed with a first internal electrode forming through hole 3, a second internal electrode forming through hole 4 and a third internal electrode forming through hole 5, and these internal electrode forming through holes 3, 4, Since the first internal electrode 6, the second internal electrode 7 and the third internal electrode 8 can be formed by embedding the conductor in 5, the manufacturing of the first internal electrode 6, the second internal electrode 7 and the third internal electrode 8 is easy. As a result, it is possible to provide a capacitor that incorporates the first capacitor and the second capacitor and is easy to manufacture.

By adding a structure similar to that of the first region E1 or the second region E2 within the same substrate 2, a capacitor in which three or more capacitors are incorporated can be provided.

6A to 6J are cross-sectional views for explaining an example of the manufacturing process of the capacitor, showing cross-sectional views corresponding to FIG.

First, as shown in FIG. 6A, a base substrate 40 that is the base of the substrate 2 is prepared. The base substrate 40 has a first main surface 40a, a second main surface 40b opposite to the first main surface 40a, and four side surfaces 40c connecting the first main surface 40a and the second main surface 40b. are doing. The original substrate 40 is a silicon substrate. A first internal electrode forming through hole 3, a second internal electrode forming through hole 4 and a third internal electrode forming through hole 5 are formed in the original substrate 40 by, for example, an electrochemical etching method. . These internal electrode forming through holes 3, 4, and 5 may be formed by laser processing, dry etching, or the like.

Next, as shown in FIG. 6B, the entire original substrate 40 is formed into a thermal oxide film by a thermal oxidation method. As a result, the original substrate 40 becomes the substrate 2 made of SiO ₂ . The first main surface 40a of the original substrate 40 is the first main surface 2a of the substrate 2, the second main surface 40b of the original substrate 40 is the second main surface 2b of the substrate 2, and the side surface 40c of the original substrate 40 is the substrate. 2 side 2c.

Next, as shown in FIG. 6C, barrier films are formed on the inner surfaces of the first to third internal electrode forming through holes 3 to 5, the first main surface 2a of the substrate 2, and the second main surface 2b of the substrate 2. Next, as shown in FIG. • A barrier-seed material layer 41, which is the material layer of the seed layers 61, 71, 81, is formed. Specifically, first, a barrier material layer made of TiN, for example, is formed on the inner surfaces of the first to third internal electrode forming through holes 3 to 5, the first main surface 2a and the second main surface 2b. Then, a seed material layer made of Ni, for example, is formed on the barrier material layer. The barrier material layer and the seed material layer are formed by, for example, atomic layer deposition (ALD), chemical vapor deposition (CVD), plating, or the like.

Next, as shown in FIG. 6D, an internal electrode material layer 42, which is a material layer of the internal electrode layers 62, 72, 82, is formed on the barrier/seed material layer 41 by, for example, plating. The internal electrode material layer 42 is, for example, a Ni layer.

Next, as shown in FIG. 6E, the barrier/seed material layer 41 and the internal electrode material layer 42 on the first main surface 2a and the second main surface 2b are removed by, for example, CMP (Chemical Mechanical Polishing). As a result, a structure in which the first internal electrodes 6 composed of the barrier/seed layers 61 and the internal electrode layers 62 are embedded in the through holes 3 for forming the first internal electrodes is obtained. Also, a configuration is obtained in which the second internal electrode 7 composed of the barrier/seed layer 71 and the internal electrode layer 72 is embedded in the through hole 4 for forming the second internal electrode. Also, a structure is obtained in which the third internal electrode 8 composed of the barrier/seed layer 81 and the internal electrode layer 82 is embedded in the through hole 5 for forming the third internal electrode.

Next, as shown in FIG. 6F, on the first main surface 2a of the substrate 2, the first surface electrodes 9 are formed in contact with the upper end surfaces of the first internal electrodes 6, and the second internal electrodes 6 are formed. Second surface electrodes 10 are formed in contact with the upper end surfaces of 7 respectively. The first surface electrode 9 and the second surface electrode 10 are formed by, for example, forming an electrode film, which is a material film of the first surface electrode 9 and the second surface electrode 10, on the first main surface 2a of the substrate 2, followed by photolithography. It is formed by patterning the electrode film by lithography and etching. The first surface electrode 9 and the second surface electrode 10 are made of Ti, for example.

Next, as shown in FIG. 6G, the exposed surface of the first main surface 2a, the first surface electrode 9, the second surface electrode 10, and the like are formed on the first main surface 2a of the substrate 2 by, for example, a sputtering method. A first insulating film 11 is formed to cover the upper end surfaces of the third internal electrodes 8 . The first insulating film 11 may be formed by chemical vapor deposition (CVD). The first insulating film 11 is made of, for example, a _SiO2 film.

Next, as shown in FIG. 6H, the third surface electrodes 15 are formed on the second main surface 2b of the substrate 2 so as to contact the lower end surfaces of the third internal electrodes 8, respectively. The third surface electrode 15 is formed, for example, by forming an electrode film, which is a material film of the third surface electrode 15, on the second main surface 2b of the substrate 2, and then patterning the electrode film by photolithography and etching. be done. The third surface electrode 15 is made of Ti, for example.

Next, as shown in FIG. 6I, the exposed surface of the second main surface 2b, the third surface electrode 15, and the lower portion of the first internal electrode 6 are formed on the second main surface 2b of the substrate 2 by sputtering, for example. A second insulating film 16 is formed to cover the end faces and the lower end faces of the second internal electrodes 7 . The second insulating layer 16 may be formed by chemical vapor deposition. The second insulating film 16 is made of, for example, a _SiO2 film.

Next, as shown in FIG. 6J, by photolithography and etching, the first insulating film 11 is formed with a first contact hole 11a that exposes at least a portion of the upper surface of the first surface electrode 9, and the second surface is exposed. A second contact hole 11b exposing at least a portion of the upper surface of the electrode 10 is formed. Further, by photolithography and etching, the second insulating film 16 is formed with a third contact hole 16a that exposes at least a portion of the lower surface of the third surface electrode 15. As shown in FIG.

Finally, a first external electrode 12 and a second external electrode 13 are formed on the first insulating film 11 by plating, for example, and a third external electrode 17 is formed on the second insulating film 16 by plating, for example. By forming, the capacitor 1 shown in FIGS. 1 to 5 is obtained.

In the above-described embodiment, the first surface electrode 9 contacts the upper end surface of the first internal electrode 6, the second surface electrode 10 contacts the upper end surface of the second internal electrode 7, and the lower end surfaces of the third internal electrode 8 contact. A third surface electrode 15 is provided. However, like the capacitor 1A according to the second embodiment shown in FIG. 7, the first surface electrode 9, the second surface electrode 10 and the third surface electrode 15 may not be provided. FIG. 7 is a cross-sectional view corresponding to FIG. In FIG. 7, the parts corresponding to the parts in FIG. 2 are given the same reference numerals as in FIG.

In the capacitor 1A shown in FIG. 7, the first insulating film 11 includes a first contact hole 11c exposing at least a portion of the upper end surface (first main surface side end) of the first internal electrode 6, and a second contact hole 11c. A second contact hole 11d is formed to expose at least a portion of the upper end surface (end portion on the side of the first main surface) of the internal electrode 7 . A third contact hole 16 b is formed in the second insulating film 16 to expose at least a part of the lower end surface (the end portion on the side of the second main surface) of the third internal electrode 8 .

A portion of the first external electrode 12 enters the first contact hole 11c and is connected to the upper end surface of the first internal electrode 6 within the first contact hole 11c. Thereby, the first external electrode 12 is electrically connected to each first internal electrode 6 .

A portion of the second external electrode 13 enters the second contact hole 11d and is connected to the upper end surface of the second internal electrode 7 within the second contact hole 11d. Thereby, the second external electrodes 13 are electrically connected to the respective second internal electrodes 7 .

A portion of the third external electrode 17 enters the third contact hole 16b and is connected to the upper end surface of the second internal electrode 7 within the third contact hole 16b. Thereby, the third external electrode 17 is electrically connected to each third internal electrode 8 .

A method of manufacturing the capacitor 1A of FIG. 7 will be described. When manufacturing capacitor 1A of FIG. 7, steps similar to those shown in FIGS. 61 to 6E are performed. 6E, as shown in FIG. 8A, the exposed surface of the first main surface 2a, the first internal electrode 6, and the second internal electrode are formed on the first main surface 2a of the substrate 2 by sputtering, for example. A first insulating film 11 is formed to cover the upper end surfaces (ends on the first main surface side) of 7 and third internal electrodes 8 . The first insulating layer 11 may be formed by chemical vapor deposition. The first insulating film 11 is made of, for example, a _SiO2 film.

Next, as shown in FIG. 8B, the exposed surface of the second main surface 2b, the first internal electrode 6, the second internal electrode 7 and the third internal electrode are formed on the second main surface 2b of the substrate 2 by, for example, a sputtering method. A second insulating film 16 is formed to cover the lower end surface of the electrode 8 (end portion on the side of the second main surface). The second insulating layer 16 may be formed by chemical vapor deposition. The second insulating film 16 is made of, for example, a _SiO2 film.

Next, as shown in FIG. 8C, a first contact hole 11c is formed in the first insulating film 11 by photolithography and etching to expose at least a part of the upper end surface of the first internal electrode 6, and a second contact hole 11c is formed. A second contact hole 11d that exposes at least a portion of the upper end surface of the internal electrode 7 is formed. Further, by photolithography and etching, the second insulating film 16 is formed with a third contact hole 16b that exposes at least a portion of the lower end surface of the third internal electrode 8. As shown in FIG.

Finally, a first external electrode 12 and a second external electrode 13 are formed on the first insulating film 11 by plating, for example, and a third external electrode 17 is formed on the second insulating film 16 by plating, for example. By forming, the capacitor 1A shown in FIG. 7 is obtained.

FIG. 9 is a plan view showing a modification in which the first internal electrode forming through holes 3, the second internal electrode forming through holes 4 and the third internal electrode forming through holes 5 are arranged differently. In FIG. 9, parts corresponding to those in FIG. 1 are denoted by the same reference numerals as those in FIG.

Hereinafter, the up-down direction in FIG. 9 is called the vertical direction, and the left-right direction in FIG. 9 is called the horizontal direction. Also, the left side of FIG. 9 may be called "left", the right side of FIG. 9 may be called "right", the upper side of FIG. 9 may be called "rear", and the lower side of FIG. 9 may be called "front".

In FIG. 9, the first insulating film 11, the first surface electrode 9, the second surface electrode 10, the first external electrode 12 and the second external electrode 13 are omitted. However, the first external electrode 12 and the second external electrode 13 are indicated by dashed lines. The first area E1 and the second area E2 are indicated by two-dot chain lines.

In the example of FIG. 9, the first area E1 is set to a rectangular area at the upper left corner of the first main surface 2a of the substrate 2 in plan view. The second area E2 is set to an area of the first main surface 2a that includes the first area E1 and excludes an upper left corner area that is slightly larger than the first area E1 in plan view. The second region E2 has an inverted L shape in which the left and right sides of the L shape are reversed in plan view. A region between the first region E1 and the second region E2 is called a third region E3.

A plurality of first internal electrode forming through holes 3 and a plurality of third internal electrode forming through holes 5 are formed in the first region E1. In the example of FIG. 9, two first internal electrode forming through holes 3 and two third internal electrode forming through holes 5 are formed in the first region E1. A plurality of internal electrode forming through holes 3 and 5, each of which consists of two first internal electrode forming through holes 3 and two third internal electrode forming through holes 5, are arranged in a matrix of two rows and two columns. there is The first internal electrode forming through hole 3 and the third internal electrode forming through hole 5 are arranged adjacent to each other in the horizontal direction and the vertical direction.

A plurality of second internal electrode forming through holes 4 and a plurality of third internal electrode forming through holes 5 are formed in the second region E2. A plurality of internal electrode forming through holes 4 and 5, which are composed of a plurality of second internal electrode forming through holes 4 and a plurality of third internal electrode forming through holes 5, are arranged in a matrix. The second internal electrode forming through-holes 4 and the third internal electrode forming through-holes 5 are arranged alternately in the vertical and horizontal directions.

A plurality of third internal electrode forming through holes 5 are formed in the third region E3. The plurality of third internal electrode forming through holes 5 are aligned with the plurality of third internal electrode forming through holes 5 vertically spaced apart along the right side of the first region E1 in plan view. , and a plurality of through holes 5 for forming third internal electrodes arranged side by side at intervals in the lateral direction along the front side of the first region E1. That is, in the third region E3, a plurality of third internal electrode forming through holes 5 are formed at intervals in the direction in which the third region E3 extends.

a plurality of internal electrode forming through holes 3, 4 each including all first internal electrode forming through holes 3, all second internal electrode forming through holes 4, and all third internal electrode forming through holes 5; , 5 are arranged in a matrix in plan view. In this embodiment, the plurality of internal electrode forming through holes 3, 4, 5 are arranged side by side at predetermined intervals in the vertical and horizontal directions in a plan view.

A first internal electrode 6 is embedded in each first internal electrode forming through hole 3 . A second internal electrode 7 is embedded in each second internal electrode forming through hole 4 . A third internal electrode 8 is embedded in each third internal electrode forming through hole 5 . In FIG. 9, in order to facilitate identification of the first internal electrode 6, the second internal electrode 7, and the third internal electrode 8, the first internal electrode 6 is hatched, and the second internal electrode 7 is cross-hatched. , and the third internal electrodes 8 are indicated by dotted hatching.

The upper end surface of the first internal electrode 6 is electrically connected to the first external electrode 12 , the upper end surface of the second internal electrode 7 is electrically connected to the second external electrode 13 , and the lower end surface of the third internal electrode 8 is electrically connected to the second external electrode 13 . is electrically connected to the third external electrode 18 not shown in FIG.

FIG. 10 is a plan view showing another modification in which the arrangement of the first internal electrode forming through holes 3, the second internal electrode forming through holes 4, and the third internal electrode forming through holes 5 is different. In FIG. 10, parts corresponding to those in FIG. 1 are denoted by the same reference numerals as those in FIG.

Hereinafter, the up-down direction in FIG. 10 is called the vertical direction, and the left-right direction in FIG. 10 is called the horizontal direction. Also, the left side of FIG. 10 may be called "left", the right side of FIG. 10 may be called "right", the upper side of FIG. 10 may be called "rear", and the lower side of FIG. 10 may be called "front".

In FIG. 10, the first insulating film 11, the first surface electrode 9, the second surface electrode 10, the first external electrode 12 and the second external electrode 13 are omitted. However, the first external electrode 12 and the second external electrode 13 are indicated by dashed lines. The first area E1, the second area E2 and the third area E3 are indicated by two-dot chain lines.

In the example of FIG. 10, the first region E1 is set to a rectangular (square) region in the central portion of the first main surface 2a of the substrate 2 in plan view. The second area E2 is set as a peripheral area spaced apart from the first area E1 in plan view. A quadrangular annular area in plan view between the first area E1 and the second area E2 will be referred to as a third area E3.

A plurality of first internal electrode forming through holes 3 and a plurality of third internal electrode forming through holes 5 are formed in the first region E1. In the example of FIG. 10, two first internal electrode forming through holes 3 and two third internal electrode forming through holes 5 are formed in the first region E1. A plurality of internal electrode forming through holes 3 and 5, each of which consists of two first internal electrode forming through holes 3 and two third internal electrode forming through holes 5, are arranged in a matrix of two rows and two columns. there is The first internal electrode forming through hole 3 and the third internal electrode forming through hole 5 are arranged adjacent to each other in the horizontal direction and the vertical direction.

A plurality of second internal electrode forming through holes 4 and a plurality of third internal electrode forming through holes 5 are formed in the second region E2. A plurality of internal electrode forming through holes 4 and 5, which are composed of a plurality of second internal electrode forming through holes 4 and a plurality of third internal electrode forming through holes 5, are arranged in a matrix. The second internal electrode forming through-holes 4 and the third internal electrode forming through-holes 5 are arranged alternately in the vertical and horizontal directions.

A plurality of third internal electrode forming through holes 5 are formed in the third region E3. The plurality of third internal electrode forming through holes 5 are composed of a plurality of third internal electrode forming through holes 5 arranged at intervals so as to surround the first region E1 in plan view. That is, in the third region E3, a plurality of third internal electrode forming through holes 5 are formed at intervals in the direction in which the third region E3 extends.

a plurality of internal electrode forming through holes 3, 4 each including all first internal electrode forming through holes 3, all second internal electrode forming through holes 4, and all third internal electrode forming through holes 5; , 5 are arranged in a matrix in plan view. In this embodiment, the plurality of internal electrode forming through holes 3, 4, 5 are arranged side by side at predetermined intervals in the vertical and horizontal directions in a plan view.

A first internal electrode 6 is embedded in each first internal electrode forming through hole 3 . A second internal electrode 7 is embedded in each second internal electrode forming through hole 4 . A third internal electrode 8 is embedded in each third internal electrode forming through hole 5 . In FIG. 10, in order to facilitate identification of the first internal electrode 6, the second internal electrode 7, and the third internal electrode 8, the first internal electrode 6 is hatched, and the second internal electrode 7 is cross-hatched. , and the third internal electrodes 8 are indicated by dotted hatching.

The upper end surface of the first internal electrode 6 is electrically connected to the first external electrode 12 , the upper end surface of the second internal electrode 7 is electrically connected to the second external electrode 13 , and the lower end surface of the third internal electrode 8 is electrically connected to the second external electrode 13 . is electrically connected to the third external electrode 18 not shown in FIG.

Although the first and second embodiments and modifications according to the present disclosure have been described above, the present disclosure can be implemented in other forms. For example, in the above-described first and second embodiments, the cross-sectional shape of the first internal electrode forming through hole 3, the second internal electrode forming through hole 4, and the third internal electrode forming through hole 5 is square. is. However, the cross-sectional shapes of the first internal electrode forming through hole 3, the second internal electrode forming through hole 4, and the third internal electrode forming through hole 5 are rectangular, trapezoidal, regular hexagonal, circular, A shape other than a square such as an ellipse may be used.

In the above-described embodiment, a plurality of internal electrode forming through holes 3, a plurality of second internal electrode forming through holes 4, and a plurality of third internal electrode forming through holes 5 are formed. The through-holes 3, 4 and 5 are arranged in a matrix, but may be arranged in a staggered manner.

In the above-described embodiment, the plurality of third internal electrode forming through holes 5 are formed in the region between the first region E1 and the second region E2 (the third region E3). The through hole 5 for forming the third internal electrode may not be formed in E3.

The two capacitors built in the capacitors 1 and 1A according to the first and second embodiments are assumed to be a first capacitor C1 and a second capacitor C2. As shown in the electric circuit diagram of FIG. 11, the capacitance may be switched by forming a first switching element SW1 and a second switching element SW2 in the capacitors 1 and 1A. Specifically, one electrode of the first capacitor C1 and one electrode of the second capacitor C2 are electrically connected to the first terminal P1. The other electrode of the first capacitor C1 is connected to the second terminal P2 via the first switching element SW1, and the other electrode of the second capacitor C2 is connected to the second terminal P2 via the second switching element SW2. .

When both the first switching element SW1 and the second switching element SW2 are on, the capacitance of the capacitor is the sum of the capacitance of the first capacitor C1 and the capacitance of the second capacitor C2. When the first switching element SW1 is on and the second switching element SW2 is off, the capacitance of the capacitor is equal to the capacitance of the first capacitor C1. When the first switching element SW1 is off and the second switching element SW2 is on, the capacitance of the capacitor is equal to the capacitance of the second capacitor C2.

Although the embodiments of the present disclosure have been described in detail, these are only specific examples used to clarify the technical content of the present invention, and the present invention should be construed as being limited to these specific examples. should not, the scope of the invention is limited only by the appended claims.

Reference Signs List 1, 1A capacitor 2 substrate 2a first main surface 2b second main surface 3 first internal electrode forming through hole 4 second internal electrode forming through hole 5 third internal electrode forming through hole 6 first internal electrode 61 barrier Seed layer 7 Second internal electrode 71 Barrier/seed layer 8 Third internal electrode 81 Barrier/seed layer 9 First surface electrode 10 Second surface electrode 11 First insulating film 11a, 11c First contact hole 11b, 11d Second second contact hole 12 first external electrode 13 second external electrode 15 third surface electrode 16 second insulating film 16a, 16b third contact hole 17 third external electrode 40 base substrate 40a first main surface 40b second main surface 41 barrier Seed material layer 42 Internal electrode material layer E1 First region E2 Second region E3 Third region

Claims (17)

a substrate having a first main surface on one side and a second main surface on the other side;
a plurality of through holes for forming first internal electrodes formed in a first region of the first main surface and penetrating the substrate in a thickness direction;
a plurality of through holes for forming second internal electrodes formed in a second region different from the first region of the first main surface and penetrating the substrate in a thickness direction;
a plurality of third internal electrode forming through holes formed at least in the first region and in the second region and penetrating the substrate in a thickness direction;
a plurality of first internal electrodes made of conductors embedded in the plurality of through holes for forming the first internal electrodes;
a plurality of second internal electrodes made of conductors embedded in the plurality of second internal electrode forming through holes;
a plurality of third internal electrodes made of conductors embedded in the plurality of through holes for forming the third internal electrodes;
a first external electrode disposed on the first main surface and electrically connected to the plurality of first internal electrodes;
a second external electrode spaced apart from the first external electrode on the first principal surface and electrically connected to the plurality of second internal electrodes;
and a third external electrode disposed on the second main surface and electrically connected to the plurality of third internal electrodes. 2. The plurality of third internal electrode forming through holes includes a plurality of the third internal electrode forming through holes formed in a region between the first region and the second region in plan view. The capacitor described in . In the first region, the plurality of internal electrode-forming through-holes including the plurality of first internal electrode-forming through-holes and the plurality of third internal electrode-forming through-holes are arranged in a matrix in plan view. cage,
In the second region, the plurality of internal electrode forming through holes, which are the plurality of second internal electrode forming through holes and the plurality of third internal electrode forming through holes, are arranged in a matrix in plan view. 3. The capacitor of claim 1 or claim 2, comprising: In the first region, the plurality of first internal electrode forming through holes and the plurality of third internal electrode forming holes are alternately arranged in a first direction along the first main surface in plan view. and alternately arranged in a second direction perpendicular to the first direction along the first main surface,
In the second region, the plurality of second internal electrode forming through holes and the plurality of third internal electrode forming through holes are alternately arranged in the first direction and are arranged in the second direction. 4. The capacitor of claim 3, interleaved. 5. The capacitor according to claim 3, wherein said plurality of third internal electrode forming through holes formed in said intermediate region are spaced apart in a direction in which said intermediate region extends in plan view. a plurality of first surface electrodes formed on the first main surface for each of the first internal electrodes and in contact with ends of the first internal electrodes on the first main surface side;
a plurality of second surface electrodes formed on the first main surface for each of the second internal electrodes and in contact with ends of the second internal electrodes on the first main surface side;
a plurality of third surface electrodes formed on the second main surface for each of the third internal electrodes and in contact with ends of the third internal electrodes on the side of the second main surface;
formed on the first main surface so as to cover end portions of the plurality of first surface electrodes, the plurality of second surface electrodes and the third internal electrodes on the first main surface side; a first insulating film having a first contact hole exposing at least part of the surface and a second contact hole exposing at least part of the surface of the second surface electrode;
formed on the second main surface so as to cover the plurality of third surface electrodes, the second main surface side end portions of the first internal electrodes, and the second main surface side end portions of the second internal electrodes; and a second insulating film having a third contact hole exposing at least part of the surface of the third surface electrode,
The first external electrode is formed on the first insulating film in the first region so as to cover the plurality of first surface electrodes in plan view,
The second external electrode is formed on the first insulating film in the second region so as to cover the plurality of second surface electrodes in plan view,
The third external electrode is formed on the second insulating film so as to cover the plurality of third surface electrodes in a bottom view,
The first external electrode enters the first contact hole and is connected to the first surface electrode within the first contact hole,
the second external electrode enters the second contact hole and is connected to the second surface electrode within the second contact hole,
6. The capacitor according to claim 1, wherein said third external electrode enters said third contact hole and is connected to said third surface electrode within said third contact hole. formed on the first main surface so as to cover end portions of the first internal electrode, the second internal electrode and the third internal electrode on the side of the first main surface; a first insulating film having a first contact hole exposing a surface-side end and a second contact hole exposing the first main-surface-side end of the second internal electrode;
The second main surface of the third internal electrode is formed on the second main surface so as to cover the second main surface side end portions of the first internal electrode, the second internal electrode and the third internal electrode. a second insulating film having a third contact hole exposing the face side end,
The first external electrode is formed on the first insulating film in the first region so as to cover the first main surface side end portions of the plurality of first internal electrodes in plan view,
The second external electrode is formed on the first insulating film in the second region so as to cover the first main surface side end portions of the plurality of second internal electrodes in plan view,
The third external electrode is formed on the second insulating film so as to cover end portions of the plurality of third internal electrodes on the second main surface side in a bottom view,
The first external electrode enters the first contact hole and is connected to the first internal electrode within the first contact hole,
the second external electrode enters the second contact hole and is connected to the second internal electrode within the second contact hole,
6. The capacitor according to claim 1, wherein said third external electrode enters said third contact hole and is connected to said third internal electrode within said third contact hole. 8. The aspect ratio of the first internal electrode forming through hole, the second internal electrode forming through hole, and the third internal electrode forming through hole is 10 or more, according to any one of claims 1 to 7. capacitor. The depth of each of the first internal electrode forming through hole, the second internal electrode forming through hole, and the third internal electrode forming through hole is 100 μm or more, according to any one of claims 1 to 7. capacitor. 10. The maximum width or maximum diameter of the cross section of the first internal electrode forming through hole, the second internal electrode forming through hole, and the third internal electrode forming through hole is 1 μm or more and 10 μm or less. The capacitor described in . 10. The capacitor according to claim 9, wherein an inter-electrode distance of a plurality of internal electrodes including said first internal electrode, second internal electrode and said third internal electrode is 0.3 [mu]m or more and 10 [mu]m or less. A capacitor according to any preceding claim, wherein the conductor comprises Ni or Cu. A substrate having a first main surface on one side and a second main surface on the other side has a plurality of first internal electrode forming through holes penetrating through the substrate in a thickness direction in a first region of the first main surface. forming a plurality of second internal electrode forming through holes penetrating through the substrate in a thickness direction in a second region different from the first region of the first main surface, and forming at least in the first region and a through-hole forming step of forming a plurality of third internal electrode forming through-holes formed in the second region and penetrating the substrate in the thickness direction;
By embedding a conductor in the first electrode-forming through-hole, the second internal electrode-forming through-hole, and the third internal electrode-forming through-hole, forming a first internal electrode, forming a second internal electrode in the second internal electrode forming through hole, and forming a third internal electrode in the third internal electrode forming through hole;
a first external electrode to which the plurality of first internal electrodes are electrically connected; A first and second external electrode forming step for arranging a second external electrode connected to the
a third external electrode forming step of arranging a third external electrode electrically connected to the plurality of third internal electrodes on the second main surface. In the through hole forming step, the plurality of third internal electrode forming through holes are formed within the first region, within the second region, and in a region between the first region and the second region in plan view. 14. The method of manufacturing a capacitor according to claim 13, wherein: In the through-hole forming step,
In the first region, a plurality of internal electrode forming through holes, each of which includes the plurality of first internal electrode forming through holes and the plurality of third internal electrode forming through holes, are arranged in a matrix when viewed from above. formed on the substrate such that
In the second region, a plurality of internal electrode forming through holes, each of which includes the plurality of second internal electrode forming through holes and the plurality of third internal electrode forming through holes, are arranged in a matrix when viewed from above. 15. The method of manufacturing a capacitor according to claim 13 or 14, wherein the capacitor is formed on the substrate in such a manner that The step of forming the first and second external electrodes includes:
a plurality of first surface electrodes formed on the first main surface for each of the first internal electrodes and in contact with ends of the first internal electrodes on the side of the first main surface; forming a plurality of second surface electrodes that are formed and are in contact with the first main surface side end portions of the second internal electrodes;
forming a first insulating layer on the first main surface so as to cover the first surface electrode, the second surface electrode, and the end portion of the third internal electrode on the first main surface side; ,
forming a first contact hole exposing at least part of the surface of the first surface electrode and a second contact hole exposing at least part of the surface of the second surface electrode in the first insulating layer; ,
A first external electrode connected to the first surface electrode through the first contact hole is formed on the first insulating film, and a second external electrode connected to the second surface electrode through the second contact hole is formed on the first insulating film. 2 forming an external electrode on the first insulating film,
The third external electrode forming step includes:
forming, on the second main surface, a plurality of third surface electrodes formed for each of the third internal electrodes and in contact with the end portions of the third internal electrodes on the side of the second main surface;
on the second main surface so as to cover the third surface electrode, the second main surface side end portion of the first internal electrode, and the second main surface side end portion of the second internal electrode forming a second insulating layer;
forming, in the second insulating layer, a third contact hole exposing at least part of the surface of the third surface electrode;
16. The capacitor according to claim 13, further comprising the step of forming a third external electrode connected to said third surface electrode through said third contact hole on said second insulating film. manufacturing method. The step of forming the first and second external electrodes includes:
forming a first insulating layer on the first main surface so as to cover end portions of the first internal electrode, the second internal electrode and the third internal electrode on the first main surface side;
A first contact hole exposing at least part of the first main surface side end of the first internal electrode, and a second contact hole exposing at least part of the first main surface side end of the second internal electrode. forming a contact hole in the first insulating layer;
A first external electrode connected to the first internal electrode through the first contact hole is formed on the first insulating film, and a second external electrode connected to the second internal electrode through the second contact hole is formed on the first insulating film. 2 forming an external electrode on the first insulating film,
The third external electrode forming step includes:
forming a second insulating layer on the second main surface so as to cover end portions of the first internal electrode, the second internal electrode and the third internal electrode on the second main surface side;
forming, in the second insulating layer, a third contact hole exposing at least a portion of the second main surface side end portion of the third internal electrode;
16. The capacitor according to claim 13, further comprising the step of forming on said second insulating film a third external electrode connected to said third internal electrode via said third contact hole. manufacturing method.

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