JP2023029071A - Wafer processing method - Google Patents

Abstract

To provide a wafer processing method capable of removing all desired regions by etching.SOLUTION: A wafer processing method for etching a wafer with a plasma gas includes a mask material coating step 1 for coating the front surface side of a wafer with a mask material serving as a mask, a laser processing step 2 of emitting a laser beam from the front surface side of the wafer after performing the mask material coating step, thereby removing the mask material from a region to be etched on the front surface of the wafer, a mask finishing step 3 of supplying plasma gas onto the surface of the wafer after the laser processing step is performed, thereby removing the mask material remaining in the region to be etched on the surface of the wafer by anisotropic etching for leading gas ion to the wafer side, and an etching step 4 of supplying plasma gas onto the surface of the wafer after the mask finishing step is performed, thereby etching the region to be etched on the surface of the wafer in a depth direction.SELECTED DRAWING: Figure 2

Description

The present invention relates to a wafer processing method.

2. Description of the Related Art Plasma etching is used in processes such as device patterning on a semiconductor substrate such as silicon and dicing for dividing a wafer along streets. Plasma etching is performed by covering the wafer with a mask to protect the areas not to be etched from the etching gas.

Plasma etching for device formation requires a mask with a highly accurate pattern, so a resist layer with a complicated design is formed on the wafer as a mask using an exposure machine or the like. On the other hand, in plasma etching of simple patterns such as plasma dicing and through-holes, a resist layer (water-soluble liquid resin, passivation layer, etc.) is coated, and then the resist layer is partially removed by laser beam ablation. A method may form a mask. In this method, the formed mask is used to deeply etch the streets and desired regions by the so-called Bosch process.

Japanese Patent Application Laid-Open No. 2020-102588

However, the removal of the resist layer by laser beam ablation is likely to cause the material of the resist layer to scatter. There was a problem that it remained like In particular, when the area to be etched is wide, a large amount of mask material remains. In addition, when trying to completely remove the mask material, the laser processing time increases significantly, and the overall processing time becomes very long.

SUMMARY OF THE INVENTION The present invention has been made in view of such problems, and an object thereof is to provide a wafer processing method capable of removing all desired regions by etching.

In order to solve the above-described problems and achieve the object, the wafer processing method of the present invention is a wafer processing method in which a wafer is etched with a plasma gas, and a mask material serving as a mask on the front surface side of the wafer. after performing the mask material coating step, a laser processing step of irradiating a laser beam from the surface side of the wafer to remove the mask material from the area to be etched on the wafer surface; and performing the laser processing step. a mask finishing step of removing the mask material remaining in the etched region of the wafer surface by anisotropic etching in which a plasma gas is supplied to the wafer surface and ions of the gas are drawn toward the wafer; and an etching step of supplying a plasma gas to the surface of the wafer after the mask finishing step, and digging the region to be etched on the surface of the wafer in the depth direction.

In the wafer processing method of the present invention, the etching step may include a Bosch process in which isotropic etching and anisotropic etching are repeated.

Further, in the wafer processing method of the present invention, the wafer may have a functional layer laminated on the back side, and a hole reaching the functional layer on the back side may be formed in the wafer in the etching step.

In the wafer processing method of the present invention, the mask material may contain a water-soluble liquid resin.

In the wafer processing method of the present invention, in the mask finishing step, plasma oxygen gas may be supplied to the front surface side of the wafer to remove the mask material remaining in the region to be etched.

The present invention can etch away all desired areas.

FIG. 1 is a perspective view showing an example of a wafer to be processed by a wafer processing method according to an embodiment. FIG. 2 is a flow chart showing the flow of the wafer processing method according to the embodiment. FIG. 3 is a cross-sectional view schematically showing one state of the mask material coating step shown in FIG. FIG. 4 is an enlarged cross-sectional view of the wafer after the masking material coating step shown in FIG. 2 has been performed. FIG. 5 is a cross-sectional view schematically showing one state of the laser processing step shown in FIG. FIG. 6 is an enlarged cross-sectional view of the wafer after the laser processing step shown in FIG. 2 has been performed. FIG. 7 is a cross-sectional view schematically showing an example of a plasma etching apparatus that performs the mask finishing step and etching step shown in FIG. FIG. 8 is an enlarged cross-sectional view of the wafer during the mask finishing step shown in FIG. FIG. 9 is an enlarged cross-sectional view of the wafer after performing the mask finishing step shown in FIG. FIG. 10 is an enlarged cross-sectional view of the wafer during the first isotropic etch in the etching step shown in FIG. 11 is an enlarged cross-sectional view showing the wafer during the formation of a protective film in the etching step shown in FIG. 2. FIG. FIG. 12 is an enlarged cross-sectional view showing the wafer during anisotropic etching in the etching step shown in FIG. FIG. 13 is a cross-sectional enlarged view showing the wafer during isotropic etching in the etching step shown in FIG. FIG. 14 is an enlarged cross-sectional view of the wafer after the etching step shown in FIG. 2 has been performed.

A form (embodiment) for carrying out the present invention will be described in detail with reference to the drawings. The present invention is not limited by the contents described in the following embodiments. In addition, the components described below include those that can be easily assumed by those skilled in the art and those that are substantially the same. Furthermore, the configurations described below can be combined as appropriate. In addition, various omissions, substitutions, or changes in configuration can be made without departing from the gist of the present invention.

(embodiment)
An embodiment of the present invention will be described based on the drawings. FIG. 1 is a perspective view showing an example of a wafer 10 to be processed by a method for processing a wafer 10 according to an embodiment. The wafer 10 is a wafer such as a disk-shaped semiconductor wafer or an optical device wafer having a substrate 11 made of silicon (Si), sapphire (Al ₂ O ₃ ), gallium arsenide (GaAs), silicon carbide (SiC), or the like. be.

The wafer 10 has a plurality of planned division lines 13 set in a grid pattern on the rear surface 12 of the substrate 11 and devices 14 formed in each area partitioned by the planned division lines 13 . The device 14 is, for example, an integrated circuit such as an IC (Integrated Circuit) or LSI (Large Scale Integration), an image sensor such as a CCD (Charge Coupled Device) or CMOS (Complementary Metal Oxide Semiconductor), or a MEMS (Micro Electro Mechanical Systems). , or a memory (semiconductor memory device) or the like.

A functional layer 15 is laminated on the back surface 12 side of the substrate 11 . The functional layer 15 is a low dielectric constant insulating film (hereinafter referred to as a Low-k film) made of an inorganic film such as SiOF or BSG (SiOB) or an organic film such as a polymer film such as polyimide or parylene. ) and a conductor film made of a conductive metal. The low-k film is laminated with a conductive film to form device 14 . The conductive film constitutes the circuitry of device 14 . For this purpose, the device 14 is composed of Low-k films stacked together and conductor films stacked between the Low-k films. The functional layer 15 of the dividing line 13 is composed of a Low-k film and does not have a conductor film.

The front surface 16 of the wafer 10, which is located on the opposite side of the back surface 12 on which the functional layer 15 is laminated, is thinned by, for example, grinding to a finished thickness using a grinding device, and then divided along the division lines 13 by plasma etching. and singulated into individual device chips. Although the device chip has a square shape, it may have a rectangular shape.

The wafer 10 is supported in the opening of the annular frame 20 by, for example, attaching an annular frame 20 and attaching a protective tape 21 having a larger diameter than the outer diameter of the wafer 10 to the rear surface 12 of the wafer 10 . The annular frame 20 has an opening larger than the outer diameter of the wafer 10 and is made of a material such as metal or resin.

The protective tape 21 protects the device 14 on the back surface 12 side of the wafer 10 held on the chuck table 41 (see FIG. 5) of the laser processing device 40 (see FIG. 5) or the table 74 (see FIG. 7) of the plasma etching device 50 to prevent foreign matter from adhering to the protective tape 21. It protects against damage caused by contact or contact. The protective tape 21 is a disc-shaped tape having a diameter larger than that of the wafer 10 in the embodiment. The protective tape 21 includes, for example, a base layer made of synthetic resin, and an adhesive glue layer laminated on at least one of the front surface and the back surface of the base layer.

FIG. 2 is a flow chart showing the flow of the method for processing the wafer 10 according to the embodiment. The method for processing the wafer 10 includes a mask material coating step 1, a laser processing step 2, a mask finishing step 3, and an etching step 4. FIG.

(Mask material coating step 1)
FIG. 3 is a cross-sectional view schematically showing one state of the mask material coating step 1 shown in FIG. FIG. 4 is an enlarged cross-sectional view of wafer 10 after mask material coating step 1 shown in FIG.

The mask material coating step 1 is a step of coating the front surface 16 side of the wafer 10 with a mask material 35 serving as a mask. The mask material 35 is a water-soluble liquid resin in the embodiment. In the mask material coating step 1 of the embodiment, the surface 16 of the wafer 10 is coated with the mask material 35 by the resin coating device 30 . Resin coating device 30 includes a spin coater in the embodiment. A resin coating device 30 of the embodiment includes a spinner table 31 having a holding surface 32 , a clamping mechanism 33 and a nozzle 34 .

In the mask material covering step 1 , first, the back surface 12 side of the wafer 10 is held by suction on the holding surface 32 of the spinner table 31 via the protective tape 21 , and the outer peripheral portion of the annular frame 20 is fixed by the clamping mechanism 33 . Next, while the spinner table 31 is rotated about its axis, a water-soluble liquid resin, which is the mask material 35 , is dripped onto the surface 16 of the wafer 10 from the nozzle 34 . At this time, the nozzle 34 may reciprocate in the radial direction of the wafer 10 . The dropletized liquid resin flows on the surface 16 of the wafer 10 from the center toward the outer circumference by the centrifugal force generated by the rotation of the spinner table 31, and is applied to the entire surface 16 of the wafer 10. .

The mask material 35 is, for example, a water-soluble liquid resin such as polyvinyl alcohol (PVA) or polyvinylpyrrolidone (PVP). For example, HOGOMAX (registered trademark) manufactured by DISCO Corporation is used as the mask material 35 . In the mask material coating step 1, the mask material 35 applied over the entire surface 16 of the wafer 10 is dried and cured to form a mask layer of the mask material 35 covering the entire surface 16 of the wafer 10. FIG. The surface 16 of the wafer 10 is thereby covered with a masking layer of masking material 35 .

(Laser processing step 2)
FIG. 5 is a cross-sectional view schematically showing one state of laser processing step 2 shown in FIG. FIG. 6 is an enlarged sectional view showing the wafer 10 after the laser processing step 2 shown in FIG. 2 has been performed.

Laser processing step 2 is performed after mask material coating step 1 is performed. The laser processing step 2 is a step of irradiating the laser beam 45 from the front surface 16 side of the wafer 10 to remove the mask material 35 from the area 17 to be etched on the front surface 16 of the wafer 10 . In the laser processing step 2 of the embodiment, the mask material 35 is removed from the etching area 17 of the surface 16 of the wafer 10 by the laser processing device 40 . The laser processing apparatus 40 of the embodiment includes a chuck table 41 having a holding surface 42, a clamping mechanism 43, a laser beam irradiation unit 44, and a moving unit (not shown) that relatively moves the chuck table 41 and the laser beam irradiation unit 44. And prepare.

In laser processing step 2 , first, the rear surface 12 side of the wafer 10 is held by suction on the holding surface 42 of the chuck table 41 via the protective tape 21 , and the outer peripheral portion of the annular frame 20 is fixed by the clamping mechanism 43 . Next, while relatively moving the chuck table 41 and the laser beam irradiation unit 44 along the etching area 17 corresponding to the dividing line 13 , the laser beam 45 is emitted from the laser beam irradiation unit 44 to the etching area of the surface 16 of the wafer 10 . 17 is irradiated. Laser beam 45 is a laser beam of a wavelength that is absorptive to wafer 10 .

The mask material 35 covering the entire surface 16 of the wafer 10 is removed by the laser beam 45 from the areas 17 to be etched corresponding to the dividing lines 13 to expose the substrate 11 . At this time, the remaining mask material 36 remains in the region 17 to be etched because the mask material 35 cannot be completely removed by the laser processing or the mask material 35 is scattered by the laser processing.

(Plasma etching device 50)
FIG. 7 is a cross-sectional view schematically showing an example of a plasma etching apparatus 50 that carries out mask finishing step 3 and etching step 4 shown in FIG. In an embodiment, the plasma etching apparatus 50 shown in FIG. 7 performs mask finishing step 3 and etching step 4 .

The plasma etching apparatus 50 includes a vacuum chamber 60, a lower electrode 70, an upper electrode 80, an opening/closing mechanism 90, an exhaust mechanism 100, a high frequency power source 110, a suction source 120, a refrigerant circulation mechanism 130, and a high frequency power source 140. , a lifting mechanism 150 , a first gas supply source 160 , a second gas supply source 170 , and a control device 180 .

The vacuum chamber 60 is formed in a rectangular parallelepiped shape including a bottom wall 61, a top wall 62, and side walls 63 surrounding four sides, and forms a processing space 64 inside. In the processing space 64, a lower electrode 70 and an upper electrode 80, which will be described later, are arranged so as to face each other. Vacuum chamber 60 includes opening 65 , gate 66 , exhaust port 67 , opening 68 and opening 69 .

An opening 65 is provided in a portion of side wall 63 of vacuum chamber 60 . A wafer 10 can be loaded into and unloaded from the vacuum chamber 60 through an opening 65 . A gate 66 is provided outside the opening 65 . The gate 66 can open and close the opening 65 by moving up and down by an opening and closing mechanism 90 which will be described later.

An exhaust port 67 and an opening 68 are formed in the bottom wall 61 of the vacuum chamber 60 . The exhaust port 67 is connected to an exhaust mechanism 100 which will be described later. A support portion 72 of a lower electrode 70 , which will be described later, is inserted through the opening 68 . An opening 69 is formed in the top wall 62 of the vacuum chamber 60 . A support portion 82 of an upper electrode 80 , which will be described later, is inserted through the opening 69 .

The lower electrode 70 is arranged below the upper electrode 80 so as to face the upper electrode 80 in the processing space 64 of the vacuum chamber 60 . The lower electrode 70 is made of a conductive material. The lower electrode 70 includes a disk-shaped holding portion 71 and a columnar support portion 72 protruding downward from the center of the lower surface of the holding portion 71 . The support portion 72 is inserted through an opening 68 formed in the bottom wall 61 of the vacuum chamber 60 .

The lower electrode 70 is insulated from the vacuum chamber 60 within the opening 68 by an annular insulating member 73 arranged between the bottom wall 61 and the support portion 72 . The lower electrode 70 is connected outside the vacuum chamber 60 to a high-frequency power source 110, which will be described later.

The lower electrode 70 has a recess in which a table 74 is provided on the upper surface of the holding portion 71 . A wafer 10 is placed on the table 74 . Inside the table 74, a suction path (not shown) for sucking the placed wafer 10 and an electrostatic adsorption mechanism (not shown) are formed.

A channel 75 , a cooling channel 76 , a coolant introduction channel 77 , and a coolant discharge channel 78 are formed inside the lower electrode 70 . The flow path 75 is formed inside the holding portion 71 and the support portion 72, and connects the suction path formed from the upper surface of the table 74 toward the inside, and the suction source 120, which will be described later. The cooling channel 76 is formed inside the holding portion 71 . A coolant introduction path 77 and a coolant discharge path 78 are formed inside the support portion 72 . One end of the cooling channel 76 is connected to a coolant circulation mechanism 130 described later through a coolant introduction channel 77 , and the other end is connected to the coolant circulation mechanism 130 through a coolant discharge channel 78 . A coolant flows through the coolant introduction channel 77 , the cooling channel 76 , and the coolant discharge channel 78 .

The upper electrode 80 is arranged above the lower electrode 70 so as to face the lower electrode 70 in the processing space 64 of the vacuum chamber 60 . The upper electrode 80 is made of a conductive material. The upper electrode 80 includes a disk-shaped gas ejection portion 81 and a columnar support portion 82 projecting upward from the center of the upper surface of the gas ejection portion 81 . The support portion 82 is inserted through an opening 69 formed in the upper wall 62 of the vacuum chamber 60 .

The upper electrode 80 is insulated from the vacuum chamber 60 within the opening 69 by an annular insulating member 83 arranged between the upper wall 62 and the support portion 82 . The upper electrode 80 is connected to the high frequency power supply 140 outside the vacuum chamber 60 .

The upper electrode 80 has a support arm 151 attached to the upper end of the support portion 82 and connected to a lifting mechanism 150 to be described later. The upper electrode 80 can be moved up and down by an elevating mechanism 150 and a support arm 151 .

The upper electrode 80 has a plurality of ejection ports 84 on the lower surface of the gas ejection portion 81 . A channel 85 and a channel 86 are formed inside the upper electrode 80 . A flow path 85 is formed in the gas ejection portion 81 . A flow path 86 is formed in the support portion 82 . The ejection port 84 is connected to a first gas supply source 160 and a second gas supply source 170 to be described later through flow paths 85 and 86 . The first gas supply source 160 , the second gas supply source 170 , the flow paths 85 and 86 , and the ejection port 84 constitute a gas introduction section that introduces gas into the vacuum chamber 60 .

The opening/closing mechanism 90, the exhaust mechanism 100, the high-frequency power source 110, the suction source 120, the refrigerant circulation mechanism 130, the high-frequency power source 140, the lifting mechanism 150, the first gas supply source 160, the second gas supply source 170, and the control device 180 are connected to a vacuum. It is provided outside the chamber 60 . In addition, the opening/closing mechanism 90, the exhaust mechanism 100, the high-frequency power source 110, the suction source 120, the refrigerant circulation mechanism 130, the high-frequency power source 140, the lifting mechanism 150, the first gas supply source 160, and the second gas supply source 170 are controlled by the control device 180. It is connected to the.

The opening/closing mechanism 90 includes an air cylinder 91 and a piston rod 92 . Air cylinder 91 is fixed to bottom wall 61 of vacuum chamber 60 via bracket 93 . The tip of the piston rod 92 is connected to the bottom of the gate 66 . The opening/closing mechanism 90 can open/close the gate 66 of the vacuum chamber 60 based on a control signal output from the controller 180 . By opening the gate 66 by the opening/closing mechanism 90 , the wafer 10 can be loaded into the processing space 64 of the vacuum chamber 60 or unloaded from the processing space 64 of the vacuum chamber 60 through the opening 65 . The processing space 64 is sealed by closing the gate 66 by the opening/closing mechanism 90 .

The exhaust mechanism 100 includes, for example, a vacuum pump. The exhaust mechanism 100 is connected to an exhaust port 67 formed in the bottom wall 61 of the vacuum chamber 60 . The exhaust mechanism 100 notifies the control device 180 of information regarding the pressure in the processing space 64 . The exhaust mechanism 100 exhausts the processing space 64 of the vacuum chamber 60 based on a control signal output from the control device 180 .

A high frequency power supply 110 is connected to the lower electrode 70 . High-frequency power supply 110 supplies predetermined high-frequency power to lower electrode 70 based on a control signal output from control device 180 .

The suction source 120 is placed on the upper surface of the table 74 through the channel 75 formed inside the lower electrode 70 and the suction channel formed inside the table 74 by applying a negative pressure. The wafer 10 can be sucked. Thereby, the wafer 10 is fixed on the upper surface of the table 74 .

The coolant circulation mechanism 130 is connected to the coolant introduction path 77 and the coolant discharge path 78 . Coolant circulation mechanism 130 notifies control device 180 of information about the temperature of the coolant, that is, information about the temperature of lower electrode 70 . The refrigerant circulation mechanism 130 circulates the refrigerant through the refrigerant introduction passage 77 , the cooling passage 76 , and the refrigerant discharge passage 78 in this order based on a control signal output from the control device 180 . The coolant cools the lower electrode 70 by circulating through the coolant introduction channel 77 , the cooling channel 76 , and the coolant discharge channel 78 in this order.

A high frequency power supply 140 is connected to the upper electrode 80 . High-frequency power supply 140 supplies predetermined high-frequency power to upper electrode 80 based on a control signal output from control device 180 .

The lifting mechanism 150 can move the upper electrode 80 up and down by moving the support arm 151 up and down based on a control signal output from the control device 180 . For example, when loading the wafer 10 into the processing space 64 of the vacuum chamber 60 , the lifting mechanism 150 lifts the upper electrode 80 . Further, for example, when performing plasma etching, the lifting mechanism 150 lowers the upper electrode 80 so that the lower electrode 70 and the upper electrode 80 have a predetermined positional relationship suitable for plasma etching.

The first gas supply source 160 supplies the etching gas 51 (see FIG. 8, etc.) from the ejection port 84 to the processing space 64 of the vacuum chamber 60 through the flow paths 86 and 85 formed inside the upper electrode 80 . ). Gas 51 is _SF6 gas in an embodiment. The first gas supply source 160 supplies or releases a predetermined amount of gas 51 based on a control signal output from the control device 180 .

The second gas supply source 170 is supplied from the ejection port 84 to the processing space 64 of the vacuum chamber 60 via the flow path 86 and the flow path 85 formed inside the upper electrode 80 and the protective film 54 (see FIG. 11 etc.). A formation gas 53 (see FIG. 11, etc.) is supplied. Gas 53 is _C4F8 gas in _an embodiment. The second gas supply source 170 supplies or releases a predetermined amount of gas 53 based on a control signal output from the control device 180 .

The control device 180 acquires information regarding the pressure in the processing space 64 from the exhaust mechanism 100 . Control device 180 acquires information about the temperature of the coolant (that is, information about the temperature of lower electrode 70 ) from coolant circulation mechanism 130 . The controller 180 acquires information on the flow rate of the gas 51 from the first gas supply source 160 . The controller 180 acquires information on the flow rate of the gas 53 from the second gas supply source 170 . The control device 180 outputs a control signal for controlling each configuration described above based on such information and other information input by the user.

In the plasma etching apparatus 50 , under the control of the control device 180 , the etching gas 51 is supplied from the first gas supply source 160 to the sealed processing space 64 at a predetermined flow rate, and the high-frequency power source 110 applies high-frequency power to the lower electrode 70 . Plasma containing radicals and ions is generated between the lower electrode 70 and the upper electrode 80 by supplying electric power and high-frequency power to the upper electrode 80 from the high-frequency power supply 140 .

(Mask finishing step 3)
FIG. 8 is an enlarged cross-sectional view showing wafer 10 during mask finishing step 3 shown in FIG. FIG. 9 is an enlarged cross-sectional view showing the wafer 10 after performing the mask finishing step 3 shown in FIG.

Mask finishing step 3 shown in FIG. 8 is performed after laser processing step 2 is performed. The mask finishing step 3 is an anisotropic etching in which plasma gas 51 is supplied to the surface 16 of the wafer 10 and ions 52 of the gas 51 are drawn toward the wafer 10 , leaving the etching area 17 on the surface 16 of the wafer 10 . removing the mask material 36;

In the mask finishing step 3, first, in the plasma etching apparatus 50 shown in FIG. 7, the opening/closing mechanism 90 lowers the gate 66 . Also, the upper electrode 80 is raised by the lifting mechanism 150 . Then, the wafer 10 is loaded into the processing space 64 of the vacuum chamber 60 through the opening 65 and placed on the table 74 of the lower electrode 70 . At this time, the wafer 10 is placed on the table 74 so that the front surface 16 side is positioned upward.

Next, the negative pressure of the suction source 120 is applied to fix the wafer 10 on the table 74 . Also, the opening/closing mechanism 90 raises the gate 66 to seal the processing space 64 . Further, the upper electrode 80 is lowered by the lifting mechanism 150 so that the upper electrode 80 and the lower electrode 70 have a predetermined positional relationship suitable for plasma etching. After that, the exhaust mechanism 100 is operated to evacuate the processing space 64 (low pressure). Then, for the wafer 10 which is attracted to the table 74 by negative pressure and is in close contact with the table 74 , the fixing method using the negative pressure is switched to the fixing method by electrostatic adsorption by the electrostatic adsorption mechanism formed inside the table 74 . fixed.

Next, while supplying the _SF6 gas 51 from the first gas supply source 160 to the processing space 64 at a predetermined flow rate, a predetermined high-frequency power is supplied to the lower electrode 70 and the upper electrode 80 to generate a plasma gas. 51 is applied to the surface 16 of the wafer 10 and an anisotropic etch is performed. As a result, as shown in FIG. 8, ions 52 of the gas 51 are drawn toward the wafer 10, etching the etching region 17 of the surface 16 of the wafer 10, and as shown in FIG. The remaining mask material 36 is removed.

In the mask finishing step 3, plasma SF ₆ gas is supplied to the front surface 16 side of the wafer 10 in the embodiment, but in the present invention, plasma oxygen gas is supplied to the front surface 16 side of the wafer 10 for etching. The mask material 36 remaining in the region 17 to be etched may be removed by ashing.

(Etching step 4)
FIG. 10 is an enlarged cross-sectional view of wafer 10 during the first isotropic etch in etching step 4 shown in FIG. FIG. 11 is an enlarged sectional view showing the wafer 10 during the formation of the protective film 54 in the etching step 4 shown in FIG. FIG. 12 is an enlarged cross-sectional view showing the wafer 10 during anisotropic etching in etching step 4 shown in FIG. FIG. 13 is an enlarged cross-sectional view showing the wafer 10 during isotropic etching in etching step 4 shown in FIG. FIG. 14 is an enlarged cross-sectional view of the wafer 10 after etching step 4 shown in FIG.

Etching step 4 is performed after mask finishing step 3 is performed. The etching step 4 is a step of supplying a plasma gas 53 to the surface 16 of the wafer 10 and digging the region 17 to be etched on the surface 16 of the wafer 10 in the depth direction.

In the etching step 4, first, while supplying the _SF6 gas 51 from the first gas supply source 160 to the processing space 64 at a predetermined flow rate, predetermined high frequency power is supplied to the lower electrode 70 and the upper electrode 80, A plasma gas 51 is supplied to the surface 16 of the wafer 10 to perform isotropic etching. This forms recesses 18 in areas to be etched 17 where the remaining masking material 36 has been removed in the anisotropic etching of mask finishing step 3, as shown in FIG.

Next, a protective film 54 is formed on the surfaces of the recesses 18 formed by isotropic etching. Specifically, in the plasma etching apparatus 50 shown in FIG. 7, the C ₄ F ₈ gas 53 is supplied from the second gas supply source 170 to the processing space 64 at a predetermined flow rate, while the lower electrode 70 and the upper electrode 80 are By supplying a predetermined high-frequency power, the plasma gas 53 is supplied to the surface 16 of the wafer 10 to form the protective film 54 . As a result, the gas 53 is drawn toward the wafer 10, and as shown in FIG.

Next, while supplying the _SF6 gas 51 from the first gas supply source 160 to the processing space 64 at a predetermined flow rate, a predetermined high-frequency power is supplied to the lower electrode 70 and the upper electrode 80 to generate a plasma gas. 51 is applied to the surface 16 of the wafer 10 and an anisotropic etch is performed. As a result, the gas 51 is drawn into the wafer 10 side, and as shown in FIG. Of 54, the bottom protective film 54 is removed.

Next, while supplying the _SF6 gas 51 from the first gas supply source 160 to the processing space 64 at a predetermined flow rate, a predetermined high-frequency power is supplied to the lower electrode 70 and the upper electrode 80 to generate a plasma gas. 51 is applied to the surface 16 of the wafer 10 and an isotropic etch is performed. As a result, as shown in FIG. 13, the area not covered by either the mask material 35 or the protective film 54, that is, the bottom surface of the recess 18 formed in the etching area 17 of the wafer 10 is further etched. , the recess 18 is dug in the depth direction.

Thereafter, by repeating the formation of a protective film 54 with a gas 53 of C ₄ F ₈ and the anisotropic etching and isotropic etching with a gas 51 of SF ₆ , the concave portion 18 is dug in the depth direction. As indicated by 14 , a recess 18 reaching the functional layer 15 on the back surface 12 side of the wafer 10 is formed in the wafer 10 . That is, the etching step 4 of the embodiment includes a Bosch process that repeats isotropic etching and anisotropic etching.

The high-frequency power supplied to the lower electrode 70 is higher during anisotropic etching than during protective film formation and during isotropic etching. More specifically, during the anisotropic etching in mask finishing step 3 and the anisotropic etching in etching step 4 shown in FIG. is higher than the high frequency power supplied to the lower electrode 70 during the protective film formation shown in FIG.

The Bosch process typically begins with an isotropic etch after forming a mask with mask material 35 on surface 16 of wafer 10 . On the other hand, in the method for processing the wafer 10 according to the embodiment, anisotropic etching is first performed in the mask finishing step 3 in which the ions 52 are attracted by the lower electrode 70 on the table 74 side.

As a result, by previously removing the mask material 36 scattered and remaining in the laser processing step 2, even if the mask material 35 is not completely removed from the region 17 to be etched in the laser processing step 2, the remaining mask material 36 can be removed. The effect is that all the desired regions can be removed by etching without any influence.

Furthermore, since the mask finishing step 3 removes even the slightly jagged portions of the mask boundary caused by the laser processing in the laser processing step 2, the edges of the etched regions can be smoothed and the wafer 10 formed from the wafer 10. It also has the effect of improving the strength of the device chip that is used.

It should be noted that the present invention is not limited to the above embodiments. That is, various modifications can be made without departing from the gist of the present invention.

For example, in the etching step 4, isotropic etching is first performed in the embodiment, and then the protective film 54 formation, anisotropic etching, and isotropic etching are repeatedly performed in this order. Formation of the protective film 54, anisotropic etching, and isotropic etching may be repeated in order without performing the isotropic etching. That is, the Bosch process may start from the formation of the protective film 54 .

In addition, the method for processing the wafer 10 according to the present invention can be applied not only to etching the dividing lines 13 (street) but also to form recesses (holes, etc.) provided for each device chip like MEMS. .

REFERENCE SIGNS LIST 10 wafer 11 substrate 12 back surface 15 functional layer 16 front surface 17 area to be etched 18 recess (hole)
35 Mask material (liquid resin)
36 remaining mask material 45 laser beam 51 gas

Claims (5)

A wafer processing method for etching a wafer with a plasma gas, comprising:
a mask material coating step of coating the surface side of the wafer with a mask material serving as a mask;
After performing the mask material coating step, a laser processing step of irradiating a laser beam from the front surface side of the wafer to remove the mask material from the area to be etched on the front surface of the wafer;
After the laser processing step is performed, plasma gas is supplied to the surface of the wafer, and the mask material remaining in the etching area on the surface of the wafer is removed by anisotropic etching in which ions of the gas are drawn toward the wafer. a mask finishing step to
After the mask finishing step, an etching step of supplying a plasma gas to the surface of the wafer and digging the region to be etched on the surface of the wafer in the depth direction;
A method of processing a wafer, comprising: the etching step includes a Bosch process that repeats isotropic etching and the anisotropic etching;
The method of processing a wafer according to claim 1 . The wafer has a functional layer laminated on the back side,
the etching step forms a hole in the wafer to the functional layer on the back side;
3. The method of processing a wafer according to claim 1 or 2. The mask material contains a water-soluble liquid resin,
4. The method of processing a wafer according to claim 1, 2 or 3. In the mask finishing step, plasma oxygen gas is supplied to the front surface side of the wafer to remove the mask material remaining in the etching area.
5. The method of processing a wafer according to claim 1, 2, 3 or 4.

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