JP2023015643A5

JP2023015643A5 -

Info

Publication number: JP2023015643A5
Application number: JP2021119551A
Authority: JP
Filing date: 2021-07-20
Publication date: 2023-05-30
Anticipated expiration: 2041-07-20

Description

本発明は、以下の解決手段によって上述の課題を解決する（かっこ書きで、対応する実施形態の構成を示す。）。
本発明（第４及び第８実施形態）は、
電源が投入された場合に電源投入処理（図４１のプログラム開始処理）を実行可能とし、
タイマ割込み処理の周期が到来した場合にタイマ割込み処理（図６６）を実行可能とし、
電源投入処理を構成するプログラムとして、特定のジャンプ先（「００５０Ｈ」）にジャンプするジャンプ命令を有し、
前記特定のジャンプ先には、電源投入処理を構成するプログラム（「００００Ｈ」の続きのプログラム）が記憶されており、
前記ジャンプ命令が記憶されているアドレス（「０００１Ｈ」）と、前記特定のジャンプ先のアドレスとの間（ベクタアドレスである「０００４Ｈ」）には、タイマ割込み処理の開始アドレス（「１１３４Ｈ」）が記憶されており、
割込み禁止期間中にタイマ割込み処理の周期が１回到来した場合には、割込み禁止期間が終了した後にタイマ割込み処理を１回実行可能とし、
割込み禁止期間中にタイマ割込み処理の周期が「ｎ」（「ｎ」は、「２」以上の数値）回到来した場合であっても、割込み禁止期間が終了した後にタイマ割込み処理を１回実行可能とする（図６９）
ことを特徴とする。 The present invention solves the above-described problems by the following solutions (the structure of the corresponding embodiment is shown in parentheses).
The present invention ( fourth and eighth embodiments) is
When power is turned on, power-on processing (program start processing in FIG. 41) can be executed,
When the cycle of timer interrupt processing arrives, timer interrupt processing (FIG. 66) can be executed,
A program constituting power-on processing has a jump instruction to jump to a specific jump destination ("0050H"),
A program (a program following "0000H") that constitutes power-on processing is stored in the specific jump destination,
Between the address (“0001H”) where the jump instruction is stored and the address of the specific jump destination (“0004H” which is a vector address), there is a start address (“1134H”) for timer interrupt processing. is remembered,
When one timer interrupt processing cycle arrives during the interrupt disabled period, the timer interrupt processing can be executed once after the interrupt disabled period ends,
Even if the cycle of timer interrupt processing reaches "n"("n" is a numerical value of "2" or more) during the interrupt disabled period, timer interrupt processing is executed once after the interrupt disabled period ends. Enable (Fig. 69)
It is characterized by

Claims

When the power is turned on, the power-on process can be executed,
Enable execution of timer interrupt processing when the period for timer interrupt processing arrives,
A program constituting power-on processing has a jump instruction for jumping to a specific jump destination,
A program that configures power-on processing is stored in the specific jump destination,
between the address where the jump instruction is stored and the address of the specific jump destination, a start address for timer interrupt processing is stored;
When one timer interrupt processing cycle arrives during the interrupt disabled period, the timer interrupt processing can be executed once after the interrupt disabled period ends,
Even if the cycle of timer interrupt processing reaches "n"("n" is a numerical value of "2" or more) during the interrupt disabled period, timer interrupt processing is executed once after the interrupt disabled period ends. A gaming machine characterized by enabling