JP2023007836A - Method for simulating warpage of semiconductor device, method for sorting sealing resin material, and method for manufacturing semiconductor device - Google Patents

Abstract

To provide a method of simulating warpage of a semiconductor device for controlling warpage of a semiconductor device sealed with a sealing resin material at an arbitrary temperature.SOLUTION: A method of simulating the warpage of a semiconductor device when the semiconductor device is fabricated by sealing a laminate in which a semiconductor chip is mounted on a substrate with a sealing resin material includes the steps of obtaining various types of information about volume fraction of an inorganic filler in the encapsulating resin material, the gel time of the encapsulating resin material, the curing shrinkage rate of the encapsulating resin material, and the glass transition temperature of the encapsulating resin material, and inputting the obtained various types of information into the following formula (1) and calculating the warpage (Y) of the semiconductor device due to the sealing resin material. The warpage (Y)=term of volume fraction of inorganic filler+term of gel time+term of cure shrinkage+term of glass transition temperature+term of temperature (1).SELECTED DRAWING: Figure 4

Description

The present disclosure relates to a method for simulating warpage of a semiconductor device, a method for selecting a sealing resin material, and a method for manufacturing a semiconductor device.

In recent years, semiconductor devices, such as semiconductor packages, have been required to have more pins as electronic devices have become smaller and more sophisticated, as well as smaller package sizes, lighter weights, and higher densities. It is becoming difficult to deal with the used pin insertion type DIP (Dual In-line Package) and peripheral terminal type QFP (Quad Flat Package). Therefore, semiconductor packages are shifting to BGA (Ball Grid Array), CSP (Chip Size Package), MCM (Multi Chip Module), etc., which are surface mount packages using wire bonding technology. Such semiconductor packages are becoming smaller and thinner, and warping during component mounting or package assembly has become a problem.

Generally, warping occurs in a semiconductor package due to differences in physical properties of members such as a chip, a substrate, and a sealing material that constitute the semiconductor package due to heating during soldering. An increase in warpage due to the thinning of semiconductor packages may cause the electrical connections of electronic devices to become unstable. Warp control is required for various members constituting a semiconductor package. Patent Literature 1 discloses a method of temporarily fixing a warp correction substrate to the surface of a sealing material of a semiconductor package, reflow-mounting the semiconductor package, and then removing the warp correction substrate in order to suppress warpage. Patent Document 2 discloses a method of laminating a first resin film layer containing a filler and a second resin film layer having a filler content lower than that of the first resin film layer to reduce the amount of warpage deformation. ing.

JP 2016-072254 A JP 2016-012713 A

It is also possible to suppress the warpage of the semiconductor package by the method of reducing the deformation amount of warpage disclosed in Patent Documents 1 and 2. However, it is desired to drastically suppress the warp of the semiconductor package (semiconductor device) at any temperature. On the other hand, it is also desired that the semiconductor device exhibits the same warpage behavior as that of the connecting portion such as the mother board at an arbitrary temperature.

The present disclosure provides, as one aspect, a method for simulating warpage of a semiconductor device, a method for selecting a sealing resin material, and a method for controlling warpage of a semiconductor device sealed with a sealing resin material at an arbitrary temperature. An object of the present invention is to provide a method of manufacturing a semiconductor device.

One aspect of the present disclosure relates to a method of simulating warping of a semiconductor device at an arbitrary temperature when manufacturing a semiconductor device by sealing a laminate in which a semiconductor chip is mounted on a substrate with a sealing resin material. This method of simulating the warpage of a semiconductor device is based on various factors such as the volume ratio of the inorganic filler in the encapsulating resin material, the gel time of the encapsulating resin material, the cure shrinkage rate of the encapsulating resin material, and the glass transition temperature of the encapsulating resin material. The method includes a step of acquiring information, and a step of inputting the acquired various information into the following formula (1) and calculating the warp (Y) of the semiconductor device due to the encapsulating resin material.
Warp (Y) = volume ratio term of inorganic filler + gel time term + cure shrinkage term + glass transition temperature term + temperature term (1)

In this semiconductor device warpage simulation method, the volume ratio of the inorganic filler in the encapsulating resin material, the gel time of the encapsulating resin material, the curing shrinkage rate of the encapsulating resin material, and the encapsulating resin The warpage of the semiconductor device manufactured by being sealed with the sealing resin material is calculated by summing the term of the glass transition temperature of the material. According to the findings of the present inventors, the actual warpage of the semiconductor device can be calculated by calculating the warpage of the semiconductor device based on the above-mentioned four factors in the sealing resin material, which greatly affects the warpage of the semiconductor device at an arbitrary temperature. It has been found that warpage can be accurately predicted when the sealing resin is applied to a semiconductor device. Therefore, by obtaining various information such as the volume ratio of the inorganic filler in the encapsulating resin material, the gel time, the curing shrinkage rate, and the glass transition temperature, and inputting these into the formula (1), the encapsulating resin material Warpage of the sealed semiconductor device can be predicted with high accuracy. As a result, according to this simulation method, it is possible to control the warpage of the semiconductor device sealed with the sealing resin material at an arbitrary temperature.

As another aspect, the present disclosure provides a sealing resin material for manufacturing a semiconductor device by sealing a laminate in which a semiconductor chip is mounted on a substrate with a sealing resin material, from among a plurality of types of sealing resin materials. It relates to a method of sorting. This encapsulating resin material selection method includes a step of acquiring various information on the volume ratio of the inorganic filler, the gel time, the curing shrinkage rate, and the glass transition temperature for each of a plurality of types of encapsulating resin materials; For each of the encapsulation resin materials, a step of inputting the acquired various information into the following formula (1), calculating the warp (Y) of the semiconductor device at 30 ° C. due to each encapsulation resin material, selecting a sealing resin material having a calculated warp (Y) of (Y)−30 μm or more and (Y)+30 μm or less from among the sealing resin materials.
Warp (Y) = volume ratio term of inorganic filler + gel time term + cure shrinkage term + glass transition temperature term + temperature term (1)

In this sealing resin material selection method, in a plurality of types of sealing resin materials, the term of the volume ratio of the inorganic filler in each sealing resin material, the term of the gel time of each sealing resin material, and the term of each sealing resin By summing the term of curing shrinkage rate of the material and the term of the glass transition temperature of each encapsulating resin material, the semiconductor device manufactured by encapsulating with each encapsulating resin material at an arbitrary temperature. is calculated, and the encapsulating resin material having the predicted warpage within a predetermined range is selected. As described above, the prediction of the warpage of the semiconductor device based on the formula (1) is highly accurate, and by using such a selection method, the warpage of the semiconductor device sealed with the sealing resin material can be controlled. becomes possible.

In the method for selecting the encapsulating resin material described above, in the obtaining step, at least one of the volume ratio of the inorganic filler, the gel time, the cure shrinkage, and the glass transition temperature is determined for each of the plurality of types of encapsulating resin materials. You may acquire as various information by measuring. In this case, it is possible to more accurately obtain the values of the factors described above for each encapsulating resin material, and it is possible to more accurately predict the warpage of the semiconductor device at an arbitrary temperature. As a result, according to this sorting method, it is possible to further control the warpage of the semiconductor device sealed with the sealing resin material.

In the method for selecting the encapsulating resin material described above, the encapsulating resin material for encapsulating the laminate may have a thickness of 450 μm or less, and the semiconductor device encapsulated with the encapsulating resin material may have a thickness of 650 μm or less. may be In this case, the predicted value of the warpage of the semiconductor device according to the above equation (1) can be brought closer to the measured value. In this case, the thickness of the substrate constituting the laminate may be 200 μm or less, and the total thickness of the semiconductor chips in the laminate may be 300 μm or less.

The present disclosure, as still another aspect, relates to a method for manufacturing a semiconductor device. This method of manufacturing a semiconductor device includes the steps of preparing a sealing resin material based on any of the selection methods described above, sealing a laminate in which a semiconductor chip is mounted on a substrate with the sealing resin material, Prepare. In this case, since the semiconductor device is manufactured by encapsulating with a sealing resin material whose warpage is predicted in advance, a semiconductor device in which warpage is controlled can be obtained. In this manufacturing method, the molding temperature in the step of sealing the laminate may be 110.degree. C. to 200.degree.

The present disclosure, as still another aspect, relates to a sealing resin material. This sealing resin material is a sealing resin material based on any of the screening methods described above. Further, the sealing resin material may be a sealing resin material containing at least a resin, a curing agent, a curing accelerator, and an inorganic filler. The warp (Y) represented by the following formula (1) based on the volume ratio, the gel time of the encapsulating resin material, the cure shrinkage rate of the encapsulating resin material, and the glass transition temperature of the encapsulating resin material is -30 μm or more. and may be 30 μm or less.
Warp (Y) = volume ratio term of inorganic filler + gel time term + cure shrinkage term + glass transition temperature term + temperature term (1)
In this case, it is possible to provide a sealing resin material that can control the warpage of the semiconductor device at any temperature. The resin contained in the encapsulating resin material may be, for example, an epoxy resin, and the encapsulating resin material may be an epoxy resin composition.

According to the present disclosure, it is possible to control the warpage of a semiconductor device sealed with a sealing resin material at an arbitrary temperature.

FIG. 1 is a cross-sectional view showing part of a laminate prepared in a laminate preparation step. FIG. 2 is a cross-sectional view of a chip with an adhesive layer used for manufacturing the laminate shown in FIG. FIG. 3 is a cross-sectional view showing a step of mounting a chip with an adhesive layer on a substrate and preparing a laminate. FIG. 4 is a cross-sectional view showing part of a sealing resin laminate obtained by sealing the laminate shown in FIG. 1 with a sealing resin. FIG. 5 is a cross-sectional view showing a step of cutting the resin-sealed laminated body into a plurality of pieces and singulating them.

A semiconductor device warpage simulation method, a sealing resin material selection method, and a semiconductor device manufacturing method according to an embodiment of the present disclosure will be described below with reference to the drawings. In the following description, the same or corresponding parts are denoted by the same reference numerals, and overlapping descriptions are omitted. In addition, unless otherwise specified, positional relationships such as up, down, left, and right are based on the positional relationships shown in the drawings. Furthermore, the dimensional ratios of the drawings are not limited to the illustrated ratios. Note that the present disclosure is not limited to the following embodiments. In the following embodiments, the constituent elements (including element steps and the like) are not essential unless otherwise specified. The same applies to numerical values and their ranges, which do not limit the present disclosure.

In the present disclosure, the term "process" includes a process that is independent of other processes, and even if the purpose of the process is achieved even if it cannot be clearly distinguished from other processes. . Also, in the present disclosure, the numerical range indicated using "-" includes the numerical values before and after "-" as the minimum and maximum values, respectively. In the numerical ranges described step by step in the present disclosure, the upper limit or lower limit of one numerical range may be replaced with the upper or lower limit of another numerical range described step by step. . Moreover, in the numerical ranges described in the present disclosure, the upper or lower limits of the numerical ranges may be replaced with the values shown in the examples.

In the present disclosure, each component may contain multiple types of applicable substances. When there are multiple types of substances corresponding to each component in the composition, the content rate or content of each component is the total content rate or content of the multiple types of substances present in the composition unless otherwise specified. means quantity. Particles corresponding to each component in the present disclosure may include a plurality of types. When multiple types of particles corresponding to each component are present in the composition, the particle size of each component means a value for a mixture of the multiple types of particles present in the composition, unless otherwise specified.

In the present disclosure, the term "layer" includes not only the case where the layer is formed in the entire region when observing the region where the layer exists, but also the case where it is formed only in part of the region. included. In addition, in the present disclosure, the term “laminate” indicates stacking layers, and two or more layers may be combined, or two or more layers may be detachable.

When embodiments are described in the present disclosure with reference to drawings, the configurations of the embodiments are not limited to the configurations shown in the drawings. In addition, the sizes of the members in each drawing are conceptual, and the relative relationship between the sizes of the members is not limited to this.

[Method for manufacturing a semiconductor device]
First, a method for manufacturing a semiconductor device to be subjected to a warpage simulation method according to an embodiment of the present disclosure will be described. This method of manufacturing a semiconductor device includes a step of preparing a laminate in which a semiconductor chip is arranged on a substrate (hereinafter also referred to as a "laminate preparation step"), and after placing the laminate in a mold, an epoxy resin composition is applied. a step of resin-sealing the laminate with a (sealing resin material) (hereinafter also referred to as a “resin sealing step”).

The method for manufacturing a semiconductor device described above may further include other steps, if necessary. Other steps include, for example, a step of curing the resin-sealed laminate, which is a laminate that has been resin-sealed in a resin-sealing step, by heat treatment (hereinafter also referred to as a “post-curing step”); A step of singulating (hereinafter also referred to as a “singulating step”) and the like can be mentioned. Further, when the laminate includes an adhesive layer (such as when a chip with an adhesive layer, which will be described later, is used as the semiconductor chip), the method for manufacturing the semiconductor device may include, as another step, a step of curing the adhesive layer by heat treatment ( hereinafter also referred to as “adhesion layer heat treatment step”).

[Laminate preparation step]
In the stacked body preparation step, a stacked body having one or more semiconductor chips arranged on a substrate is prepared. This laminate has at least a semiconductor chip and a substrate, and may further have other layers, other members, etc., if necessary. As the semiconductor chip, a semiconductor chip having an adhesive layer on at least one surface of the semiconductor chip body (hereinafter also referred to as "chip with adhesive layer") may be used.

FIG. 1 is a cross-sectional view showing a part of the laminate prepared in the laminate preparation process, and FIG. 2 is a cross-sectional view of a chip with an adhesive layer used for manufacturing the laminate. As shown in FIG. 1, the laminate 10 has a substrate 2 and a chip 3 with an adhesive layer provided on one surface of the substrate 2 . As shown in FIG. 2 , the chip 3 with an adhesive layer has a semiconductor chip body 5 and an adhesive layer 6 provided on one surface of the semiconductor chip body 5 . In the laminate 10 shown in FIG. 1, a plurality of chips 3 with adhesive layers are laminated in the thickness direction of the substrate 2 and arranged in the surface direction of the substrate 2 . In the laminate 10 in which a plurality of chips 3 with adhesive layers are stacked, the adhesive layers 6 of some of the chips 3 with adhesive layers are in contact with the substrate 2, and the remaining chips 3 with adhesive layers are in contact with the substrate 2. is in contact with the semiconductor chip body 5 of the chip 3 with an adhesive layer placed on the substrate 2 .

In the laminated body 10 shown in FIG. 1, two chips 3 with adhesive layers are laminated in the thickness direction of the substrate 2, but the present invention is not limited to this, and may be one or three or more. The number of semiconductor chip bodies 5 stacked in the thickness direction of the substrate 2 is, for example, 1 to 4, preferably 1 to 2. In the laminate 10 shown in FIG. 1, the chip 3 with an adhesive layer having the adhesive layer 6 provided on one surface of the semiconductor chip body 5 is used. A chip with an adhesive layer provided with an adhesive layer 6 may be used, or a semiconductor chip body 5 without an adhesive layer 6 may be used as it is. Although the laminate 10 shown in FIG. 1 has the chip 3 with an adhesive layer provided on one surface of the substrate 2 , the present invention is not limited to this, and the semiconductor chips may be provided on both surfaces of the substrate 2 .

The laminate may further include a member other than the semiconductor chip. Examples of members other than the semiconductor chip include solder balls and wiring wires. The laminate may be a laminate in which a substrate and a semiconductor chip are connected by wires (for example, a wire-bonding laminate) or a flip-chip mounted laminate, and solder balls may be formed on the substrate. It may be a laminate (for example, a laminate for capillary underfill (CUF) or mold underfill (MUF)) provided with a semiconductor chip via.

[Semiconductor chip]
The semiconductor chip body of the semiconductor chip (such as the semiconductor chip body 5 shown in FIG. 2) is not particularly limited, but may be, for example, a silicon chip, an electronic component for mounting, or the like. The thickness of each semiconductor chip body is, for example, 250 μm or less, preferably 20 μm to 250 μm, more preferably 20 μm to 100 μm, even more preferably 20 μm to 70 μm.

When a chip with an adhesive layer (the chip with an adhesive layer 3 shown in FIG. 2, etc.) is used as the semiconductor chip, the adhesive layer (the adhesive layer 6, etc. shown in FIG. 2) is, for example, an adhesive layer containing a thermosetting component. The adhesive layer containing a thermosetting component is not particularly limited as long as it has a component that is cured by heat. ) may be a layer containing. The thickness of the adhesive layer is, for example, 100 μm or less, preferably 5 μm to 100 μm, more preferably 5 μm to 80 μm, even more preferably 5 μm to 60 μm. The thickness of each adhesive layer-attached chip is, for example, 255 μm or less, preferably 25 μm to 255 μm, more preferably 25 μm to 150 μm, and even more preferably 25 μm to 80 μm.

The total thickness of the semiconductor chips in the laminate is, for example, 300 μm or less, preferably 25 μm to 300 μm, more preferably 25 μm to 250 μm, even more preferably 25 μm to 200 μm. Here, "the total thickness of the semiconductor chips in the laminate" means the total thickness of the semiconductor chips in the thickness direction of the substrate. In other words, when only one layer of semiconductor chips is provided in the thickness direction of the substrate, it means the thickness of the semiconductor chip in one layer. It means the total thickness of the semiconductor chips stacked on top of each other. In addition, when a chip with an adhesive layer is used as the semiconductor chip, the "total thickness of the semiconductor chip" is the thickness including the adhesive layer (that is, the thickness of the semiconductor chip body and the thickness of the adhesive layer). total).

[substrate]
The substrate is not particularly limited, but examples thereof include a coreless substrate, an organic substrate such as a glass epoxy substrate, a lead frame, and the like. Also, the substrate may have wiring. The thickness of the substrate is, for example, 200 μm or less, preferably 50 μm to 200 μm, more preferably 50 to 150 μm, even more preferably 50 μm to 100 μm.

[Production of laminate]
The laminate 10 shown in FIG. 1 is manufactured, for example, as follows. First, as shown in FIG. 3, the adhesive layer-equipped chip 3 having the adhesive layer 6 containing a thermosetting component on one surface of the semiconductor chip body 5 is mounted (arranged) on the substrate 2 . Then, the semiconductor chip body 5 and the substrate 2 are heat-pressed together with the adhesive layer 6 interposed therebetween to obtain the laminated body 10 . When manufacturing a laminate 10 in which a plurality of chips 3 with adhesive layers are laminated in the thickness direction of a substrate 2 like the laminate 10 shown in FIG. Thermocompression bonding may be performed, or the step of mounting one more chip 3 with an adhesive layer and performing thermocompression bonding may be repeated. When a laminate is obtained by mounting a chip with an adhesive layer on a substrate, the temperature of thermocompression bonding during mounting (hereinafter also referred to as "mounting temperature") is, for example, 60.degree. C. to 150.degree. If the mounting temperature is 60° C. or higher, good adhesion between the semiconductor chip body and the substrate can be ensured. On the other hand, if the mounting temperature is 150° C. or lower, excessive bleeding out of the adhesive layer during pressure bonding can be suppressed. From this point of view, the mounting temperature is more preferably 70.degree. C. to 140.degree. C., and even more preferably 80.degree.

[Adhesion layer heat treatment step]
The adhesive layer heat treatment step is a step that is performed as necessary when a chip with an adhesive layer is used. When a chip with an adhesive layer is used, it is preferable to heat the adhesive layer in the laminate to a semi-cured state or a cured state. The temperature in the adhesive layer heat treatment step is, for example, 100.degree. C. to 200.degree. The temperature in the adhesive layer heat treatment step is preferably 110° C. to 130° C. from the viewpoint of curability. In the adhesive layer heat treatment step, the laminate may be placed under a pressurized environment during heating from the viewpoint of removing air bubbles between the substrate and the adhesive layer. When the adhesive layer is in a semi-cured state, the adhesive layer is further cured in the next step (resin encapsulation step, post-curing step, etc.) to be in a cured state.

The adhesive layer heat treatment step is performed, for example, by heating the laminate obtained in the laminate preparation step, thereby curing or semi-curing the adhesive layer in the adhesive layer attached chip. For example, an oven such as a commercially available clean oven can be used for raising the temperature and keeping the heat in the adhesive layer heat treatment step. The temperature and time for temperature rise and heat retention in the adhesive layer heat treatment step are not particularly limited as long as the adhesive layer can be cured or semi-cured. The temperature is raised in the adhesive layer heat treatment step, for example, it is preferable to raise the temperature to a temperature of 80 ° C. to 200 ° C. over 10 minutes to 1 hour, and to a temperature of 100 ° C. to 150 ° C. over 20 minutes to 50 minutes. It is more preferable to raise the temperature. Heat retention in the adhesive layer heat treatment step is preferably curing at 100° C. to 200° C. for 10 minutes to 120 minutes, more preferably curing at 100° C. to 150° C. for 50 minutes to 90 minutes.

[Resin sealing process]
The resin sealing step is performed at least after the laminate preparation step (if the adhesive layer heat treatment step is performed as necessary, after the adhesive layer heat treatment step). In the resin encapsulation step, the laminate is placed in a mold and then resin-encapsulated using an epoxy resin composition. Specifically, for example, an epoxy resin composition, which is a sealing resin material, is put into a mold in which a laminate is placed, and compression molding (that is, compression molding) is performed while reducing the pressure in the mold. conduct. Transfer molding may be performed instead of compression molding.

Through the resin sealing step, a resin-sealed laminate having a sealing resin layer formed on the laminate is obtained. FIG. 4 shows an example of the resin-sealed laminate obtained by the resin-sealing process. FIG. 4 is a schematic cross-sectional view showing a part of a resin-sealed laminate 20 obtained by sealing the laminate 10 with a sealing resin. A resin-sealed laminate 20 shown in FIG. 4 includes a laminate 10 having a substrate 2 and a plurality of chips 3 with an adhesive layer, and a sealing resin formed on the side of the substrate 2 on which the chips 3 with an adhesive layer are provided. a layer 4; In the resin-sealed laminate 20 , a plurality of chips 3 with adhesive layers are fixed to the substrate 2 by the sealing resin layer 4 .

Next, the epoxy resin composition used in the resin sealing process will be described. The epoxy resin composition used here is a resin composition that is selected as a sealing resin material that suppresses warpage by a simulation method for predicting warpage of a semiconductor device, which will be described later. It can be realized by appropriately adjusting the configuration shown.

[Epoxy resin composition]
As the epoxy resin composition used in the encapsulating resin step, for example, powder in the form of granules (cylindrical granules, etc.), powder, or the like is prepared. The epoxy resin composition should contain at least an epoxy resin, and if necessary, may contain a curing agent, a coupling agent, a curing accelerator, a filler, a coloring agent, and other additives. The composition of the epoxy resin composition is appropriately prepared according to the characteristics required for the semiconductor device to be manufactured.

(Epoxy resin)
The epoxy resin composition contains an epoxy resin. The epoxy resin used here is preferably a compound having two or more epoxy groups. The epoxy resins used here are those generally used in epoxy resin compositions and are not limited. . Epoxy resins are obtained, for example, by condensation or co-condensation of phenols such as phenol, cresol, bisphenol, biphenol, thiodiphenol, aminophenol, and naphthol with compounds having an aldehyde group such as formaldehyde and acetaldehyde. copolymer type epoxy resin, diphenylmethane type epoxy resin, biphenyl type epoxy resin, stilbene type epoxy resin, sulfur atom-containing epoxy resin, alcohol glycidyl ether epoxy resin, glycidyl ester type Epoxy resins, glycidylamine type epoxy resins, dicyclopentadiene type epoxy resins, alicyclic type epoxy resins, naphthalene type epoxy resins, halogenated phenol novolak type epoxy resins, hydroquinone type epoxy resins, trimethylolpropane type epoxy resins, linear fats A group epoxy resin, an aralkyl type epoxy resin, or the like may also be used. As the epoxy resin, one of these may be used alone, or two or more thereof may be used in combination.

Among the epoxy resins described above, from the viewpoint of compatibility between fluidity and curability, the epoxy resin contains a biphenyl-type epoxy resin that is a diglycidyl ether of alkyl-substituted, aromatic-ring-substituted, or unsubstituted biphenol. is preferred. The epoxy resin preferably contains a novolac type epoxy resin from the viewpoint of curability, and is selected from the group consisting of naphthalene type epoxy resins and triphenylmethane type epoxy resins from the viewpoint of heat resistance and low warpage. preferably contains at least one of From the viewpoint of flame retardancy, the epoxy resin preferably contains an aralkyl epoxy resin.

(curing agent)
The epoxy resin composition may contain a curing agent. The curing agent used here is one commonly used in epoxy resin compositions and is not limited. A compound having an aldehyde group such as acetaldehyde, a novolak-type phenolic resin obtained by condensation or co-condensation; a phenol aralkyl resin synthesized from phenols and dimethoxyparaxylene or bis(methoxymethyl)biphenyl; Aralkyl-type phenol resins such as aralkyl resins; copolymerization-type phenol aralkyl resins in which phenol novolak structures and phenol aralkyl structures are randomly, block, or alternately repeated; cyclopentadiene-modified phenol resins; polycyclic aromatic ring-modified phenol resins; biphenyl type phenolic resin; triphenylmethane type phenolic resin; and the like. As the curing agent, one of these may be used alone, or two or more thereof may be used in combination.

(coupling agent)
The epoxy resin composition may contain a coupling agent. The coupling agent used here may be, for example, a silane compound (ie, a silane coupling agent). A silane compound is an organic compound containing a silicon atom, and specifically includes various silane compounds such as epoxysilane, mercaptosilane, aminosilane, alkylsilane, ureidosilane, and vinylsilane. As the silane compound, one of these may be used alone, or two or more thereof may be used in combination. As a coupling agent, titanates, aluminum chelates, etc. may be used in addition to or instead of the silane compound. As the coupling agent, one of these may be used alone, or two or more thereof may be used in combination.

(Curing accelerator)
The epoxy resin composition may contain a curing accelerator. The curing accelerator used here is generally used in epoxy resin compositions for encapsulation and is not particularly limited. Cycloamidine compounds such as amino-1,8-diazabicyclo[5.4.0]undecene-7, tertiary amines such as tris(dimethylaminomethyl)phenol and their derivatives, 2-phenyl-4-methylimidazole, etc. imidazoles and derivatives thereof, organic phosphines such as phenylphosphine and derivatives thereof, and tetraphenylboron salts such as N-methylmorpholine-tetraphenylborate and derivatives thereof. As the curing accelerator, one of these may be used alone, or two or more thereof may be used in combination.

(filler)
The epoxy resin composition may contain fillers. The filler is generally used in epoxy resin compositions for sealing, and is not particularly limited, and is preferably an inorganic filler (that is, an inorganic filler). Examples of fillers include aluminum hydroxide, magnesium hydroxide, calcium carbonate, magnesium carbonate, calcium silicate, magnesium silicate, calcium oxide, magnesium oxide, alumina, aluminum nitride, aluminum borate whiskers, boron nitride, crystalline silica, An inorganic filler containing at least one inorganic material selected from the group consisting of amorphous silica and antimony oxide is preferred. Among these, the filler is preferably alumina, aluminum nitride, boron nitride, crystalline silica, or amorphous silica in order to improve thermal conductivity. For the purpose of adjusting melt viscosity and imparting thixotropic properties, fillers include aluminum hydroxide, magnesium hydroxide, calcium carbonate, magnesium carbonate, calcium silicate, magnesium silicate, calcium oxide, magnesium oxide, alumina, crystalline Silica or amorphous silica is preferred. In order to improve moisture resistance, the filler is preferably alumina, silica, aluminum hydroxide, or antimony oxide. One of these fillers may be used alone, or two or more thereof may be used in combination.

(coloring agent)
The epoxy resin composition may further contain a coloring agent as an additive. The coloring agent used here may be a known coloring agent such as carbon black, organic dyes, organic pigments, titanium oxide, red lead, or red iron oxide. The content of the coloring agent can be appropriately selected according to the purpose and the like. A coloring agent may be used individually by 1 type, or may be used in combination of 2 or more type.

(Method for preparing epoxy resin composition)
The epoxy resin composition containing the various components described above may be prepared using any method as long as these various components can be dispersed and mixed. Among epoxy resin compositions, in particular, in the method of preparing an epoxy resin composition that is in the form of a powder, for example, components in predetermined amounts are thoroughly mixed using a mixer or the like, and then melted using a mixing roll, an extruder, or the like. knead. Then, after the melt-kneaded composition is cooled and pulverized, sieving is performed as necessary. Specifically, for example, predetermined amounts of the above components are uniformly stirred and mixed, kneaded with a kneader, roll, extruder, etc. preheated to 70° C. to 140° C., cooled, pulverized, and if necessary, A desired epoxy resin composition can be obtained by a method such as sieving.

On the other hand, in the method of preparing an epoxy resin composition that is a granule-shaped powder, for example, after performing mixing and melt-kneading in the same manner as in the preparation of the powder-shaped powder, the composition in a molten state is poured into small holes. Cut while extruding from the strand. In this method, sieving may also be carried out in the preparation of granule-shaped powder, if necessary.

[Resin encapsulation]
Next, resin encapsulation using the epoxy resin composition described above as the encapsulating resin material will be described. Although compression molding will be described below as an example of resin encapsulation, the present invention is not limited to this, and transfer molding may be performed as described above. In the compression molding, for example, the resin-sealed laminate (encapsulated substrate) is obtained by sealing the laminate with the epoxy resin composition melted under reduced pressure and heating using a molding apparatus. The temperature during resin sealing may be, for example, 110° C. to 200° C., and is preferably 150° C. to 180° C. from the viewpoint of curability and shortening of molding time. The thickness of the sealing resin layer formed by the resin sealing process may be, for example, 450 μm or less, preferably 150 μm to 450 μm, more preferably 200 μm to 400 μm. Further, the thickness of the entire resin-sealed laminate resin-sealed by the resin sealing process may be, for example, 650 μm or less, preferably 200 μm to 650 μm, and more preferably 300 μm to 500 μm. . In the resin sealing by compression molding, for example, compression molding may be performed while reducing the pressure in the mold.

In compression molding, as described above, molding with an epoxy resin composition can be performed, for example, during reduced pressure. Depressurization may be performed at a high depressurization rate at first, and as the depressurization is performed, the depressurization rate may decrease. The depressurization rate can be defined as shown in Equation (2) below. When pressure reduction is started, the pressure drops quickly, but when the pressure is reduced to a certain extent, the rate of pressure drop decreases. When the pressure decreases to 5 torr or less per second, it is assumed that the decompression limit pressure has been reached, and the time from the start of decompression until the decompression limit pressure is reached is defined as the "decompression limit pressure reaching time".
(Decompression rate) = (initial pressure - decompression limit pressure) / (decompression limit pressure reaching time) (2)
The unit of the initial pressure and the decompression limit pressure is "torr", and the unit of the decompression limit pressure reaching time is "seconds". The initial pressure refers to the pressure at the start of decompression.
The decompression rate during compression molding is preferably 10 torr/sec to 350 torr/sec, more preferably 50 torr/sec to 330 torr/sec, and even more preferably 150 torr/sec to 310 torr/sec. .

[Post-curing step]
In the post-curing step, which is performed as necessary, the resin-sealed laminate (sealing substrate) obtained by the resin-sealing step is further heated. If the sealing resin layer formed by the resin sealing process is not completely cured (for example, semi-cured), the resin sealing layer is further cured in the post-curing process. For example, an oven such as a commercially available clean oven can be used for raising the temperature and keeping the temperature in the post-curing step. The temperature and time in the post-curing step are preferably 110° C. to 200° C. and 30 minutes to 7 hours, more preferably 150° C. to 180° C. and 1 hour to 6 hours.

[Singulation process]
In the singulation step, which is performed as necessary, the obtained resin-sealed laminate (sealing substrate) is cut into pieces. The cutting method is not particularly limited, and may be, for example, a cutting method using a rotary blade, a cutting method using a laser, or the like. For example, when a cutting method using a rotary blade is applied, as shown in FIG. get A commercially available cutting device (such as a dicer) and a rotating blade (blade) used for cutting can be used. As a dicer that is a cutting device using a rotary blade, for example, Disco's full-automatic dicing saw 6000 series, semi-automatic dicing saw 3000 series, and the like can be used. As a blade, a dicing blade NBC-ZH05 series, NBC-ZH series manufactured by DISCO Corporation, or the like can be used. Moreover, as a cutting device using a laser, for example, a fully automatic laser saw 7000 series manufactured by DISCO Corporation can be used.

[Method for selecting sealing resin material]
Next, a method for selecting the epoxy resin composition to be used in the above-described manufacturing method from a plurality of candidate epoxy resin compositions will be described. In this sorting method, first, warping of a semiconductor device is simulated when a semiconductor device is manufactured by sealing a laminate in which a semiconductor chip is mounted on a substrate with an epoxy resin composition as a sealing resin material. This simulation method includes a step of acquiring various information such as the volume ratio of the inorganic filler in the epoxy resin composition, the gel time of the epoxy resin composition, the curing shrinkage of the epoxy resin composition, and the glass transition temperature of the epoxy resin composition. and a step of inputting the acquired various information into the following formula (1) and calculating the warp (Y) of the semiconductor device due to the epoxy resin composition. Formula (1) used here is as follows, and a more detailed formula will be described later.
Warp (Y) = volume ratio term of inorganic filler + gel time term + cure shrinkage term + glass transition temperature term + temperature term (1)

In this epoxy resin composition sorting method, among a plurality of types of epoxy resin compositions, the calculated warpage (Y) is −30 μm or more and 30 μm or less at an arbitrary temperature (for example, 30° C.). Screen the epoxy resin composition. In this sorting method, among a plurality of types of epoxy resin compositions, an epoxy resin composition having a calculated warpage (Y) of −20 μm or more and 20 μm or less at an arbitrary temperature (for example, 30° C.) is selected. Alternatively, an epoxy resin composition having a value of −10 μm or more and 10 μm or less may be selected. Also, the temperature at the time of sorting may be 30°C, 125°C, or 250°C as described above.

[Prediction formula for predicting warpage]
Here, a method for calculating the warp (Y) of the above-described semiconductor device by simulation will be described in more detail. Calculation of the prediction formula used in this simulation can be analyzed using software JMP manufactured by SAS Institute Inc., for example. This software JMP has a function capable of constructing a stepwise regression linear model, and uses this function. Note that other analysis software having similar functions may be used. The method calculated by the inventors will be described below.

First, various epoxy resin compositions (24 types of W1 to W24) used for calculation of the prediction formula were prepared. These epoxy resin compositions contained at least an epoxy resin and, if necessary, a curing agent, a coupling agent, a curing accelerator, a filler, a coloring agent and other additives. The details of each component contained in the epoxy resin composition used this time are as described in Tables 1 to 4 below.

[Preparation of epoxy resin composition for compression molding]
Each material for producing an epoxy resin composition for predicting warpage (Y) of a semiconductor device was prepared as follows.

(a) Epoxy resin E1: manufactured by Nippon Kayaku Co., Ltd., product name: NC-3000
・ E2: manufactured by Mitsubishi Chemical Corporation, product name: YX-4000H
・ E3: Nippon Kayaku Co., Ltd., product name: EPPN-501HY
・ E4: Nippon Kayaku Co., Ltd., product name: CER-3000L

(b) Curing agent H1: manufactured by Meiwa Kasei Co., Ltd., product name: MEHC7851SS
・H2: Made by Air Water, product name: HE910
・ H3: Meiwa Kasei Co., Ltd., product name: MEHC7501-3S
・ H4: Meiwa Kasei Co., Ltd., product name: MEHC7500-3S
・ H5: manufactured by Meiwa Kasei Co., Ltd., product name: MEHC7851M
・ H6: manufactured by Meiwa Kasei Co., Ltd., product name: H-4

(c) Curing accelerator A1: adduct of triphenylphosphine and 1,4-benzoquinone

(d) Silane coupling agent C1: manufactured by Shin-Etsu Chemical Co., Ltd., product name: KBM-573
・ C2: Shin-Etsu Chemical Co., Ltd., product name: KBM-202SS
・ C3: Shin-Etsu Chemical Co., Ltd., product name: KBM-403

(e) pigment (colorant)
・ P1: manufactured by Mitsubishi Chemical Corporation, product name: MA600

(f) Additive T1: Sakai Chemical Industry Co., Ltd., product name: HT-P
・ T2: manufactured by Hokko Chemical Industry Co., Ltd., product name: TP-50

(g) Inorganic filler (filler)
・ F1: manufactured by Admatechs Co., Ltd., product name: SO-25HV
・F2: manufactured by Denka Co., Ltd., product name: FB-550XFC
・F3: manufactured by Denka Co., Ltd., product name: FB-302X
・ F4: manufactured by Denka Co., Ltd., product name: FB-9454FC
・F5: Nippon Steel & Sumikin Chemical Co., Ltd., product name: S4140-53P

[Preparation of epoxy resin composition for compression molding]
Various epoxy resin compositions shown in Tables 1 to 4 are mixed with the above epoxy resin, curing agent, curing accelerator, silane coupling agent, pigment, and additives in predetermined parts by mass, and inorganic fillers in predetermined parts with respect to the total volume. It was blended so that the volume % of Thereafter, the mixture was sufficiently mixed with a mixer and then kneaded with a kneader preheated to 110° C. to obtain a molten composition. The obtained composition in a molten state was supplied to a cylindrical outer peripheral portion having a plurality of small holes, the resin composition was melt extruded, and then cooled and pulverized to prepare an epoxy resin composition.

[Calculation of volume ratio of inorganic filler]
The volume fraction FC (%) of the inorganic filler (filler) in each epoxy resin composition (W1 to W24) was calculated. The volume fraction FC of the inorganic filler is a value that can be easily calculated from the amount of the inorganic filler compounded in each epoxy resin composition. Tables 1 to 4 show the volume fraction FC of the inorganic filler in each epoxy resin composition (W1 to W24).

[Measurement of gel time]
The gel time (curing time) GT (seconds) of each epoxy resin composition (W1 to W24) was measured. The gel time GT was evaluated using a gelation tester as follows. 0.5 g of each epoxy resin composition obtained above was placed on a hot plate heated to 175° C., and a jig was used to rotate the sample at a speed of 20 to 25 rpm. Spread evenly into a circle of 2.5 cm. After the sample was placed on the hot plate, the time required for the sample to lose its viscosity and become gelled and peeled off from the hot plate was measured as the gel time GT (seconds). Tables 1 to 4 show the gel time GT of each epoxy resin composition (W1 to W24).

[Measurement of cure shrinkage]
Using each epoxy resin composition (W1 to W24), curing shrinkage (molding shrinkage) MS (%) was measured by the following procedure.
(1) Using a mold with dimensions of 127 mm length × 6.4 mm height × 12.7 mm width when measured at room temperature (25 ° C.), test pieces from epoxy resin compositions for compression molding by transfer molding was made. Specifically, molding was performed using a predetermined mold under the conditions of 180° C., 90 seconds, and 6.9 MPa to prepare an as-molded test piece. This as-molded test piece was cured at 175° C. for 5 hours to prepare a test piece.
(2) The molded test piece was immediately taken out and cooled to room temperature (25° C.), and then the dimensions of the test piece were measured with a vernier caliper. The measurement was performed on two test pieces (test piece 1 and test piece 2) produced under the same molding conditions.
(3) From the dimensions of the test piece measured at room temperature and the dimensions of the mold measured at room temperature, the molding shrinkage rate (%) was calculated by formula (3). In formula (3), D1 is the lengthwise dimension (mm) of the mold used for molding the test piece 1, d1 is the lengthwise dimension (mm) of the test piece 1, and D2 is the test piece d2 is the lengthwise dimension (mm) of the mold used for molding No. 2, and d2 is the lengthwise dimension (mm) of the test piece 2. Tables 1 to 4 show the cure shrinkage MS (%) of each epoxy resin composition (W1 to W24).

[Preparation of samples for measuring linear expansion coefficients α1 and α2, glass transition temperature (Tg), flexural modulus, and flexural strength]
Each epoxy resin composition (W1 to W24) was molded using a transfer molding machine and cured to prepare a test piece. Molding and curing were performed under conditions of a molding temperature of 175° C. and a molding time of 90 seconds. Then, post-curing was performed at 175° C. for 5 hours.

[Measurement of linear expansion coefficients α1 and α2 and glass transition temperature]
Using TMA high-precision two-sample thermal analysis (manufactured by Seiko Instruments Inc., product name: SS6100), under the conditions of a load of 10 g and a heating rate of 5 ° C./min, a test piece (long side 20 mm × lower side 5 mm upper side 4 mm × thickness 3 mm ) was measured for the glass transition temperature Tg (°C). Also, the linear expansion coefficient α between the two measurement temperatures of 80° C. and 100° C. is α1, and the linear expansion coefficient α between the two measurement temperatures of 200° C. and 230° C. is α2. The intersection of the tangents of α1 and α2 was taken as the glass transition temperature (Tg). Tables 1 to 4 show the glass transition temperature Tg (°C) of each epoxy resin composition (W1 to W24) and the linear expansion coefficients α1 and α2 for calculating the glass transition temperature Tg (°C).

[Measurement of flexural modulus and flexural strength]
A three-point support bending test conforming to JIS-K-6911 (2006) was performed at 30°C and 250°C using A&D Tensilon, and the elasticity of test pieces made of each epoxy resin composition (W1 to W24) was measured. modulus and bending strength were obtained. The flexural modulus E is defined by Equation (4). However, in the following formula, E is the flexural modulus (MPa), P is the load cell value (N), y is the displacement amount (mm), l is the span = 48 mm, w is the test piece width = 10 mm, h is the test piece Thickness = 3 mm.

[Production of semiconductor package (semiconductor device)]
On a three-layer coreless substrate having a substrate area of 240×74 mm ² and a substrate thickness of 100 μm, four dummy chips with an adhesive layer having a chip and adhesive layer area of 10×5 mm ² , a chip thickness of 70 μm, and an adhesive layer thickness of 10 μm were attached by a die bonder. (manufactured by Fasford Technology Co., Ltd., product name: DB830plus+), two layers were mounted in the thickness direction of the substrate and two in the surface direction of the substrate. The four dummy chips were mounted at a total of 60 locations to prepare a chip-mounted substrate (that is, laminate) (laminate preparation step).

Subsequently, each epoxy resin composition for compression molding (W1 to W24) was compression-molded to obtain a sealing substrate (that is, a resin-sealed laminate). The molding conditions were set to a sealing thickness of 320 μm, a molding temperature of 165° C., a molding time of 180 seconds, and a decompression rate of 90 torr/second (resin sealing process). The definition of decompression speed is as described above. After that, the sealing substrate (that is, the resin-sealed laminate) is cut into 15 × 15 mm ² sizes using a full-auto dicer (manufactured by Disco Co., Ltd., DAD3350, rotary blade) and separated into semiconductor packages ( A semiconductor device) was obtained (individualization step). It should be noted that 60 semiconductor packages (semiconductor devices) could be obtained from one sealing substrate (resin-sealed laminate).

[Evaluation of warpage]
Select 24 semiconductor packages (semiconductor devices) after singulation from one substrate, and use a warp measurement device Thermoire (manufactured by AKROMETRIX, product name: TherMoire AXP) to measure the temperature of each package at 30 ° C., 125 ° C., and 250 ° C. The amount of warpage (actually measured value) was measured, and the average value of 24 pieces was calculated. Regarding the amount of warpage (μm) of each semiconductor device, the cry warp is a positive (+) value and the smile warp is a negative (−) value. Here, "creep warping" means that the edge of the substrate warps to the side opposite to the sealing resin layer, and "smile warping" means that the edge of the substrate warps toward the sealing resin layer.

[Prediction formula for predicting warpage]
Calculation of the prediction formula was analyzed using software JMP manufactured by SAS Institute Inc. A prediction formula for predicting warpage (Y), which is an objective variable, is shown in formula (5). Note that Tables 1 to 4 above show simulation values calculated based on this prediction formula.

Warp (Y) = a + b*FC + d*GT + e*Tg+ f*α1 + g*α2 + h*FMRt + i*FM250℃ + j*FSRt+ k*FS250℃ + l*MS + M*SG + cccc*FC^2+ dddd*GT^2 + eeee*Tg^2 + ffff*α1^2 + gggg*α2^2 + hhhh*FMRt^2 + iiii*FM250℃^2 + jjjj*FSRt^2+ kkkk*FS250℃^2 + llll*MS^2 + mmmm*SG^2 + n*FC*GT + o*FC*Tg+ p*FC*α1 + q*FC*α2 + r*FC*FMRt+ s*FC *FM250℃ + t*FC*FSRt + u*FC*FS250℃ + v*FC*MS + w*FC*SG + x*GT*Tg + y*GT*α1 +z*GT*α2 + aa*GT *FMRt + bb*GT*FM250℃ + cc*GT*FSRt + dd*GT*FS250℃ + ee*GT*MS +ff*GT*SG + gg*Tg*α1 + hh*Tg*α2+ ii*Tg* FMRt + jj*Tg*FM250℃ + kk*Tg*FSRt + ll*Tg*FS250℃+ mm*Tg*MS + nn*Tg*SG + oo*α1*α2 + pp*α1*FMRt + qq*α1* FM250℃ + rr*α1*FSRt+ ss*α1*FS250℃ + tt*α1*MS + uu*α1*SG + vv*α2*FMRt + ww*α2*FM250℃ + xx*α2*FSRt + yy*α2* FS250℃+ zz*α2*MS + aaa*α2*SG + bbb*FMRt*FM250℃ + ccc*FMRt*FSRt +ddd*FMRt*FS250℃ + eee*FMRt*MS + fff*FMRt*SG + ggg*FM250 ℃*FSRt + hhh*FM250℃*FS250℃ + iii*FM250℃*MS + jjj*FM250℃*SG + kkk*FSRt*FS250℃ + lll*FSRt*MS +mmm*FSRt*SG + nnn*FS250℃* MS + ooo*FS250℃*SG + ppp*MS*SG + qqq*T + nnnn*T^2 + rrr*T*FC + sss*T*GT + tt t*T*Tg+ uuu*T*α1 + vvv*T*α2 +www*T*FMRt + xxx*T*FM250℃ + yyy*T*FSRt + zzz*T*FS250℃+ aaaa*T*MS + bbbb *T*SG
...(5)

The explanatory variables of the epoxy resin composition in formula (5) are shown below.
FC: Volume fraction of inorganic filler (%)
GT…Gel time (seconds)
Tg: Glass transition temperature of cured product (°C)
α1…Linear expansion coefficient of cured product (ppm/°C)
α2…Linear expansion coefficient of cured product (ppm/°C)
FMRt: Flexural modulus of cured product at 30°C (GPa)
FM250℃…Flexural modulus of cured material at 250℃ (GPa)
FSRt: Bending strength of cured product at 30°C (MPa)
FS250℃…Bending strength of cured product at 250℃ (MPa)
MS…Cure shrinkage rate (%)
SG…Specific gravity
T…Temperature (°C)

The coefficients of equation (5) are shown below.
a,b,d,e,f,g,h,i,j,k,l,m,n,o,p,q,r,s,t,u,v,w,x,y,z, aa,bb,cc,dd,ee,ff,gg,hh,ii,jj,kk,ll,mm,nn,oo,pp,qq,rr,ss,tt,uu,vv,ww,xx,yy, zz, aaa, bbb, ccc, ddd, eee, fff, ggg, hhh, iii, jjj, kkk, lll, mmm, nnn, ooo, ppp, qqq, rrr, sss, ttt, uuu, vvv, www, xxx, yyy, zzz, aaaa, bbbb, cccc, dddd, eeee, ffff, gggg, hhhh, iiii, jjjj, kkkk, llll, mmmm, nnnn
The above coefficients are appropriately set by the simulation software described above. In addition, in the method of using this software, the amount of warp (Y ) is calculated.

Also, equation (5) above can be simplified to equation (6) consisting of the main part. The explanatory variable terms in formula (6) are only related to the volume fraction FC of the inorganic filler, the gel time GT, the glass transition temperature Tg of the cured product, the cure shrinkage rate MS, and the temperature T, and the R-square value was brought close to 1. A prediction formula is shown in Formula (6). Epoxy resin compositions (Examples) were produced according to these parameters, and the results of measuring the amount of warpage are shown in Table 5 below. The "R-squared value" is a value that indicates the correlation between the measured value of the warpage amount and the simulated value (predicted value) of the warpage amount. It can show that you are strong.

Warp (Y) = a + b*FC + d*GT + e*Tg+ l*MS + eeee*Tg^2 + n*FC*GT + o*FC*Tg + v*FC*MS + qqq*T + nnnn*T^2 + rrr*T*FC+ sss*T*GT + ttt*T*Tg + aaaa*T*MS (6)

The explanatory variables of the epoxy resin composition in formula (6) are shown below.
FC: Volume fraction of inorganic filler (%)
GT…gel time (s)
Tg: Glass transition temperature of cured product (°C)
MS…Cure shrinkage rate (%)
T…Temperature (°C)

Also, the coefficients of Equation (6) are shown below.
a=20621.33977
b=-240.4533784
d=-16.68388327
e=-126.9694026
l=-14965.51005
n=0.226087133
o=1.327567761
v=184.5706719
qqq=-0.679502398
rrr=-0.029083937
sss=-0.003477379
ttt=0.009940489
aaaa=1.506803252
eeee=0.078172288
nnnn=0.00422203
The above coefficients are values appropriately set by the simulation software described above. The physical properties obtained from the amount of warpage are calculated by the re-sudden descent method from the equation (6).

In the above equation (6), the above five factors (more precisely, four factors excluding temperature) are used to obtain the value of the warp (Y) of the semiconductor device at an arbitrary temperature because the factor This is due to the fact that the degree of influence between the two is relatively slight, and empirically, it is easy to control when producing the encapsulant. Based on these four types of factors, Equation (5) above can be further summarized in Equation (1) below.
Warp (Y) = volume ratio term of inorganic filler + gel time term + cure shrinkage term + glass transition temperature term + temperature term (1)

As described above, according to the method for simulating the warp of a semiconductor device according to the present embodiment, as is clear from the comparison between the warpage measured value and the simulated value, based on the equation (5) or the equation (6), , the volume fraction FC of the inorganic filler in the epoxy resin composition, the gel time GT of the epoxy resin composition, the cure shrinkage MS of the epoxy resin composition, and the glass transition temperature Tg of the epoxy resin composition. By summing the terms, it is possible to accurately predict the warpage of the semiconductor device manufactured by sealing with the epoxy resin composition. As a result, according to this simulation method, it is possible to control the warpage of a semiconductor device sealed with an epoxy resin composition at an arbitrary temperature.

Further, in the present embodiment, the simulation method described above can be used to predict the warpage of the semiconductor device based on various compositions of the epoxy resin composition used in the semiconductor device. It is possible to select the composition of the desired epoxy resin composition that can suppress the warpage (Y). That is, in this selection method, a sealing resin material for fabricating a semiconductor device by sealing a laminate in which a semiconductor chip is mounted on a substrate with an epoxy resin composition is selected from a plurality of types of epoxy resin compositions. . Specifically, in this encapsulating resin material selection method, various types of information such as the inorganic filler volume ratio, gel time, cure shrinkage, and glass transition temperature are obtained for each of a plurality of types of epoxy resin compositions. For each of the processes and multiple types of epoxy resin compositions, the obtained various information is input into the above formula (5) or (6), and the warp (Y ), and selecting a sealing resin material with a calculated warpage (Y) of (Y)−30 μm or more and (Y)+30 μm or less from a plurality of types of sealing resin materials. And prepare.

In this sealing resin material selection method, in a plurality of types of sealing resin materials, the term of the volume ratio of the inorganic filler in each sealing resin material, the term of the gel time of each sealing resin material, and the term of each sealing resin By summing the curing shrinkage rate term of the material and the term of the glass transition temperature of each encapsulating resin material, the predicted warpage of the semiconductor device produced by encapsulation with each encapsulating resin material is calculated. Then, the encapsulating resin material whose warpage prediction falls within a predetermined range is selected. As described above, the prediction of the warpage of the semiconductor device at any temperature based on the equation (5) or (6) is highly accurate. It becomes possible to control the warp of the semiconductor device to be processed. In the above example, the sorting method in which the range of predicted warpage (Y) is ±30 μm is shown. Alternatively, it may be a sorting method in which the range of predicted warpage (Y) is within ±40 μm.

Further, in this encapsulating resin material selection method, in the acquiring step, for each of the plurality of types of epoxy resin compositions, at least one of the inorganic filler volume ratio, gel time, cure shrinkage, and glass transition temperature may be acquired as various information by measuring In this case, it is possible to more accurately obtain the values of the factors described above for each encapsulating resin material, and it is possible to predict the warpage of the semiconductor device with even higher accuracy. As a result, according to this sorting method, it is possible to further suppress the warpage of the semiconductor device sealed with the sealing resin material. Some of the available materials have catalog values, in which case such values may be used in the simulation method and selection method.

In this encapsulating resin material selection method, the thickness of the epoxy resin composition (cured product) encapsulating the laminate may be 450 μm or less, and the semiconductor device encapsulated with the epoxy resin composition may The thickness (the sealing portion is the cured portion) may be 650 μm or less. In this case, the predicted value of the warpage of the semiconductor device according to the above equation (1) can be brought closer to the measured value. According to the knowledge of the present inventors, it is possible to more accurately predict the warpage in encapsulation of such a thin semiconductor device by the method focusing on the factors described above. In this case, the thickness of the substrate constituting the laminate may be 200 μm or less, and the total thickness of the semiconductor chips in the laminate may be 300 μm or less.

It should be noted that it is also possible to manufacture a semiconductor device in which warping is suppressed by using the above-described method of selecting the encapsulating resin material. This method of manufacturing a semiconductor device includes a step of preparing a sealing resin material based on the selection method described above, and a step of sealing a laminate in which semiconductor chips are mounted on a substrate with the sealing resin material. In this case, since the semiconductor device is manufactured by encapsulating with a sealing resin material whose warpage is predicted in advance, a semiconductor device in which warpage is controlled can be obtained. In this manufacturing method, the molding temperature in the step of sealing the laminate may be 110.degree. C. to 200.degree.

Further, the sealing resin material described above may be a sealing resin material containing at least a resin, a curing agent, a curing accelerator, and an inorganic filler. Warp represented by the following formula (5) or formula (6) based on the volume ratio of the material, the gel time of the sealing resin material, the curing shrinkage rate of the sealing resin material, and the glass transition temperature of the sealing resin material (Y) may be -30 μm or more and 30 μm or less. In this case, it is possible to provide a sealing resin material capable of controlling warpage of the semiconductor device.

EXAMPLES The present invention will be specifically described below by way of Examples and Comparative Examples, but the present invention is not limited to these.

[Example]
[Preparation of epoxy resin composition for compression molding]
Materials for producing an epoxy resin composition for semiconductor devices were prepared as follows.

(a) Epoxy resin E1: manufactured by Nippon Kayaku Co., Ltd., product name: NC-3000
・ E2: manufactured by Mitsubishi Chemical Corporation, product name: YX-4000H
・ E3: Nippon Kayaku Co., Ltd., product name: EPPN-501HY

(b) Curing agent H1: manufactured by Meiwa Kasei Co., Ltd., product name: MEHC7851SS
・H2: Made by Air Water, product name: HE910
・ H3: Meiwa Kasei Co., Ltd., product name: MEHC7501-3S
・ H6: manufactured by Meiwa Kasei Co., Ltd., product name: H-4

(c) Curing accelerator A1: adduct of triphenylphosphine and 1,4-benzoquinone

(d) Silane coupling agent C1: manufactured by Shin-Etsu Chemical Co., Ltd., product name: KBM-573
・ C2: Shin-Etsu Chemical Co., Ltd., product name: KBM-202SS
・ C3: Shin-Etsu Chemical Co., Ltd., product name: KBM-403

(e) pigment (colorant)
・ P1: manufactured by Mitsubishi Chemical Corporation, product name: MA600

(f) Additive T1: Sakai Chemical Industry Co., Ltd., product name: HT-P
・ T2: manufactured by Hokko Chemical Industry Co., Ltd., product name: TP-50

(g) Inorganic filler (filler)
・ F1: manufactured by Admatechs Co., Ltd., product name: SO-25HV
・F2: manufactured by Denka Co., Ltd., product name: FB-550XFC
・F3: manufactured by Denka Co., Ltd., product name: FB-302X
・ F4: manufactured by Denka Co., Ltd., product name: FB-9454FC
・F5: Nippon Steel & Sumikin Chemical Co., Ltd., product name: S4140-53P

[Preparation of epoxy resin composition for compression molding]
Various epoxy resin compositions shown in Table 5 (Comparative Example W-1, Example W-25, Comparative Example W-22, Example W-26) were mixed with the above epoxy resin, curing agent, curing accelerator, silane coupling Agents, pigments, and additives were blended in parts by mass, and inorganic fillers were blended so as to be vol % with respect to the total volume. Thereafter, the mixture was sufficiently mixed with a mixer and then kneaded with a kneader preheated to 110° C. to obtain a molten composition. The obtained composition in a molten state was supplied to a cylindrical outer peripheral portion having a plurality of small holes, the resin composition was melt extruded, and then cooled and pulverized to prepare an epoxy resin composition. In addition, the volume ratio of the inorganic filler, the gel time, the glass transition temperature Tg, the molding shrinkage ratio, etc. in the various epoxy resin compositions shown in Table 5 were calculated, and the predicted value of the warpage amount of the PKG (30 ° C. or 250 ° C.) was calculated by the simulation method described above. Table 5 shows the calculated simulation values of warpage.

[Production of semiconductor package (semiconductor device)]
On a three-layer coreless substrate having a substrate area of 240×74 mm ² and a substrate thickness of 100 μm, four dummy chips with an adhesive layer having a chip and adhesive layer area of 10×5 mm ² , a chip thickness of 70 μm, and an adhesive layer thickness of 10 μm were attached by a die bonder. (manufactured by Fasford Technology Co., Ltd., product name: DB830plus+), two layers were mounted in the thickness direction of the substrate and two in the surface direction of the substrate. The four dummy chips were mounted at a total of 60 locations to prepare a chip-mounted substrate (that is, laminate) (laminate preparation step).

An epoxy resin composition for compression molding is compression-molded on the chip-mounted substrate (that is, laminate) produced as described above using a compression device (manufactured by TOWA Corporation, product name: PMC1040-S), and a sealing substrate is obtained. (that is, a resin-encapsulated laminate) was obtained. The molding conditions were set to a sealing thickness of 320 μm, a molding temperature of 165° C., a molding time of 180 seconds, and a decompression rate of 90 torr/second (resin sealing step). The definition of decompression speed is as described above. After that, the sealing substrate (that is, the resin-sealed laminate) is cut into 15 × 15 mm ² sizes using a full-auto dicer (manufactured by Disco Co., Ltd., DAD3350, rotary blade) and separated into semiconductor packages ( A semiconductor device) was obtained (individualization step). Sixty semiconductor packages (semiconductor devices) can be obtained from one sealing substrate (resin-sealed laminate).

[Evaluation of warpage]
Select 24 semiconductor packages (semiconductor devices) after singulation from one substrate, and use a warp measurement device Thermoire (manufactured by AKROMETRIX, product name: TherMoire AXP) to measure the temperature of each package at 30 ° C., 125 ° C., and 250 ° C. The amount of warpage was measured, and the average value of 24 pieces was calculated. As for the amount of warpage of each semiconductor device, the cry warp is a positive (+) value and the smile warp is a negative (-) value. Here, "creep warping" means that the edge of the substrate warps to the side opposite to the sealing resin layer, and "smile warping" means that the edge of the substrate warps toward the sealing resin layer.

From the results shown in Table 5, in Example W-25 compared to Comparative Example W-1, the amount of PKG warpage at 30 ° C. was set to "-4.7 µm (actual value)", which is close to "0 µm", which is the target. was made. The simulated value in Example W-25 was "-10.7 µm", which was close to the measured value. In contrast to Comparative Example W-22, in Example W-26, the amount of PKG warpage at 250° C. was able to be 49.5 μm (actually measured value), which is close to the targeted value of 50 μm. The simulated value in Example W-26 was "50.3 μm", which was close to the measured value. As described above, it was confirmed that an epoxy resin composition having a desired amount of warpage was obtained using the simulation method described above.

DESCRIPTION OF SYMBOLS 1... Semiconductor device, 2... Substrate, 3... Chip with adhesive layer, 4... Sealing resin layer, 5... Semiconductor chip body, 6... Adhesive layer, 7... Rotating blade, 10... Laminate, 20... Resin sealing lamination body.

Claims (7)

A method for simulating warpage of a semiconductor device at an arbitrary temperature when a semiconductor device is manufactured by sealing a laminate in which a semiconductor chip is mounted on a substrate with a sealing resin material, comprising:
a step of acquiring various information about the volume ratio of the inorganic filler in the sealing resin material, the gel time of the sealing resin material, the cure shrinkage rate of the sealing resin material, and the glass transition temperature of the sealing resin material; ,
a step of inputting the acquired various information into the following formula (1) to calculate the warp (Y) of the semiconductor device due to the sealing resin material;
A method of simulating warpage of a semiconductor device, comprising:
Warp (Y) = volume ratio term of inorganic filler + gel time term + cure shrinkage term + glass transition temperature term + temperature term (1) A method for selecting a sealing resin material for fabricating a semiconductor device by sealing a laminate in which a semiconductor chip is mounted on a substrate with a sealing resin material from among a plurality of types of sealing resin materials,
a step of obtaining various types of information on the inorganic filler volume ratio, gel time, curing shrinkage rate, and glass transition temperature for each of the plurality of types of sealing resin materials;
A step of inputting the obtained various information into the following formula (1) for each of the plurality of types of encapsulation resin materials, and calculating the warp (Y) of the semiconductor device at 30° C. due to each of the encapsulation resin materials. When,
a step of selecting a sealing resin material having a calculated warp (Y) of (Y)−30 μm or more and (Y)+30 μm or less from among the plurality of types of sealing resin materials;
A method for selecting a sealing resin material, comprising:
Warp (Y) = volume ratio term of inorganic filler + gel time term + cure shrinkage term + glass transition temperature term + temperature term (1) In the obtaining step, for each of the plurality of types of sealing resin materials, at least one of the volume ratio of the inorganic filler, the gel time, the curing shrinkage, and the glass transition temperature is measured to obtain the Acquired as various information,
The method for selecting a sealing resin material according to claim 2. The thickness of the sealing resin material that seals the laminate is 450 μm or less,
The semiconductor device sealed with the sealing resin material has a thickness of 650 μm or less.
The method for selecting a sealing resin material according to claim 2 or 3. A step of preparing a sealing resin material based on the screening method according to any one of claims 2 to 4;
a step of sealing the laminate in which the semiconductor chip is mounted on the substrate with the sealing resin material;
A method of manufacturing a semiconductor device, comprising: A sealing resin material sorted by the sorting method according to any one of claims 2 to 4. A sealing resin material containing at least a resin, a curing agent, a curing accelerator, and an inorganic filler,
The encapsulation resin material has a volume ratio of the inorganic filler in the encapsulation resin material, a gel time of the encapsulation resin material, a curing shrinkage rate of the encapsulation resin material, and a glass transition temperature of the encapsulation resin material. A sealing resin material having a warp (Y) at an arbitrary temperature represented by the following formula (1) based on (Y)-30 μm or more and (Y)+30 μm or less.
Warp (Y) = volume ratio term of inorganic filler + gel time term + cure shrinkage term + glass transition temperature term + temperature term (1)

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